JPS6415417U - - Google Patents

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Publication number
JPS6415417U
JPS6415417U JP10918087U JP10918087U JPS6415417U JP S6415417 U JPS6415417 U JP S6415417U JP 10918087 U JP10918087 U JP 10918087U JP 10918087 U JP10918087 U JP 10918087U JP S6415417 U JPS6415417 U JP S6415417U
Authority
JP
Japan
Prior art keywords
agc
circuit
section
control
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10918087U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10918087U priority Critical patent/JPS6415417U/ja
Publication of JPS6415417U publication Critical patent/JPS6415417U/ja
Pending legal-status Critical Current

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  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の第1の実施例を示すブロツク
図、第2図は本考案の第2の実施例を示すブロツ
ク図、第3図aは第1図の実施例の検波出力と制
御電圧との関係の一例を示す特性図、第3図bは
第1図の実施例のAGC出力特性図、第4図a,
bおよびcはそれぞれ第1図の実施例の受信信号
波形図a、検波出力波形図bおよび出力波形図c
、第5図は従来のAGC回路のブロツク図、第6
図a,bおよびcはそれぞれ第5図の従来のAG
C回路の受信信号波形図a、検波出力波形図bお
よび出力波形図cである。 1……受波器、2……前置増幅器、3……AG
C部、4……AGC制御部、5,8……振幅圧縮
検回路、6……リツプル除去回路、7……制御電
圧回路、31……利得制御回路、32……増幅器
、41……検波回路、42……直流増幅回路、5
1A〜C……直流対数増幅器、52A〜C……抵
抗、53A〜C……ダイオード、54……コンデ
ンサ、81A〜C……直線検波回路、82A〜C
……対数増幅回路、83……加算回路。
Fig. 1 is a block diagram showing a first embodiment of the present invention, Fig. 2 is a block diagram showing a second embodiment of the invention, and Fig. 3a shows the detection output and control of the embodiment of Fig. 1. A characteristic diagram showing an example of the relationship with voltage, Figure 3b is an AGC output characteristic diagram of the embodiment of Figure 1, Figure 4a,
b and c are the received signal waveform diagram a, the detected output waveform diagram b, and the output waveform diagram c of the embodiment shown in FIG. 1, respectively.
, Figure 5 is a block diagram of a conventional AGC circuit, and Figure 6 is a block diagram of a conventional AGC circuit.
Figures a, b and c are respectively the conventional AG of Figure 5.
They are a received signal waveform diagram a, a detected output waveform diagram b, and an output waveform diagram c of the C circuit. 1...Receiver, 2...Preamplifier, 3...AG
C section, 4...AGC control unit, 5, 8...amplitude compression detection circuit, 6...ripple removal circuit, 7...control voltage circuit, 31...gain control circuit, 32...amplifier, 41...detection Circuit, 42...DC amplifier circuit, 5
1A-C...DC logarithmic amplifier, 52A-C...Resistor, 53A-C...Diode, 54...Capacitor, 81A-C...Linear detection circuit, 82A-C
... Logarithmic amplifier circuit, 83 ... Addition circuit.

Claims (1)

【実用新案登録請求の範囲】 ソーナー受信信号の増幅利得を自動的に制御す
るAGC(Automatic Gain Co
ntrol)部と、このAGC部における利得制
御に必要な制御信号を供給するAGC制御部とを
備えたAGC回路において、 前記AGC制御部の入力を前記AGC部の入力
段か受けてその入出力特性がほぼ対数特性を示す
よに圧縮権検波を行なつて入力を広くダイナミツ
クレンジにわたつて圧縮して検波した直流電圧を
出力する振幅圧縮検波回路と、 前記振幅圧縮検波回路の出力する直流電圧を受
けてこれに含まれるリツプルを除去して出力する
リツプル除去回路と、 前記リツプル除去回路の出力を受けてこれを基
準電圧と比較し差電圧を前記制御信号として前記
AGC部に提供する制御電圧回路とを有するAG
C制御部を備えて成ることを特徴とするAGC回
路。
[Claims for Utility Model Registration] AGC (Automatic Gain Co.) that automatically controls the amplification gain of sonar reception signals
ntrol) section and an AGC control section that supplies a control signal necessary for gain control in this AGC section, wherein the input of the AGC control section is received through the input stage of the AGC section to determine its input/output characteristics. an amplitude compression detection circuit that compresses an input over a wide dynamic range and outputs the detected DC voltage by performing compression right detection so that the signal exhibits approximately logarithmic characteristics; and the DC voltage output from the amplitude compression detection circuit. a ripple removal circuit that receives the output of the ripple removal circuit, removes the ripples contained in the ripple removal circuit, and outputs the same; and a control voltage that receives the output of the ripple removal circuit, compares it with a reference voltage, and provides the difference voltage as the control signal to the AGC section. AG having a circuit
An AGC circuit comprising a C control section.
JP10918087U 1987-07-15 1987-07-15 Pending JPS6415417U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10918087U JPS6415417U (en) 1987-07-15 1987-07-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10918087U JPS6415417U (en) 1987-07-15 1987-07-15

Publications (1)

Publication Number Publication Date
JPS6415417U true JPS6415417U (en) 1989-01-26

Family

ID=31345187

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10918087U Pending JPS6415417U (en) 1987-07-15 1987-07-15

Country Status (1)

Country Link
JP (1) JPS6415417U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02284547A (en) * 1989-04-25 1990-11-21 Nec Corp Orthogonal signal demodulation system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02284547A (en) * 1989-04-25 1990-11-21 Nec Corp Orthogonal signal demodulation system

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