JPS6411415A - Array device for switch element - Google Patents

Array device for switch element

Info

Publication number
JPS6411415A
JPS6411415A JP62167246A JP16724687A JPS6411415A JP S6411415 A JPS6411415 A JP S6411415A JP 62167246 A JP62167246 A JP 62167246A JP 16724687 A JP16724687 A JP 16724687A JP S6411415 A JPS6411415 A JP S6411415A
Authority
JP
Japan
Prior art keywords
product term
lines
line
mosfets
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62167246A
Other languages
Japanese (ja)
Inventor
Takako Maruyama
Masanobu Fukushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP62167246A priority Critical patent/JPS6411415A/en
Publication of JPS6411415A publication Critical patent/JPS6411415A/en
Pending legal-status Critical Current

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  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To decrease the time constant of a circuit and to shorten a signal processing time by providing a switching means which makes a selection of whether or not a buffer amplifier is connected to a signal line according to the number of switch elements connected to the signal line. CONSTITUTION:Respective MOSFETs Q are provided at intersection parts of input lines 4 and product term lines 5 and intersection parts of the product term lines 5 and output lines 7, and a logic circuit is so set that metal options and the MOSFETs Q are programmed or not programed. An input 4b connected to the gates of MOSFETs Q connected to product term lines 5a-5i is connected to buffer amplifiers 20b, 21b, 22b, and 23b connected to a product term line 5b connected to output lines 7a-7i, and other buffer amplifiers are placed in a through connection state. The distributed capacity of the input line 4b and product term line 5b is divided by the buffer amplifiers to decrease the time constant substantially, thereby shortening the signal processing time.
JP62167246A 1987-07-03 1987-07-03 Array device for switch element Pending JPS6411415A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62167246A JPS6411415A (en) 1987-07-03 1987-07-03 Array device for switch element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62167246A JPS6411415A (en) 1987-07-03 1987-07-03 Array device for switch element

Publications (1)

Publication Number Publication Date
JPS6411415A true JPS6411415A (en) 1989-01-17

Family

ID=15846167

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62167246A Pending JPS6411415A (en) 1987-07-03 1987-07-03 Array device for switch element

Country Status (1)

Country Link
JP (1) JPS6411415A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0514203A (en) * 1991-07-02 1993-01-22 Mitsubishi Electric Corp Digital/analog conversion circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0514203A (en) * 1991-07-02 1993-01-22 Mitsubishi Electric Corp Digital/analog conversion circuit

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