JPS6410860B2 - - Google Patents

Description

[Detailed Description of the Invention] <Field> The present invention relates to a line control system for a processing device connected to a line, and particularly to a line that allows the processing device to efficiently process equipment other than the line and that allows high-speed access to the line. Regarding control method.

<Prior art> In general, devices are known that perform certain processing, such as transaction processing at a bank terminal, by connecting multiple units that perform mechanical control to a high-speed line and controlling them on the main unit side. .

Furthermore, in this way, in the unit, interrupts to the processing device within the unit are assigned the highest priority so that data from the line can be processed with the highest priority.

However, if data from the line is assigned the highest priority in this way, other processing by the processing device,
For example, control of each operating device will be delayed due to reception of line data.

In addition, in large-scale processing equipment, devices that have a certain degree of intelligence regarding processing of line data, such as line control equipment and communication control equipment, are placed on the line side, and this allows processing for the line to be carried out one by one. Efforts are being made to reduce the load on the lines. If such technology were adopted in the above-mentioned unit, the device would become larger and more expensive, so it has been considered to reduce the number of functions and use lower-priced parts.

<Disadvantages of the Prior Art> In general, the above-mentioned units include items that need to be handled urgently by the terminal device, and items that need to be urgently notified to the main unit on the opposite side connected to the line. However, when the above-mentioned method is adopted, although some improvement can be seen for urgent processing, it has drawbacks such as the inability to transmit data immediately and at high speed.

<Objective> The object of the present invention is to improve the above drawbacks,
It is an object of the present invention to provide a line control system that can efficiently utilize a line control device, reduce the load on the line of a main processing unit, and also enable emergency processing and emergency transmission.

<Key Points> In order to achieve the above object, the present invention provides two systems for transmitting and receiving signals to and from the line, and distributes the load on the main processing unit using one line control device, and distributes the load on the main processing unit on the other side. The system is designed to enable direct access, and this can be switched as appropriate.

<Embodiment> The drawing is a block diagram of an embodiment of the present invention.
In the figure, T# ₀ to _#o are mechanical units, each of which corresponds to the above-mentioned terminal equipment, and MT is a main body control device that controls the operation of the mechanical units T# ₀ to _#o . Each unit is controlled in a predetermined sequence to carry out transaction processing.

The details of the card reader unit T# ₀ , which reads data from a magnetic card, will be explained with reference to the same figure.

Also, in Unit T # ₀ , MKU is the mechanism department, MCD
is a main processing unit, LCD is a line control device (hereinafter referred to as a line controller), SW is a switching means (hereinafter referred to as a switch), and L is an internal line (hereinafter simply referred to as a line).

The mechanical section includes a roller R for feeding the inserted magnetic card C, a motor M for rotating the roller R, a magnetic head H for reading magnetic data in the magnetic card C,
It has a sensor S that detects the running state of the card C. In the line control device LCD, SC is a slave CPU that operates according to the program stored in the memory SM, and LC2 is a line control circuit (hereinafter referred to as line controller) that transfers data from the line L via the switch SW. Processing to convert serial data into parallel data, and slave
A device that converts data passed in parallel from the CPU and SC into serial data and sends it out, IF1,
IF5 is an interface. Furthermore, in the main processing unit MCD, MPU is a master processing unit, LC1 is a line controller, and LC
Those with the same functions as 2, MM is main memory,
MC is a master CPU that controls the operation of each mechanism in the mechanism section MK described above and the line control device LCD according to the program stored in the memory MM, and also controls the transmission of data to the line L. The line controller is the same as the line controller LC2, DMA is a direct memory access control device (hereinafter referred to as DMA controller), and IF0, IF2, IF3, and IF4 are interface circuits (hereinafter referred to as interface).

The operation of this device will be explained below by taking a transaction using a magnetic card C as an example. Until a transaction is started, the main body control unit MT sends a polling signal to each unit. On the other hand, the switch SW in unit T# ₀ uses line L as the main processing unit during this period.
Connected to the MCD side. Therefore, this polling signal is supplied to the main processing unit MCD. The line controller LC1 converts the received serial data into parallel data and converts it to the DMA controller.
This data is written to the memory MM via DMA and the main CPU/MC is notified of this. Main
The CPU/MC reads the data written in the main memory MM and determines whether it is addressed to its own unit T# ₀ .
Based on this determination, if the polling signal is addressed to another unit, no action is taken. Own unit T# ₀
If it is a polling signal directed to the destination, since there is no data to be sent within the self-unit T# ₀ at this point, it operates to return the negative response data previously stored in the main memory MM. That is, the address where the negative response data is stored is notified to the DMA controller DMA, and the DMA controller
Start DMA. As a result, the DMA controller DMA accesses the specified address and reads out the negative response data from the line controller.
Supply to LC1. The line controller LC1 adds a predetermined code, for example a synchronization code, to this data and supplies it to the line L via the switch circuit SW.
When a transaction is made with another unit, for example T# ₁ , such as a keyboard, and data is generated in this unit T# ₁ , the main body control section MT knows that data has been generated from the response data to the above-mentioned polling signal. Accordingly, the unit T#
₁ to send the generated data. Based on the sent data, the main body control unit MT
Processing the transaction, the card reader unit T# ₀
If the card reader is to be read by the card reader and the read data is to be used, an instruction is given to the line L to activate the card reader. This instruction is notified to the master main processing unit MPU via the switch SW and line controller LC1 in the same manner as described above. The master processing unit MPU determines this instruction and sends it to the line control unit LCD via interface IF5.
, and the switch SW sends a switching instruction signal via the interface IF0 to connect the line to the line controller LC2. As a result, the line control device LCD comes under the control of the main body control section MT. In addition, the master processing unit MPU is
Connect the motor M of the mechanical unit MKU to the interface IF.
Start via 2. This causes the motor M to operate and rotate the roller R in the direction in which the card C, when inserted, is taken into the device and transferred. Thus, when the operator inserts the card C into the insertion slot provided on the operation surface of the mechanism unit MKU, the inserted card C is fed into the device. While the card C is being transferred, every time the edge of the card passes each sensor s, a pulse signal is extracted from the detection signal of the sensor s at the interface IF4, and this is the main signal.
CPU/MC will be notified. For example, master
When the CPU/MC knows from a single pulse from interface IF4 that the card C end has come just before head H, it uses the DMA controller DMA to
Head H obtained from interface IF3
Reproduction data of the signal read by (read data is made parallel by interface IF3)
is controlled to be stored in a specific address space of memory MM. Note that during this period, ie, the period when one piece of reproduction data is transferred to the memory, the master CPU/MC prohibits the signal from the interface IF4 from being output to the bus within the master processing unit MPU. That is, the bus is used for time division. Master
The CPU/MC monitors the completion of the card C passing under the head H by using the output of the sensor s, that is, the interface.
This is determined by monitoring the output of IF4. When all the recorded data on the card is read and the read data is stored in the main memory MM, the master
The CPU/MC stops the motor M via the interface IF2, and also displays the line control device LCD.
It is notified that the read data is ready in the memory MM.

On the other hand, the line control unit LCD is controlled by the master processing unit from the time it is placed under the control of the main body control unit MT.
It operates in parallel with the MPU to act as the master processing unit MPU.

That is, after giving a start instruction to unit T # ₀ , the main body control section MT sends a display instruction to another unit, for example, if unit T # ₁ is a display unit, then this display unit T # ₁ is given a start instruction. Processing or processing of sending polling signals to each unit T# ₀ to T# _o is performed. On the other hand, unit T # ₀ performs processing to determine whether the display instruction or polling signal is directed to itself, and if the polling signal is directed to itself, it sends out a negative response signal in response. It is necessary to perform the following processing.

Therefore, the line control device LCD, which is under the control of the main body control section MT, has this function and performs it accordingly.
In other words, slave CPU/SC is line controller LC
Take the data supplied from 2 into the memory SM,
This is decoded to determine whether or not the data is addressed to the self, and if the data is addressed to the self, it is determined what the data means and whether it requires a response. If the data is self-directed and polling data requires a response,
The slave CPU retrieves the corresponding response data from the memory SM and transfers the retrieved response data to the line controller in the same way as the master CPU/MPU operates.
Set to LC2. Line controller LC2 sends the set response data to line L via switch SW.

As described above, the master CPU/MC notifies the slave CPU/SC via the interface IF5 that the operation instructed by the main body control unit MT has been completed. At this time, during the period when data is being sent from the main body control unit MT, the slave CPU/SC performs reception processing, determination processing, and response processing for this data (in this case, after sending a negative response to line L) A switching signal is not sent to the switch SW until the switch SW is completed, but if it is an idle period, the switch SW is restored via the interface IF1. still,
The following is an example of a modification of the switching timing of the switch SW. In other words, if a polling signal addressed to itself has just arrived and the device is preparing to send a response to it, in this case a negative response, if the master processing unit MPU has notified that processing has been completed, then , an acknowledgment indicating that data is available may be sent from the line control device LCD. Alternatively, first switch the switch SW to the master processing unit MPU side, and then switch the interface IF
5, the master processing unit MPU may be notified that it is time to return an acknowledgment.
However, if the line L is an extremely high-speed line, the above embodiment is more suitable than the modified example from the viewpoint of the processing efficiency of the main body control unit MT side or the entire apparatus. When the switch SW is changed over, the line control device LCD is separated from the control of the main body control unit MT, and the master processing unit MPU is placed under its control instead. The data stored in the memory MM is transferred from the master processing unit MPU to the main body control unit MT in the following procedure. That is, a polling signal addressed to unit T# ₀ is sent from main body control section MT. As a result, the master processing unit MPU returns an acknowledgment that data to be sent corresponding to the previous instruction exists in the memory MM. The main body control unit MT sends a signal to unit T# ₀ indicating that it has received this response, and
Thereafter, a command to transfer data is sent to unit T# ₀ . Master processing unit MPU
starts the DMA controller DMA after specifying the read start address, read data amount, and read destination address to the DMA controller DMA.
Note that the read destination address in this case refers to the line controller LC1. DMA controller
The DMA starts its operation, reads data from the specified read start address of the memory MM, transfers the data to the line controller LC1, and sequentially changes the read address until the amount corresponds to the specified amount. Repeat this process while updating.
Furthermore, the line controller LC1 sends the parallel data received from the DMA controller DMA to the line via the switch SW as serial data. In the above embodiment, only the card reader unit has been described, but other units may also be controlled in the same way.

For example, a dot printer that can print kanji data performs processing to print the print data sent from the main body control unit MT, but the printing process involves extracting a character pattern from the print data and correspondingly The process of selecting the dot creation means to be driven (for example, a dot pin driver), the process of scanning the dot print head on the printing medium at a constant speed, the process of paper feed such as line feed, and many other complex processes. Requires processing. Moreover, on the one hand, similar to the above-mentioned card reader unit, if a polling signal is supplied to the high-speed line, a process is performed to return a negative or positive response;
When a printing request is received from the main body control unit MT, processing is required to return a response indicating whether or not printing is in progress.

Therefore, if the idea of the present invention is applied to this printer, the process of controlling and driving the printing mechanism and the response process to the line are assigned to the master processing unit (processing device), and various responses are sent to the line control device. Assign a process for returning the file. As a result, the load on the master processing unit MPU can be reduced, each mechanism can operate at high speed, and response processing can also be performed at high speed. Moreover, it is possible to notify when the operation of the mechanism has finished without going through the line control device. Since the response is sent back, it is possible to quickly respond to the main body control unit MT.

Furthermore, although the above line L has been explained as if one line was used for both transmission and reception, it is also possible to arrange two lines between each unit and the main body control unit MT like a so-called full duplex line. good. Furthermore, although each unit T# ₀ has been described as a card reader, it may also be a unit that processes other data recording media such as a bankbook with a magnetic stripe.

<Effects> As explained above, according to the present invention, the following effects can be achieved.

A response signal to a call from the line can be returned in a short time regardless of whether the device is in operation or not, and the device or the entire system can operate at high speed. This is because the response processing is the same whether it is performed by the processing device or the line control device, and the sending path is also the same type of line controller or line.

Since the processing device concentrates on controlling the operation according to the operation instruction from the line, the time from the timing of the instruction to the completion of the operation can be shortened.

The line control device does not need to be large, as it is sufficient to have at least the function of responding to calls from the line.

[Brief explanation of the drawing]

The drawing is a block diagram of one embodiment of the invention. In the figure, MT is the main unit control unit, T# ₀ to T# _o are units, SW is a switch, LCD is a line control device,
MCD is the main processing unit and MKU is the mechanical unit.

Claims (1)

[Scope of Claims] 1. A main processing unit that processes data received from the line and outputs operation instructions to connected equipment; and A main processing unit that processes data received from the line and outputs operation instructions to the connected equipment; a main processing unit having: a data transfer means for directly transferring data to the line when data is generated; an interface unit connected to the main processing unit for sending and receiving data; and a line data transfer procedure for the line. a sub-processing unit that generates a response signal in response to the received data; , switching means for connecting one of the devices to the line, and the main processing device selects the line control device by outputting a switching instruction to the switching means when starting control of the device. , when the main processing unit ends the control of the device, it notifies the line control device of the end of the control via the interface unit, and after receiving the control end notification, the line control device performs the switching. A line control system characterized in that the main processing device is selected by outputting a switching instruction to the switching means, and one of the devices selected by the switching means is used to send and receive data to and from the line.