JPS6410097B2 - - Google Patents
Info
- Publication number
- JPS6410097B2 JPS6410097B2 JP6956181A JP6956181A JPS6410097B2 JP S6410097 B2 JPS6410097 B2 JP S6410097B2 JP 6956181 A JP6956181 A JP 6956181A JP 6956181 A JP6956181 A JP 6956181A JP S6410097 B2 JPS6410097 B2 JP S6410097B2
- Authority
- JP
- Japan
- Prior art keywords
- whiskers
- film
- wiring
- depth
- impurities
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 claims description 21
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 239000004065 semiconductor Substances 0.000 claims description 18
- 238000004519 manufacturing process Methods 0.000 claims description 6
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 2
- 229910052786 argon Inorganic materials 0.000 claims description 2
- 229910052785 arsenic Inorganic materials 0.000 claims description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 2
- 229910052698 phosphorus Inorganic materials 0.000 claims description 2
- 239000011574 phosphorus Substances 0.000 claims description 2
- 239000012535 impurity Substances 0.000 description 17
- 150000002500 ions Chemical class 0.000 description 10
- 235000012431 wafers Nutrition 0.000 description 9
- 238000005468 ion implantation Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 5
- 238000004544 sputter deposition Methods 0.000 description 4
- 238000007740 vapor deposition Methods 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000005247 gettering Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
【発明の詳細な説明】
本発明はデバイスを含む半導体ウエハ上に形成
された多層配線を有する半導体装置の製造方法に
関し、特にアルミニウム(Al)またはアルミニ
ウムを母材とする合金よりなる金属配線の加工時
に生じるホイスカ(whisker)の発生による配線
間のシヨートを防止した半導体装置の金属配線の
製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device having multilayer wiring formed on a semiconductor wafer including a device, and in particular to a method for manufacturing a metal wiring made of aluminum (Al) or an aluminum-based alloy. The present invention relates to a method for manufacturing metal interconnects for semiconductor devices that prevents shorts between interconnects due to the occurrence of whiskers.
一般にLSIなどの半導体装置においては、高密
度化をはかることが集積度の向上,低消費電力化
等に必要になり、配線間隔の縮小が要求される一
方、多層配線も有効な方法として知られている。
この配線用金属上に従来からAlが主に用いられ
てきたが、これは、酸化シリコンなどの絶縁膜に
対し密着性がよく機械的にも強固な配線が得られ
ること、容易に蒸着や膜厚の制御も可能なこと,
電気的伝導度が高く配線の低抵抗化がはかれるこ
となどによる。このAl蒸着法としては、たとえ
ば抵抗加熱によるAl蒸着法,電子ビームでAlを
溶かして蒸着するE−ガン法やArのスパツタリ
ングによるスパツタ蒸着法などがあるが、抵抗加
熱法はたとえばW,Ta等からなるフイラメント
にAlの線を乗せ、フイラメントを加熱すること
によりAlを溶かし蒸気として真空中で蒸着する
方法である。この方法ではAlそのものの純度よ
りもW,Taフイラメントそのものの方が純度が
悪く、Al蒸着膜中に種々の不純物が混入するの
が常であつた。また、E−ガン法はルツボ中の
Alを電子ビームで溶かすことによつて真空中で
Al蒸気を溶かすものであるが、ルツボの材質も
一般に高純度のものは少なかつた。このように、
抵抗加熱やE−ガン法による蒸着方法ではAl膜
中の不純物の存在が大きいため、ホイスカが発生
することはなかつた。 In general, in semiconductor devices such as LSIs, increasing density is necessary to improve integration and reduce power consumption, and while reducing wiring spacing is required, multilayer wiring is also known as an effective method. ing.
Conventionally, Al has been mainly used on this wiring metal, but this material has good adhesion to insulating films such as silicon oxide, provides mechanically strong wiring, and is easy to vapor-deposit and film. It is also possible to control the thickness.
This is due to the high electrical conductivity and low resistance of wiring. This Al vapor deposition method includes, for example, an Al vapor deposition method using resistance heating, an E-gun method that melts Al with an electron beam, and a sputter vapor deposition method that uses Ar sputtering. In this method, an Al wire is placed on a filament made of aluminum, and the filament is heated to melt the Al and vaporize it in a vacuum. In this method, the purity of the W and Ta filaments themselves is poorer than that of Al itself, and various impurities usually mix into the Al deposited film. In addition, the E-gun method uses
In a vacuum by melting Al with an electron beam
Although it is used to melt Al vapor, the material of the crucible is generally not of high purity. in this way,
In the vapor deposition method using resistance heating or the E-gun method, whiskers were not generated because the presence of impurities in the Al film was large.
ところで、最近では上述したようにフイラメン
トそのものに含まれる不純物や,ルツボ中に含ま
れる不純物による半導体デバイスへの悪影響を避
けるために、Ar等のスパツタリングによるスパ
ツタ蒸着法により形成された純度の高いAl膜が
配線用として用いられるようになつてきた。この
Al膜では半導体デバイスに与える影響は少なく
なつたが、Al膜が高純度になるに伴つてホイス
カの発生が新たな問題となつてきた。このホイス
カは配線加工ならびにそれ以降のウエハプロセス
時に繰り返される圧縮(compression)と膨張
(tension)のヒートサイクルによつて発生しやす
くなるとともに、Alに限らず金属が高純度にな
るにしたがつてホイスカが発生しやすくなること
はよく知られている。したがつて、LSIなどの半
導体装置のように,集積度が増加して配線間隔が
縮小化されて高密度配線になると、金属配線に生
じるホイスカによつて半導体装置に重大な影響を
与えることになる。たとえばLSIの多層配線に高
純度のAlを用いた場合、加工時に2〜10μmのホ
イスカが発生したとすると、Al配線間隔が2μm
〜3μm,一層二層目配線間の絶縁膜が1〜2μm
であることからみて、上記ホイスカの発生によつ
てAl層間シヨートが発生し、デバイスの歩留り
を下げるばかりでなく、信頼性も低下させるとい
う問題があつた。 By the way, as mentioned above, in order to avoid adverse effects on semiconductor devices due to impurities contained in the filament itself or impurities contained in the crucible, high-purity Al films formed by sputter deposition using sputtering of Ar, etc. have recently become available. has come to be used for wiring. this
Al films have less of an effect on semiconductor devices, but as the purity of Al films has increased, the generation of whiskers has become a new problem. These whiskers are more likely to occur due to the heat cycle of compression and expansion that is repeated during wiring processing and subsequent wafer processing, and as metals, not just Al, become highly purified, whiskers become more likely to occur. It is well known that this is more likely to occur. Therefore, as the degree of integration increases and the wiring spacing is reduced, resulting in high-density wiring, such as in semiconductor devices such as LSIs, whiskers that occur in metal wiring can have a serious impact on semiconductor devices. Become. For example, if high-purity Al is used for multilayer wiring of LSI, and whiskers of 2 to 10 μm are generated during processing, the Al wiring spacing is 2 μm.
~3μm, insulation film between first layer and second layer wiring is 1~2μm
In view of this, there was a problem in that the generation of whiskers causes shortening between Al layers, which not only lowers the yield of devices but also lowers reliability.
本発明は上記のような従来の欠点を除去するた
めになされたもので、その目的はAlなどの金属
配線の加工時に生じるホイスカの発生による配線
間のシヨートを防止した半導体装置における金属
配線の製造方法を提供することにある。 The present invention has been made in order to eliminate the above-mentioned conventional drawbacks, and its purpose is to manufacture metal interconnects in semiconductor devices that prevent shorts between interconnects due to the generation of whiskers during processing of metal interconnects such as Al. The purpose is to provide a method.
この目的を達成するために、本発明は、デバイ
スを含む半導体ウエハ上に形成されたAlなどの
金属配線にリン(P+),砒素(As+),アルゴン
(Ar+),アンチモン(Sb+)などの不純物つまり
質量にして30以上を持つイオン種を該金属配線の
表面からほぼ800〜2000Åの深さにイオン注入す
ることにより、加工時に金属配線に発生したホイ
スカを除去するようにしたものである。この場
合、不純物のイオン注入に際しては通常の技術で
比較的容易に行なうことができ、この不純物のう
ちP+,As+,Sb+は半導体のPN接合を形成する
ために用いられるイオン種であり、またAr+もゲ
ツタリングに用いられるイオン種である。 To achieve this objective, the present invention injects phosphorus (P + ), arsenic (As + ), argon (Ar + ), and antimony (Sb + ) into metal interconnects such as Al formed on semiconductor wafers containing devices. ) and other impurities, i.e. ion species with a mass of 30 or more, are ion-implanted to a depth of approximately 800 to 2000 Å from the surface of the metal wiring to remove whiskers generated in the metal wiring during processing. It is. In this case, ion implantation of impurities can be performed relatively easily using normal techniques, and among these impurities, P + , As + , and Sb + are ion species used to form PN junctions in semiconductors. , Ar + is also an ionic species used for gettering.
以下、本発明の実施例を説明する。 Examples of the present invention will be described below.
第1図は本発明の一実施例を示す概略説明図で
あり、同図において、10はPN接合を有するデ
バイスを含むSiウエハ、11はSiウエハ10上に
形成されたSiO2膜、12はこのSiO2膜11上に
スパツタ蒸着により形成された約7000Åの膜厚を
有する金属配線としての高純度のAl膜であり、
この実施例ではAl膜12に対しP+,Ar+,As+な
どの不純物をその表面からほぼ800〜2000Åの範
囲にイオン注入することにより、配線加工時に
Al膜12に発生したホイスカを除去することが
できる。 FIG. 1 is a schematic explanatory diagram showing one embodiment of the present invention, in which 10 is a Si wafer including a device having a PN junction, 11 is an SiO 2 film formed on the Si wafer 10, and 12 is an Si wafer including a device having a PN junction. A high-purity Al film as a metal wiring is formed on this SiO 2 film 11 by sputter deposition and has a film thickness of about 7000 Å.
In this example, impurities such as P + , Ar + , and As + are ion-implanted into the Al film 12 within a range of approximately 800 to 2000 Å from the surface of the Al film 12.
Whiskers generated on the Al film 12 can be removed.
第2図は上記実施例の効果を確認するための実
験結果の一例を示すもので、本発明は、第1図に
示す構造のサンプルを300℃−25℃間でヒートサ
イクルを繰り返すことによりAl膜にホイスカを
発生させ、このホイスカの発生密度とAl膜中に
イオン注入したAs+,P+などの不純物深さの対応
を調べることにより、極めて有効にホイスカを防
ぐ不純物深さを得たことに基くものである。すな
わち、第2図に示すように、P+,Ar+,As+は共
によく似た関係にあり、第2図の符号イで示すほ
ぼ800〜2000Åの深さにイオン注入するとホイス
カの発生はなくなる。たとえばP+の場合、Al膜
12の表面から第2図の符号ロで示す0.01μm程
度のイオン注入を行つたときにはホイスカが発生
した。また、B+の場合、注入エネルギー
150KeV,注入量4×1015cm-2の条件でイオン注
入を行うと、Al膜12の膜厚7000Åの表面から
第2図の符号ハで示す4500ÅのところにB+が注
入される。しかしながらこの領域ではホイスカは
発生した。このことから、ホイスカの発生を防止
するにはAl膜12の表面から第2図の符号イで
示す800〜2000Åのホイスカ発生源に不純物をイ
オン注入することが好ましいといえる。 FIG. 2 shows an example of experimental results for confirming the effects of the above-mentioned embodiment. In the present invention, the sample having the structure shown in FIG. By generating whiskers in the film and investigating the correspondence between the whisker generation density and the depth of impurities such as As + and P + ion-implanted into the Al film, we were able to obtain an impurity depth that extremely effectively prevents whiskers. It is based on In other words, as shown in Fig. 2, P + , Ar + , and As + have a very similar relationship, and when ions are implanted to a depth of approximately 800 to 2000 Å, which is indicated by the symbol A in Fig. 2, the generation of whiskers is eliminated. It disappears. For example, in the case of P + , whiskers were generated when ions were implanted to a depth of about 0.01 μm from the surface of the Al film 12, as indicated by the symbol B in FIG. Also, for B + , the injection energy
When ion implantation is performed under the conditions of 150 KeV and an implantation amount of 4×10 15 cm −2 , B + is implanted at a position of 4500 Å from the 7000 Å thick surface of the Al film 12 as indicated by the symbol C in FIG. However, whiskers did occur in this area. From this, it can be said that in order to prevent the generation of whiskers, it is preferable to implant impurity ions into the whisker generation source at a distance of 800 to 2000 Å from the surface of the Al film 12 as indicated by the symbol A in FIG.
また、As+,P+以外の不純物としてAr+,Sb+
をイオン注入したところ同様の効果が得られるこ
とが分つた。このとき同一条件でイオン注入する
と、H+の場合第2図の符号ニで示すように、Al
膜12をはるかに通過してしまうが、この符号ニ
の領域ではホイスカは発生した。なお、第2図に
おいて、横軸は不純物イオンを,縦軸は第1図の
サンプルに対するAl膜中に注入されるイオンの
投影飛程(Rp)をそれぞれ示し、また符号Rpお
よびσは各不純物イオンの投影飛程,標準偏差の
数値を示している。 In addition, Ar + and Sb + are impurities other than As + and P + .
It was found that a similar effect could be obtained by ion implantation. At this time, if ions are implanted under the same conditions, in the case of H + , Al
Although the light passed far through the membrane 12, whiskers were generated in this region of code D. In Fig. 2, the horizontal axis shows impurity ions, and the vertical axis shows the projected range (R p ) of ions implanted into the Al film for the sample in Fig. 1, and the symbols R p and σ are The projected range and standard deviation of each impurity ion are shown.
なお、Al膜の抵抗値をほぼそのままにするた
めには0.5%近くの不純物におさえておくことが
好ましい。しかも0.5%以上の不純物を800〜2000
Åの深さにイオン注入することがホイスカ防止の
最もよい条件である。 Note that in order to maintain the resistance value of the Al film almost as it is, it is preferable to keep the impurity to about 0.5%. Moreover, it contains 800 to 2000 impurities of 0.5% or more.
Ion implantation to a depth of Å is the best condition for whisker prevention.
これらの不純物をAl膜に導入することにより
ホイスカが発生しにくくなることは簡単に説明し
きれないが、ホイスカ発生源を,Al膜に対し不
純物をその表面からほぼ800〜2000Åの深さに導
入することによつて除去させているということが
できる。 It cannot be easily explained that whiskers are less likely to occur by introducing these impurities into the Al film, but it is possible to introduce the whisker generation source into the Al film at a depth of approximately 800 to 2000 Å from the surface. It can be said that it is removed by doing so.
従来では、スパツタ蒸着によるAl膜に対する
ホイスカの防止手段としてはたとえばAl膜の配
線加工時に低温化プロセスをとるか、あるいはヒ
ートサイクルを少くする等の方法で回避せんとす
るものであつたが、上記実施例によると、一般に
半導体加工に用いられるウエハプロセスの配線工
程以降の温度約180〜500℃のプロセスにおいては
ヒートサイクルが数回起つても問題がないことが
確認された。このことは半導体加工装置の制限を
ゆるめ、装置選択の範囲を広げることを示してい
る。 Conventionally, measures to prevent whiskers on Al films formed by sputter evaporation have been aimed at, for example, by using a low temperature process during wiring processing of Al films, or by reducing heat cycles. According to the example, it was confirmed that there is no problem even if heat cycles occur several times in a process at a temperature of about 180 to 500° C. after the wiring step in a wafer process generally used for semiconductor processing. This indicates that the restrictions on semiconductor processing equipment will be relaxed and the range of equipment selection will be expanded.
なお、上記実施例ではAlの場合について示し
たが、今後,配線材料として有望なMo,W等が
高純度で用いられるときに発生するであろう同種
のホイスカの発生に対しても有効な手段であろう
ことは容易に推察される。 Although the above example shows the case of Al, this method is also effective against the generation of the same kind of whiskers that will occur when Mo, W, etc., which are promising wiring materials, are used in high purity in the future. It is easy to infer that this is the case.
また、追記すべきことはH+,B+の注入でホイ
スカの密度はイオン注入前のものにくらべ約半分
程度に減少することが上げられる。しかし、第2
図に示すようにイオン注入が深すぎるとホイスカ
を全く発生させないということはできない。 Additionally, it should be noted that by implanting H + and B + , the whisker density is reduced to about half of that before ion implantation. However, the second
As shown in the figure, if the ion implantation is too deep, whiskers cannot be completely eliminated.
以上説明したように、本発明によれば、デバイ
スを含む半導体ウエハ上に形成されたAlなどの
金属配線に、該金属配線に対して0.5%以上の濃
度になるべく質量にして30以上を有するP+,As+
などのイオン種を該金属配線の表面からほぼ800
〜2000Åの深さにイオン注入することにより、加
工時に金属配線に発生したホイスカを除去するこ
とができるので、配線間のシヨートを防止するこ
とができるとともに、配線抵抗を変えることなく
良好な金属配線を得ることができ、したがつて、
半導体装置の歩留り,信頼性の向上をはかること
ができる効果がある。 As explained above, according to the present invention, a metal wiring such as Al formed on a semiconductor wafer including a device has a concentration of 30 or more by mass as much as 0.5% or more with respect to the metal wiring. + ,As +
approximately 800% of ionic species such as
By implanting ions to a depth of ~2000 Å, it is possible to remove whiskers that occur in metal wiring during processing, which prevents shorts between wiring and improves the quality of metal wiring without changing wiring resistance. can be obtained, and therefore,
This has the effect of improving the yield and reliability of semiconductor devices.
第1図は本発明の一実施例を示す概略説明図、
第2図は上記実施例の実験結果の一例を示すホイ
スカの発生とイオン注入深さとの関係を示す図で
ある。
10……Siウエハ、11……SiO2膜、12…
…Al膜。
FIG. 1 is a schematic explanatory diagram showing an embodiment of the present invention;
FIG. 2 is a diagram illustrating the relationship between whisker generation and ion implantation depth, showing an example of the experimental results of the above embodiment. 10...Si wafer, 11...SiO 2 film, 12...
...Al film.
Claims (1)
アルミニウムなどからなる高純度の金属配線を有
する半導体装置の製造方法において、前記金属配
線に対して、アルゴン、リン、砒素などの質量に
して30以上を持つイオン種を該金属配線の表面か
らほぼ800〜2000Åの深さにかつ0.5%以上にイオ
ン注入する工程を具備することを特徴とする半導
体装置の製造方法。1. In a method for manufacturing a semiconductor device having a high-purity metal wiring made of aluminum or the like formed on a semiconductor wafer including a device, the metal wiring has a mass of argon, phosphorus, arsenic, etc. of 30 or more. 1. A method for manufacturing a semiconductor device, comprising the step of implanting ion species to a depth of approximately 800 to 2000 Å from the surface of the metal interconnection to a depth of 0.5% or more.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6956181A JPS57183053A (en) | 1981-05-06 | 1981-05-06 | Semiconductor device |
DE19823217026 DE3217026A1 (en) | 1981-05-06 | 1982-05-06 | Semiconductor device |
US06/717,597 US4899206A (en) | 1981-05-06 | 1985-04-01 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6956181A JPS57183053A (en) | 1981-05-06 | 1981-05-06 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57183053A JPS57183053A (en) | 1982-11-11 |
JPS6410097B2 true JPS6410097B2 (en) | 1989-02-21 |
Family
ID=13406285
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6956181A Granted JPS57183053A (en) | 1981-05-06 | 1981-05-06 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57183053A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4890151A (en) * | 1983-03-12 | 1989-12-26 | Ricoh Company, Ltd. | Thin-film and its forming method |
JPH07120655B2 (en) * | 1988-10-25 | 1995-12-20 | 三菱電機株式会社 | Semiconductor device and manufacturing method thereof |
US7157381B2 (en) * | 2004-06-15 | 2007-01-02 | Infineon Technologies Ag | Method for providing whisker-free aluminum metal lines or aluminum alloy lines in integrated circuits |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55158649A (en) * | 1979-05-30 | 1980-12-10 | Fujitsu Ltd | Manufacture of electrode wiring |
JPS57124431A (en) * | 1981-01-27 | 1982-08-03 | Toshiba Corp | Manufacture of semiconductor device |
-
1981
- 1981-05-06 JP JP6956181A patent/JPS57183053A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS57183053A (en) | 1982-11-11 |
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