JPS6399546A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reliability of wiring and to make it possible to form an multilayer interconnection, when a metallic wiring layer is formed on a substrate having contact holes and steps, by heating and fusing the metallic wiring layer, which is deposited and formed on the substrate. CONSTITUTION:The surface of a substrate 10 is cleaned with diluted fuoric acid and the like. Then a titanium nitride (TiN) film 70 having a thickness of 0.1 mum is deposited and formed by a sputtering method using Argon (Ar). Then, an Al film 80 having a thickness of 1mum is deposited on the TiN film 70 by a sputtering method using the same Ar. At the depositing and forming step of the Al film 80, the thickness of the Al film is very thin in contact holes 40 and 50. The thickness at a step part 60 is considerably thin. Said Al film undergoes heat treatment so that it is fused and made to flow. Then the insides of the contact holes are completely filled with the Al and the step part is eliminated. The flatness of the Al film 80 is strikingly improved. Thus wire breakdown is prevented, and the increase in electric resistance can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to highly integrated semiconductor circuits, and particularly to a metal wiring method suitable for electrically connecting a plurality of elements arranged at high density.

[Conventional technology]

Conventionally, An has been used as a metal thin film for wiring in semiconductor devices.
Membranes are commonly used. In addition, as a method for forming it, in the past, methods such as heater heating evaporation method and electron beam heating evaporation method have been used, but recently sputtering method has come to be used. Unlike the vapor phase growth method, these methods do not involve chemical reactions on the substrate surface during film formation, and
Film formation occurs only by the simple deposition of atoms. Therefore, there is a characteristic that the covering condition is extremely poor at the stepped portions previously formed on the substrate. On the other hand, semiconductor devices are becoming more highly integrated and densely packed, and the steps on the substrate surface before the M wiring film is formed are becoming more complex and taller.

[Problem that the invention seeks to solve]

With the conventional wiring technology mentioned above, the coverage of the stepped portions on the substrate is poor, and the film thickness is thinner at the stepped portions, resulting in increased wiring resistance and, in severe cases, disconnection of the wiring itself due to increased current density. There was a problem. The problems caused by the poor coverage will be explained in more detail. FIG. 2(a) is a cross-sectional view schematically showing the state of a substrate before the AM wiring film formation step, which must be passed through when manufacturing a semiconductor device.

A conductor layer 1 having a predetermined shape is formed on a predetermined region on a thin insulating film 10 formed on a Si substrate 100, an insulating film 2 is further deposited on the entire surface, and a conductor layer 1 is formed on the insulating film 2. A state in which an opening for connection with a conductor layer, a so-called contact hole 3, is provided is shown. In this manner, contact holes 3 and steps 4 always exist in the manufacturing process of semiconductor devices. In this state, for example, Suba r, 5. When the wiring A1 layer 5 is formed by the method of forming the wiring layer 5, the thickness becomes extremely thin inside the contact hole 3 and at the bottom of the step 4, as shown in FIG. 2(b). When this M layer 5 is etched to form an Aα wiring layer and further Afl wiring layers are laminated in multiple layers by the same method with an insulating film interposed thereon, as shown in FIG.
A more fatal problem occurs as shown in c). That is, after forming the first layer of An wiring 5, an insulating film 6 is deposited, an opening for connecting the first and second wiring layers is formed in the insulating film 6, and an opening is formed on the insulating film 6 to connect the first and second wiring layers. Further, when the second AQ wiring layer 7 is formed, the continuity of the An wiring layer 7 is often broken at the one step difference 4 as shown in the figure, causing a problem of disconnection. The reason for this is that when the first M layer is formed on the stepped portion 4, the covering shape of the stepped portion becomes a so-called overhang state.

An object of the present invention is to completely fill the inside of the contact hole with the metal layer when forming a metal layer for wiring on a substrate with a contact hole or a step, and to improve the coverage of the metal layer at the step to cover the surface. The purpose is to flatten the wiring, improve the reliability of the wiring, and enable multilayer wiring.

[Means for solving problems]

The above object is achieved by heating and melting a wiring metal layer deposited on a substrate.

[Effect]

By heating a wiring metal layer, for example, a wiring part layer, at a temperature higher than its melting point, 1M melts by itself and becomes a liquid.

The liquid An flows to flatten its own surface due to the surface tension unique to liquids, so it fills the recesses.
The surface can be flattened.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 and 3.

FIG. 3(a) is a cross-sectional view showing the state of the substrate immediately before metal wiring is formed.

A 20 nm thick Si film is deposited on the Si substrate 100 by thermal oxidation.
.

After forming the film 10, it is grown to a thickness of 500 nm by a vapor phase growth method (CVD method) using monosilane (SiH4) as a raw material gas.
A polycrystalline Si layer 20 was deposited. Then, 875
The polycrystalline Si layer 2 was formed by a thermal diffusion method at ℃ for 30 minutes.
Phosphorus was introduced as an impurity into 0. After removing the phosphorus glass formed on the surface, a predetermined region of the polycrystalline Si layer 20 was etched and removed using photolithography and dry etching.

After removing the photoresist film used as a mask for this etching, a 5i film with a thickness of 600 nm was etched on the entire surface by CVD.
An N2 film 30 was deposited. Next, the polycrystalline Si layer 20 and S
The contact holes 40 and 50 leading to the i-board 100 are
i02IlI was formed. The contact hole 40 is for providing electrical continuity between the polycrystalline Si layer 20 and the metal wiring, and the contact hole 50 is for providing electrical continuity between the Si substrate 100 and the metal wiring. Further, in addition to the above-mentioned contact hole, a step 60 always exists on the surface of the 5un2 film 30. In the manufacturing process of semiconductor devices, it is impossible to avoid such a situation in which contact holes and steps coexist.

FIG. 3(b) is a cross-sectional view showing a state immediately after a wiring metal film is formed on the substrate shown in FIG. 3(a).

After cleaning the substrate surface with diluted hydrofluoric acid or the like, it is sputtered to a thickness of 0.0 mm using a sputtering method using argon (Ar).
A 17 ann titanium nitride (TiN) film 70 was deposited. The conditions are a mixed gas of Ar and N2 at a pressure of 0.13 Pa.
The power density applied between the electrodes is maintained at IOW/cm
A substrate was set at a position facing one electrode made of Ti. Then, by the same sputtering method using <Ar, Aa (1% by weight S
A film 80 (containing i) was formed on top of the TiN film 7. The conditions are A, r pressure 0.13 Pa, power density 3
The TiN film 70 was provided as a barrier layer to suppress thermal reactions between the outermost film 80, the polycrystalline Si layer 20, and the Si substrate 100. At the deposition stage 80, the Afl film thickness in the contact holes 40 and 50 was extremely thin, and it was also considerably thinner at the step 60. These facts were confirmed by observation using a scanning electron microscope. could be easily confirmed through.

FIG. 1 is a sectional view showing the state of the Aa film after it has been heat-treated to melt and flow in order to eliminate the thinned portion of the Aa film as described above.

The heat treatment was carried out at 620℃ for 30 minutes using a lamp as the heat source and a device that can evenly heat the entire sample to a specified temperature in a short period of time.
I did it for seconds. By simply carrying out this extremely simple heat treatment, the inside of the contact hole is completely filled with filler metal, and the level difference is also eliminated, and the flatness of the An film 80 is also significantly improved. It was possible to almost completely eliminate the unevenness of the surface.

In this example, the heat treatment was performed at 620° C., but control of the heat treatment temperature is extremely important in melting the Aa film in the present invention. That is, in the 1 wt % Si-containing An used in this example, it is difficult to melt it at temperatures below 575°C, while at temperatures higher than 625°C, regions where no crystals exist locally occur. . For example, when an M film deposited on the entire surface of a Si substrate with a diameter of 10 cm+ is heat treated at 700° C. for 30 seconds, M no longer exists in about half of the substrate surface. This is thought to be because the All-I inner membrane shrinks due to the surface tension unique to liquids.

Therefore, even if the heat treatment temperature is too high, it will lack practicality.

In addition, an increase in wiring resistance due to the growth of Si grains, which is often a problem with Si-containing M, was found in this example, when heat treatment was performed at 625° C. or lower, almost no growth of Si grains was observed.

Further, in this embodiment, a heat treatment apparatus using a lamp is used, but a similar effect can be obtained by using a tubular electric furnace, but controlling the heat treatment conditions becomes somewhat difficult. In short, the purpose is to perform heat treatment whose heating temperature and time can be easily controlled.

Further, in this example, the melting of M containing 1% by weight of Si was described, but the same effect was obtained for An containing at least one of Cu, Ti, and Ta. However, the melting point of M containing different elements changes depending on its composition, but the important thing is that excessive heat treatment will lead to extremely impractical results. It is heat treatment within a temperature range that is higher than ℃.

〔Effect of the invention〕

According to the present invention, it is possible to prevent thinning of wiring in contact holes and surface step portions that occur in the manufacturing process of semiconductor devices, thereby preventing disconnection of wiring and reducing increase in electrical resistance.

FIG. 3 is a cross-sectional view for explaining a problem.

In the figure, 100...Si substrate 2.6.10.30...Insulating film 1.20...Polycrystalline Si film 4.60...Step difference 5.7.80...An film 40. 50...Contact Hall Representative Patent Attorney Junnosuke Nakamura +00---5 bases 40.50
---Contour 2L main A (.

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device in which an electric circuit is constructed by interconnecting a plurality of predetermined elements using a predetermined metal wiring layer on the same silicon semiconductor substrate, the method comprising: A plurality of predetermined elements are formed on the substrate, an insulating film is deposited on the substrate including the elements, a contact hole communicating with a predetermined position on the element is provided in the insulating film, and the After forming a titanium nitride thin film on the entire surface of the insulating film and depositing a wiring metal layer on the entire surface of the titanium nitride thin film, the surface of the metal layer is flattened by heating and melting and flowing the metal layer, and then, A method of manufacturing a semiconductor device, comprising etching the metal layer and the titanium nitride thin film according to a predetermined wiring pattern to form at least a first layer of wiring. 2. In the method for manufacturing a semiconductor device according to claim 1, the metal constituting the metal layer is an aluminum alloy containing at least one metal selected from silicon, copper, titanium, and tantalum. . A method of manufacturing a semiconductor device, wherein the heating and melting temperature of the metal layer is within a range of from the melting point of the metal to a temperature 5° C. higher than the melting point.