JPS639943A - Thermometric method of semiconductor wafer - Google Patents
Thermometric method of semiconductor waferInfo
- Publication number
- JPS639943A JPS639943A JP15367886A JP15367886A JPS639943A JP S639943 A JPS639943 A JP S639943A JP 15367886 A JP15367886 A JP 15367886A JP 15367886 A JP15367886 A JP 15367886A JP S639943 A JPS639943 A JP S639943A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- temperature
- voltage
- electrodes
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 39
- 238000000034 method Methods 0.000 title claims description 7
- 238000004544 sputter deposition Methods 0.000 abstract description 7
- 229910052751 metal Inorganic materials 0.000 abstract description 6
- 239000002184 metal Substances 0.000 abstract description 6
- 229910052782 aluminium Inorganic materials 0.000 abstract description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 4
- 239000000758 substrate Substances 0.000 abstract description 4
- 235000012431 wafers Nutrition 0.000 description 23
- 238000010586 diagram Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
の１
この発明は半導体ウェーハの温度測定方法に関し、特に
、半導体ウェーハにスパッタによりアルミニウム等の金
属膜を被着形成する場合の半導体ウェーハの温度を測定
するのに有用なものである。[Detailed Description of the Invention] (1) The present invention relates to a method for measuring the temperature of a semiconductor wafer, and in particular, a method useful for measuring the temperature of a semiconductor wafer when a metal film such as aluminum is deposited on the semiconductor wafer by sputtering. It is something.
従速！ｕＬ１
半導体素子の配線等のために、半導体ウェーハにアルミ
ニウム等の金属をスパッタで被着形成することがあるが
、金属の被着強度等は半導体ウェーハの温度が高い程大
きい性質があり、一般に半導体ウェーハの下地加熱を実
施している。Follow the speed! uL1 Metals such as aluminum are sometimes deposited on semiconductor wafers by sputtering for wiring of semiconductor elements, etc., but the strength of the metal adhesion increases as the temperature of the semiconductor wafer increases, and generally semiconductors Wafer base heating is being carried out.
［１（’ ； 。占
ところが、スパッタ時の半導体ウェーハの温度を測定す
ることはきわめて困難であり、現状では特定の温度で色
が変化するヒートラベルまたはサーモラベル等を用いて
いる。しかしながら、このようなラベルでは、半導体ウ
ェーハが特定の温度に達したかどうかの判別はできても
、半導体ウェーハの実際温度を知ることができないため
、温度管理手段として不満足なものであった。[1('; .However, it is extremely difficult to measure the temperature of a semiconductor wafer during sputtering, and currently heat labels or thermolabels that change color at a specific temperature are used. However, this Although such a label can determine whether a semiconductor wafer has reached a specific temperature, it cannot know the actual temperature of the semiconductor wafer, and is thus unsatisfactory as a temperature control means.
口ｎ 占 ′ こ の ・そこで、こ
の発明は、−導電型領域上に反対導電型領域を形成した
半導体ウェーハの表裏両面に電極を接触させ、これら電
極間に定電流を流すとともに、電極間の電圧を測定して
、この電圧値から半導体ウェーハの温度を測定すること
を特徴とするものである。Therefore, this invention brings electrodes into contact with both the front and back sides of a semiconductor wafer in which an opposite conductivity type region is formed on a -conductivity type region, flows a constant current between these electrodes, and This method is characterized by measuring the voltage and measuring the temperature of the semiconductor wafer from this voltage value.
１皿
上記の構成にすれば、ＰＮ接合部の電圧が半導体ウェー
ハの温度によって変化することを利用して、半導体ウェ
ーハの温度を測定することが可能になる。With the above configuration, it becomes possible to measure the temperature of the semiconductor wafer by utilizing the fact that the voltage at the PN junction changes depending on the temperature of the semiconductor wafer.
灸五■
第１図はこの発明の一実施例の概略構成図を示す。図に
おいて、１は半導体ウェーハで、Ｐ型の半導体基板領域
２の上に、Ｎ−型のエピタキシャル成長領域３が形成さ
れており、第２図から明らかなように、結晶方位を示す
オリエンテーションフラット（０，Ｆ、）４の反対側の
非整形ペレットしか取れない部分にＮ 型領域５が形成
され露出させである。前記Ｐ型領域２の全面には正電極
６が接触させてあり、Ｎ“型領域５には負電極７が接触
させである。そして、これら両電極６．７間には定電流
電源８が接続されて、ＰＮ接合に順方向電流が流されて
いる。また、前記両電極６，７間には電圧計９が接続さ
れている。Moxibustion 5■ Figure 1 shows a schematic diagram of an embodiment of the present invention. In the figure, reference numeral 1 denotes a semiconductor wafer, in which an N-type epitaxial growth region 3 is formed on a P-type semiconductor substrate region 2, and as is clear from FIG. . A positive electrode 6 is in contact with the entire surface of the P-type region 2, and a negative electrode 7 is in contact with the N"-type region 5. A constant current power source 8 is connected between these electrodes 6 and 7. A forward current is caused to flow through the PN junction.A voltmeter 9 is connected between the two electrodes 6 and 7.
上記の構成においては、ＰＮ接合の電圧は温度依存性を
有し、例えば−２ｍｖ／”Ｃの電圧傾斜を有するので、
電圧計９の測定電圧値を前記電圧傾斜より温度値に換算
すれば、半導体ウェーハ１の温度を測定することができ
る。In the above configuration, the voltage of the PN junction has temperature dependence, and has a voltage slope of, for example, -2 mv/"C, so
The temperature of the semiconductor wafer 1 can be measured by converting the voltage value measured by the voltmeter 9 into a temperature value based on the voltage slope.
したがって、スパッタ時において、上記方法で半導体ウ
ェーハ１の温度を測定しながら、アルミニウム等の金属
をスパッタ形成できるので、半導体ウェーハ１の温度管
理を正確に行うことができる。Therefore, during sputtering, metal such as aluminum can be formed by sputtering while measuring the temperature of the semiconductor wafer 1 using the above method, so that the temperature of the semiconductor wafer 1 can be accurately controlled.
なお、上記実施例は、Ｐ型半導体基板領域２上にＮ−型
エピタキシャル成長領域３を形成した半導体ウェーハ１
について説明したが、他の構造の半導体ウェーハにも適
用できる。また、電圧計９の指示そのものを温度値に換
算しておいてもよいこともちろんである。Note that the above embodiment is a semiconductor wafer 1 in which an N-type epitaxial growth region 3 is formed on a P-type semiconductor substrate region 2.
Although the present invention has been described, it can also be applied to semiconductor wafers having other structures. Furthermore, it goes without saying that the reading from the voltmeter 9 itself may be converted into a temperature value.
発１Ｆ四塾里−
この発明によれば、半導体ウェーハの温度を正確に測定
することができるので、金属をスパッタする場合等の管
理をよりいっそう正確に実施できる。According to the present invention, it is possible to accurately measure the temperature of a semiconductor wafer, so management when sputtering metal, etc. can be performed even more accurately.
第１図はこの発明の一実施例の半導体ウェーハの温度測
定方法について説明するための概略構成図で、第２図は
半導体ウェーハの一例の平面図である。
１・・・・・・半導体ウェーハ、
２・・・・・・−導電型領域（Ｐ型半導体基板領域）、
３・・・・・・反対導電型領域
（Ｎ−型エピタキシャル成長領域）、
６．７・・・・・・電極、
８・・・・・・定電流電源、
９・・・・・・電圧計。
特 許 出 願 人 関西日本電気株式会社ｉ！２
図FIG. 1 is a schematic configuration diagram for explaining a method for measuring the temperature of a semiconductor wafer according to an embodiment of the present invention, and FIG. 2 is a plan view of an example of the semiconductor wafer. 1...Semiconductor wafer, 2...-conductivity type region (P-type semiconductor substrate region),
3... Opposite conductivity type region (N-type epitaxial growth region), 6.7... Electrode, 8... Constant current power supply, 9... Voltmeter . Patent applicant: Kansai NEC Corporation i! 2
figure
Claims (1)
ーハの表裏両面に電極を接触させ、これら電極間に定電
流を流すとともに、電極間の電圧を測定して、この電圧
値から半導体ウェーハの温度を測定することを特徴とす
る半導体ウェーハの温度測定方法。Electrodes are brought into contact with both the front and back sides of a semiconductor wafer, in which a region of one conductivity type is formed on a region of the opposite conductivity type, a constant current is passed between these electrodes, the voltage between the electrodes is measured, and from this voltage value the semiconductor wafer is A method for measuring temperature of a semiconductor wafer, characterized by measuring temperature.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15367886A JPS639943A (en) | 1986-06-30 | 1986-06-30 | Thermometric method of semiconductor wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15367886A JPS639943A (en) | 1986-06-30 | 1986-06-30 | Thermometric method of semiconductor wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS639943A true JPS639943A (en) | 1988-01-16 |
Family
ID=15567774
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15367886A Pending JPS639943A (en) | 1986-06-30 | 1986-06-30 | Thermometric method of semiconductor wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS639943A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107887287A (en) * | 2016-09-30 | 2018-04-06 | 中芯国际集成电路制造(上海)有限公司 | Method of testing |
-
1986
- 1986-06-30 JP JP15367886A patent/JPS639943A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107887287A (en) * | 2016-09-30 | 2018-04-06 | 中芯国际集成电路制造(上海)有限公司 | Method of testing |
| CN107887287B (en) * | 2016-09-30 | 2020-03-13 | 中芯国际集成电路制造(上海)有限公司 | Test method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4065374A (en) | Method and apparatus for plating under constant current density | |
| Bhatnagar et al. | Effect of surface inhomogeneities on the electrical characteristics of SiC Schottky contacts | |
| JPS61170618A (en) | Semiconductor sensor for detecting flow rate | |
| US5406841A (en) | Flow sensor | |
| CN105612427B (en) | Apparatus and method for accurately measuring and mapping forward and reverse bias current versus voltage characteristics of large area lateral P-N junctions | |
| US3351502A (en) | Method of producing interface-alloy epitaxial heterojunctions | |
| JPS639943A (en) | Thermometric method of semiconductor wafer | |
| Persky et al. | High‐Field Diffusivity of Electrons in Silicon | |
| Breitenstein et al. | Lock-in contact thermography investigation of lateral electronic inhomogeneities in semiconductor devices | |
| Tauc | The thermal photo-electric phenomenon in semi-conductors | |
| Tanner et al. | Novel electrical characterization of thin 3C-SiC films on Si substrates | |
| de Sousa Pires et al. | Measurements of the rectifying barrier heights of the various iridium silicides with n‐Si | |
| JPH0540064A (en) | Schottky junction temperature sensor | |
| Reislöhner et al. | Doping profiles in CdTe/CdS thin film solar cells | |
| EP1400804B1 (en) | Method and device for measuring thermoelectric characteristics of combinatorial specimen | |
| JPS61253842A (en) | Ic chip carrier | |
| Morris | Some device applications of spreading resistance measurements on epitaxial silicon | |
| JPS62139339A (en) | Temperature-measuring wafer | |
| Kim et al. | A planar bi-sb multijunction thermal converter with small ac-dc transfer differences | |
| Sareminia et al. | Characterization of photodiodes, made from a p-type epitaxial layer grown on n-type InSb< 1 1 1> by LPE method | |
| JPS63121763A (en) | Instrument for measuring characteristics of avalanche photodiode | |
| Reyna et al. | Determination of the origin of the series resistance through electroluminescence measurements of GaAs and AlxGa1− xAs solar cells and LEDs | |
| Isozumi et al. | A New Approach to Liquid Phase Electroepitaxy (LPEE) of III–V Compounds | |
| JPS62209855A (en) | Semiconductor element using silicon carbide | |
| JPH0290646A (en) | Semiconductor element for test |