JPS639429B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a solid-state imaging device.

Conventionally, solid-state imaging devices use photodiodes as light detection units, which are arranged in a matrix.
Furthermore, there is a type that combines field effect transistor circuits for XY scanning (hereinafter referred to as an XY matrix type; for example, Japanese Patent Publication No. 30768/1983). Recently, BBD and CCD (hereinafter referred to as charge transfer type) have been developed as self-scanning imaging devices with less spike noise associated with scanning pulses as seen in the XY matrix type. No. 26091 (1972). However, in both cases, the photodiode of the light detection section must be configured on the same substrate surface as the field effect transistor for XY scanning or the electrode section for charge transfer.
The light usage efficiency per unit area is at most 1/3
It was ~1/5.

In order to eliminate these drawbacks, a solid-state imaging device (for example, Japanese Patent Laid-Open No. 49-91116) and a charge transfer type have been developed in which a photoconductor has photosensitivity instead of a photodiode in the light detection section and is combined with an XY matrix type. Solid-state imaging device combined with
(No.) has been proposed, but in both cases the electrode on the photoconductor film was kept at a DC potential.

The present invention provides a solid-state imaging device configured as described above, which has a function of suppressing blooming by including a mechanism for applying a pulse voltage to an electrode on a photoconductor. .

A conventional device will be explained below with reference to the drawings.

FIG. 1 is an example showing a cross-sectional structure of one unit of a solid-state imaging device in which the circuit elements formed on a silicon substrate are of a charge transfer type. to the p-type semiconductor substrate 10
An n ⁺ type region 11 is formed and a diode is provided. 1
2 is a p ⁺ type region, and in the case of CCD operation, n ⁺ type region 1
1 is a potential barrier for blocking electron injection from 1, and 13 is an n ⁺ type region, which is a potential well for BBD operation, and needs to be installed only for CCD and BBD, respectively. Since CCD operation and BBD operation are basically the same charge transfer, the following is n ⁺ type region 1
The explanation will be given using the BBD operation described in 3. 14 is the first
It is a gate electrode and has an overlapping portion with the n ⁺ type region 11. 15 is an insulating film between the semiconductor substrate 10 and the first gate electrode 14, which is a gate oxide film. Reference numeral 15 denotes an insulating layer for electrically separating the first electrode 17 from the semiconductor substrate 10 and the first gate electrode 14 . 17 is the first electrode and n ⁺ type region 11
This serves as the electrode of the diode electrically connected to the hole blocking layer 18 as well as the electrode of the hole blocking layer 18 . 19
is a photoconductor made of (Zn _1-x Cd _x Te) _1-y (In ₂ Te ₃ ) _y , on which a transparent electrode 20 is formed, and a positive DC potential V _D is applied by a voltage source 21. is applied. However, this is not limited to a positive potential, and depending on the characteristics of the photoconductor, a negative potential may be applied.

The optical information reading operation of the structure of the conventional solid-state imaging device shown in FIG. 1 will be described.

FIGS. 2a and 2b show pulse waveform diagrams for driving this and potential changes at the first electrode 17.

At time _t1 , a voltage is applied to the first gate electrode 14.
When the V _CH pixel reading pulse is applied, electrode 1
The potential at 7 is charged to V _CR as shown in Figure 2b. However, V _CR is a potential having the following relationship.

V _CR =V _R +C _B /C _B +C _j ·V _CH -V' _TR The reason for having such a relational expression will be explained in detail later in the description of the present invention. Here, _VR is a reference voltage when applying a transfer pulse of voltage V〓 to the first gate electrode to perform BBD operation, and has the following relationship.

V _R =V〓−V _TB Here, V _TB is the threshold voltage of the MOS transistor constituting the BBD element.

The BBD element is provided in the direction indicated by the signal charge transfer direction T in the figure.

V′ _TR is a threshold voltage including the substrate bias effect of the MOS transistor constituted by the n ⁺ type regions 11 and 13 and the first gate electrode 14. Now, when there is incident light 22, electron-hole pairs are generated in the photoconductor 19, which reach the electrodes 17 and 20, respectively, and the potential of the electrode 17 decreases. This potential drop is proportional to the amount of incident light and is accumulated over one field period, so that the potential decreases to V _S . Furthermore, when V _CH is applied to the first gate electrode 14 at time t ₂ , the surface potential of the semiconductor underneath increases, and as a result, electrons are transferred from the n ⁺ type region 11 to the n ⁺ type region 13 . As a result, the potential of n ⁺ type region 11 rises again and becomes V _CR . Therefore, the total amount of charge transferred to the n ⁺ type region 13 corresponds to the illuminance of the incident light.

The above is an explanation of one unit of the solid-state device consisting of the photodetector and the first gate electrode 14. However, the means for sending the photoelectric conversion signal read into the n ⁺ type region 13 to the output section by self-scanning will be explained below. explain. FIG. 3 is a plan view of a one-dimensional arrangement of one unit of the solid-state element shown in FIG. 1, and a portion 23 surrounded by a broken line indicates the one unit.
The other numbers correspond to those in FIG. First gate electrodes 14 and 25 included in adjacent units
Second gate electrodes 24 and 26 are provided between them. Through the series of operations described above, the first gate electrode 14
By applying a positive transfer pulse shown in FIG. 2 to the second gate electrode 24, the charges read in are moved under the second gate electrode 24 in the form of charge transfer. Furthermore, the electric charge that has moved below the second gate electrode 24 is transferred to the first gate electrode 25 based on the same principle.
It is transferred to the second gate electrode 26 one after another and is transferred to the output stage. That is, the signal photoelectrically converted by the photodetector can be sent to the output stage as a two-phase clock signal.

Next, the bias effect of the DC voltage applied to the second electrode, which is a feature of this conventional example, will be described in detail. One of the bias effects is a blooming prevention mechanism. Blooming phenomenon is a phenomenon in which photogenerated carriers spread laterally when strong incident light hits, and the optical signal spreads beyond the size of the incident light.However, in charge transfer type solid-state imaging devices, due to their functionality, the blooming phenomenon occurs in the direction of transfer. Appears as a white line. To explain this using Fig. 2, the diode potential set to V _CR by the read pulse changes during one field period due to light incidence.
_However , if the light incidence becomes too strong,
The diode potential becomes less than V _R (dotted chain line in figure b)
Even when a transfer pulse is applied, the channel directly under the first gate electrode 14 is conductive, and as a result of the current being supplied from the n ⁺ type region 13 to the n ⁺ type region 11, a reading operation occurs, and the picture elements in the transfer direction are As if there were an optical signal, the potential changes and becomes a white line.
On _the other hand, if a positive bias V _D 21 is applied to the electrode 20 provided on the photoconductor formed as shown in FIG. First, if this V _D is set to be higher than _VR , the read operation by the transfer pulse will not occur and the blooming phenomenon will be reduced.

In such a conventional configuration for reducing the blooming phenomenon, the degree of blooming suppression is not significant, and furthermore, when such a configuration is used, the signal component decreases, that is, the dynamic range decreases. That is, V _sat shown in FIG. 2b is a voltage component corresponding to the signal amount when strong light is incident.

This value _Vsat is considered to be the amount that is saturated due to strong light incidence, and has the following relationship.

V _sat =V _CR -V _D As described above, the diode potential is selected so that it cannot become lower than V _R even if strong light is incident during the photoaccumulation period, that is, the relationship is such that V _D > V _R.

However, the lower the diode potential V _D in this case, the more carriers (electrons in this case) due to the optical signal corresponding to this potential will be transferred to the diode provided near the diode in question or the depletion layer of the transfer stage. Blooming symptoms also occur when the area is diffused through the substrate. That is, for example, even if the diode potential is set to approximately V _D by the DC power supply V _D to a high potential such that the channel directly under the first gate electrode becomes non-conductive even when a transfer pulse is applied, the diode potential becomes completely non-conductive. It is not possible.

This is because, as mentioned above, some of the signal carriers stored in the diodes are diffused into the depletion layer region due to the potential gradient of the nearby diodes and the depletion layer of the transfer stage. It is.

In this way, the amount of signal carrier components (hereinafter referred to as excess carriers) that are diffused into the vicinity and cause blooming increases as the diode potential V _D becomes lower or as the incident light becomes stronger.

This means that in order to suppress the amount of excess carriers, the value of the DC power supply V _D (the diode potential is also approximately this value) must be increased.
If this is done, the signal component V _sat , which is also the saturation signal amount described above, will decrease. That is, a problem arises in that the dynamic range decreases. or
It is also known as an experimental fact that when V _D is increased, a photoconductor exhibits a burn-in phenomenon.

Furthermore, when strong light enters, for example, the amount of light that saturates the signal component, that is, about 10 to 100 times the amount of saturated light.
When light that is twice as strong or stronger is incident, the excess carrier increases in proportion to a multiple of the saturated light amount of the incident light, causing strong blooming. In order to prevent this, the value of the DC power supply V _D must be increased, but as mentioned above, the higher the value, the lower the dynamic range and the greater the degree of burn-in. There was a problem.

The present invention is capable of dramatically exhibiting the blooming suppressing effect without causing the above-mentioned reduction in dynamic cleanliness or burn-in.

The present invention will be described below with reference to the drawings and embodiments.

One example of a solid-state imaging device used in the present invention is a unit similar to that shown in FIG. FIG. 4 shows an equivalent circuit of the device according to the embodiment of the present invention.

φ′ is a picture element reading pulse V _CH , which is applied to the first gate electrode (14 in FIG. 1) of the transistor T _B ;
Alternatively, the terminal to which the transfer pulse V is applied, C _B is the bucket capacitance when using BBD for transfer operation, C _j is the junction capacitance, D _N is the photoconductor, and D _S is the diode forming the source of the transistor _TR . _DN and D _S are electrically connected at point M in the figure.

C _N and C _S are equivalent representations of the respective capacitances of the photoconductor D _N and the diode D _S. φ′ _BS is
This is a terminal for applying an electric signal to the electrode corresponding to the transparent electrode 20 described in FIG. 1, that is, the electrode 17 that is in electrical contact with the top of the photoconductor D _N.

As described above, conventionally, blooming has been suppressed to a certain extent by applying a DC voltage to this terminal φ' _BS .

However, the present invention attempts to exert a dramatic effect of suppressing blooming by applying a pulse signal to this terminal φ' _BS .

The outline of the operation when a pulse signal is applied to the electrode terminal φ' _BS will be described below. That is, by applying a pulse φ _BS (referred to as a blooming suppression pulse), the diode potential is changed from the low level to the high level of this pulse, that is, by rapidly increasing it by an amount corresponding to the amplitude value, the above-mentioned dynamo The pulse φ _BS prevents a drop in the range and prevents the diode potential from dropping below a certain potential during the optical signal accumulation period due to excess carriers.
This is prevented by clamping the diode potential to a constant level using a high-level potential (for an N-channel MOS solid-state image sensor).

In this way, by rapidly changing the diode potential for a certain period of time and clamping it to a constant potential during the photoaccumulation period, it is possible to reduce the dynamic range.
The blooming suppression effect can be dramatically increased without causing burn-in.

The details of the present invention described above will be further described based on FIGS. 5a to 5d.

FIG. 5A is a waveform diagram of a clock pulse φ, which is applied to the terminal φ' and is composed of a picture element read pulse for reading a picture element signal and a clock pulse for transferring signal charges. It is assumed that these picture element read pulses and transfer pulses have voltages V _CH and V〓, respectively.

Figure b shows a pulse applied to the electrode terminal _φ'BS . A high level indicates the voltage value of V _C and a low level indicates the voltage value of V _L.

The above clock pulse φ and blooming suppression pulse _φBS are connected to terminals φ′ and _φ′BS , respectively (see Figure 4).
A potential change diagram of the diode potential at point M (see FIG. 4) when the voltage is applied is shown in FIG. 4c for each period _T0 to _T4 , with the horizontal axis representing time t.

This FIG. 5c will be explained in detail based on the equivalent circuit of FIG. 4. Note that in the following explanation, the transient response due to the time constant can be ignored, so the explanation will be omitted.

(i) At T ₀ Even if the diode potential at point M (Fig. 4) attempts to drop during strong light input, the high level voltage V _C of the blooming suppression pulse φ _BS will cause the voltage at M to decrease through the electrode terminal φ' _BS . The diode potential at the point is at a constant level V _C (to simplify the setup, the photoconductor D _N
(ignoring the forward voltage drop _VF ). Therefore, the diode potential at point M is
The voltage cannot drop below V _C , and as a result, excess carriers are discharged to the outside via the φ' _BS terminal without diffusing in the substrate, so blooming can be suppressed. The blooming suppression effect is
This increases by increasing the potential V _C , but in combination with the effect described in the period T ₂ later, it is possible to set the potential high without causing dynamic cleansing, burn-in, etc.

(ii) At T _1, φ′ When _{the BS} terminal voltage changes from V _C to V _L , the diode potential V ₁ at point M changes to the voltage at point M at T ₀ .
Since the amount of charge V C _S is stored as an initial charge in the capacitor _{C S} at V _C , the following relationship is established according to the law of conservation of initial charge.

V _C・C _S = (V ₁ −V _L )C _N +V ₁ C _S ∴V ₁ =V _C・C _S +V _L C _N ／C _N +C _S ……(1) (iii) T ₂ o'clock This period At , a read pulse V _CH is applied to the terminal φ'. That is, at point A of transfer stage _{T B ,} the potential V _R (= _V〓−
V _TB , V _TB (threshold voltage of transfer stage _TB ) are added in a superimposed manner.

This superimposed instantaneous potential V _h at point A is V _h = V _R +C _B /C _B +C _j・V _CH ...(2) At the same time as the potential is superimposed on the transfer stage, the pixel signal The gate of the read transistor T _R becomes conductive, and a charging current flows from point A to point M.

As a result, the potential V ₂ at point M is the transistor T _R
rises to the cut-off point. That is, V ₂ = V _h −V _TC −△K _SB ...(3) However, V _TC : Threshold voltage of pixel reading transistor _TR △K _SB : Increase in threshold voltage due to substrate bias effect (2) From formula (3), V ₂ = (V〓−V _TB ) +C _B /C _B +C _j・V _CH −V _TC −△K _SB ...(4) (iv) At T ₃ o'clock T ₂ o'clock, M The diode potential at the point is the value of V ₂ calculated above, and at this time, the pixel reading transistor _TR is cut off, so
Divided into capacitances C _N and C _S at both ends of point M, the potential V ₂
A charge of Q _M is stored by .

That is, Q _M = (V ₂ − V _L ) C _N + V ₂ C _S ……(5) At the moment the T ₃ period starts, the potential of the φ′ _BS terminal increases.
When changing from V _L to V _C , the diode potential V ₃ at point M at this time has the following relationship according to the law of conservation of initial charge.

Q _M = (V ₃ −V _C )C _N +V ₃ C _S ……(6) Therefore, from equations (5) and (6), V ₃ = V ₂ +C _N /C _N +C _S・(V _C − V _L )...(7) An example of the values of the diode potentials V _C , V ₁ , V ₂ , and V ₃ at each point M in the above period T ₀ to T ₃ is calculated according to the following design values. show.

C _B =0.1pF, C _j =0.03pF, C _N =0.06pF, C _S =
0.03pF, V _C = 7V, V _L = -5V, V = 8V, V _TB
= 1V, V _CH = 14V, V _TC = 3V, △K _SB = 6V, then V _C = 7V, V ₁ = -1.0V, V ₂ = 8.7V, V ₃ =
Each value of 16.7V is obtained.

(v) T ₄ o'clock During this period, light is incident on the photoconductor,
The diode potential at point M drops in accordance with this amount of light. This dropped potential is read into the transfer stage T _B as a video signal, but even if the light is strong, for example several tens of times more than the saturated light amount, the diode potential at point M is clamped at the potential V _C. blooming can be suppressed.

When such strong light is incident, the transfer stage
The saturation signal voltage △V read into T _B is △V=V ₃ −V _C ……(8).

Applying the above example of design values, △V=16.7−7.0=9.7(V)……(9) A high saturation signal voltage can be obtained.

Moreover, as shown in equation (7), in the _T3 period (which is also the period in which all picture elements are reset to the black level of the image), the voltage is superimposed on the potential _V2 and further C _N /C _N +C _S ( Since the potential is increased by V _C −V _L ), the dynamic range will not be reduced even if the diode clamp potential V _C is set high to increase the blooming suppression effect.

To further explain this, Figure 5d
A diagram of the change in the diode potential at point M when a DC voltage is applied to the terminal φ' _BS as in the prior art will be compared side by side with FIG. 5c corresponding to the case according to the present invention. That is, in this case, when the picture element read pulse is applied to the terminal φ' by the potential V _CH during the T ₂ and T ₃ periods, the diode potential at the M point obtained is as shown in (4) above.
It rises only up to the potential V ₂ shown in the formula.

Therefore, the amount of saturated signal obtained at this time △
V′ is △V′=V ₂ −V _C ……(10) Applying the example of the above design value, △V′=2.7V ……(11) The possible diode potential at point M according to the present invention is Compared to the method of applying a _DC voltage to the φ′ _BS terminal of
You can find out by comparing the formulas.

That is, V _BS = △V - △V' = V ₃ - _{V 2}
...(Formula ∵(8), (10)) =C _N /C _N +C _S (V _C −V _L ) ...(Formula ∵(7)) Therefore, according to the present invention, the diode potential,
In other words, until the pixel signal component reaches saturation,
Compared to the conventional method, this method has a margin corresponding to the potential of _VBS .

Therefore, according to the present invention, it is possible to dramatically increase the blooming suppressing effect without causing a decrease in dynamic range and without causing burn-in.

Figure 6 shows the data obtained in the experiment. The horizontal axis shows the amount of incident light, the amount of light when the pixel signal is saturated, that is, the multiple of the saturated light amount, and the vertical axis shows the amount of light when the pixel signal is saturated. When an image of a subject is captured, the amount of false signals superimposed on the black part of the image and generated in the vertical direction of the image (white vertical lines in the vertical direction) is expressed as the ratio to the amount of signal saturation caused by the optical spot signal. In other words, take the pseudo signal rate.

This amount of pseudo signal rate corresponds to the amount of blooming. The curve shown by the dotted line in the figure is the characteristic curve when the conventional method is used, and the curve shown by the solid line is the characteristic curve when the invention is used.

Now, if the permissible limit of such a false signal rate is 5% depending on the situation of the subject, the blooming suppression effect with the conventional method is only about twice the saturated light amount, but the device according to the present invention has a blooming suppression effect of only about twice the saturation light amount. As can be seen from the figure, the blooming suppression effect is more than 100 times greater than the saturated light amount.

The solid-state imaging device used in the present invention is as shown in the equivalent circuit shown in FIG. 4, where D _N is a photoconductor having a photoelectric conversion function, and D _S is a diode forming the source end of the pixel reading transistor. However,
This relationship is not necessarily necessary. This relationship may be reversed, that is, D _N may be made of a material that has a simple diode function, and D _S may be made of a material that has a photoelectric conversion function.

A sectional view of one picture element of this embodiment is shown in FIG. 7a, and its equivalent circuit is shown in FIG. 7b.

In both figures, 111 is an impurity n ⁺ region having a conductivity type opposite to that of the substrate 10 (when the substrate is p-type).
When light is incident on this region, the region 11
1 and the substrate 10 have a photoelectric conversion function. Reference numeral 71 denotes an impurity p ⁺ region provided in the impurity n ⁺ region 111 , and this p ⁺ region is electrically coupled to the electrode 72 . This p ⁺ region 71 and impurity n ⁺ region 1
11 has a diode function. In the same figure,
All the constituent elements of the parts indicated by numbers other than those mentioned above are the same as those described based on FIG. 1.

In the solid-state imaging device configured as described above, the pulse φ _BS as described in FIG. 5 may be applied to the terminal φ _BS1 of the electrode 72. In the equivalent circuit shown in FIG. 7b, D _S ' is a diode composed of an impurity p ⁺ region 71 and an impurity n ⁺ region 111, and has a capacitance C _S '. D′ _N is impurity n ⁺ region 111
and a substrate 10, and has a capacitance C _N '.

A pulse voltage φ _BS as described in FIG. 5b is applied to the electrode φ _BS1 of the solid-state imaging device configured as above.
It is clear that the same blooming suppressing effect as described based on the same figure can be produced by applying .

As described above, the present invention prevents a decrease in dynamic range by substantially applying a pulse synchronized with the pixel reading pulse to the photoconductor, and excess carriers generated during the light accumulation period are removed by the diode described above. By clamping the potential to a constant potential, blooming can be prevented from occurring.

Note that when the substrate is formed of an n-type semiconductor, it is clear that impurity regions of the opposite conductivity type to the impurity regions used can also be used.
Furthermore, it goes without saying that the present invention can be applied to one-dimensional and two-dimensional solid-state imaging devices.

That is, according to the present invention, it is possible to obtain a solid-state imaging device that exhibits a remarkable blooming suppressing effect without a reduction in dynamic range, burn-in, or the like.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of one pixel of a conventional solid-state imaging device.
2a and 2b are timing charts showing the conventional blooming suppression method, FIG. 3 is a conceptual diagram showing the plane of FIG. 1, and FIG. Figures 5a to 5d are timing charts for explaining the present invention, Figure 6 is a characteristic diagram showing experimental results obtained with the present invention, and Figures 7a and b are for explaining other embodiments of the present invention. This is a diagram for 10...Semiconductor substrate, 11...Photodetection section (diffusion region), 15...Insulating film, 16...Gate oxide film,
7...First electrode, 18, 19...Photoconductive film, 20
...Second electrode.

Claims (1)

[Claims] 1 unit element is a first unit element formed on a semiconductor substrate
a photoelectric conversion section, a gate electrode for reading an optical signal of the first photoelectric conversion section into a charge transfer element and transferring and outputting it, and a second photoelectric conversion section connected in series to the first photoelectric conversion section. and an electrode formed on the second photoelectric conversion section, in which the solid-state imaging device reads the optical signal into the charge transfer element. Once a pulse of A solid-state imaging device characterized by increasing a bias voltage.