JPS6390892A - Multilayer board circuit for radiofrequency application - Google Patents
Multilayer board circuit for radiofrequency applicationInfo
- Publication number
- JPS6390892A JPS6390892A JP61236462A JP23646286A JPS6390892A JP S6390892 A JPS6390892 A JP S6390892A JP 61236462 A JP61236462 A JP 61236462A JP 23646286 A JP23646286 A JP 23646286A JP S6390892 A JPS6390892 A JP S6390892A
- Authority
- JP
- Japan
- Prior art keywords
- signal transmission
- pattern
- grounding
- high frequency
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000008054 signal transmission Effects 0.000 claims description 28
- 239000000758 substrate Substances 0.000 claims description 20
- 238000000926 separation method Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 239000007767 bonding agent Substances 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、高周波信号の入出力にピンＺ１１ｉ子を用い
た高周波部品を実装する誘電体の高周波用多層基板回路
に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a dielectric high frequency multilayer board circuit on which high frequency components are mounted using pins Z11i for inputting and outputting high frequency signals.
従来の技術
畠：丘 百ｍ炊Ｉ舌；のス甲±１／’しトノ９リヱル汀
１１、Ｊ−高周波部品は、受信機や無線機などの低価格
化を図るために、盛んに利用されろようになってきた。Conventional technology: Oka: 100 meters; It's starting to feel like it's going to happen.
この高周波信号の入出力にピン端子を用いた高周告等に
記載されているようなハーメチックシール構成が知られ
ており、誘電体基板に実装して用いられる。以下、第２
図を参照して従来の誘電体基板回路について説明する。A hermetic seal structure is known, as described in the above publication, which uses pin terminals for inputting and outputting this high frequency signal, and is used by being mounted on a dielectric substrate. Below, the second
A conventional dielectric substrate circuit will be explained with reference to the drawings.
第２区間は従来の誘電体基板回路の正面図である。第２
図（３１は第２区間の一点鎖線ａ −ｄから見た同断面
図、第２図（Ｃ）は裏面図である。第２区間、（Ｂｔ、
（Ｃ１において、１は入出力にピン端子を用いた高周波
部品、２は高周波部品１の入出力用のピン端子、３は高
周波部品１を実装する誘電体基板、４は誘電体基板３の
裏面に設けた信号伝送用パターン、５は誘電体基板３に
設けた接地用パターン、６はハンダなどの金属接合剤で
ある。The second section is a front view of a conventional dielectric substrate circuit. Second
Figure 31 is a sectional view of the second section as seen from the dashed line a-d, and Figure 2 (C) is a back view.The second section, (Bt,
(In C1, 1 is a high-frequency component that uses pin terminals for input and output, 2 is a pin terminal for input and output of high-frequency component 1, 3 is a dielectric substrate on which high-frequency component 1 is mounted, and 4 is the back surface of dielectric substrate 3. 5 is a grounding pattern provided on the dielectric substrate 3, and 6 is a metal bonding agent such as solder.
以上のような構成において、高周波信号は誘電体基板３
の裏面に設けた信号伝送用パターン・１から、ハンダな
どの金属接合剤６により接続された高周波部品１のピン
端子２へ入力される。入力された高周波信号は高周波部
品１により所望の信号処理がなされて、他のピン端子２
かも他の信号伝送用パターン４へ出力される。In the above configuration, the high frequency signal is transmitted to the dielectric substrate 3.
The signal is input from the signal transmission pattern 1 provided on the back side of the signal transmission pattern 1 to the pin terminal 2 of the high frequency component 1 connected by a metal bonding agent 6 such as solder. The input high frequency signal is subjected to desired signal processing by the high frequency component 1, and then sent to other pin terminals 2.
It is also output to another signal transmission pattern 4.
発明が解決しようとする問題点
しかり、、以上のような構成の誘電体基板は、誘電体基
板の裏面に設けた信号伝送用パターン４が接地面で覆わ
れておらず、誘電体基板の信号伝送用パターン間の迷結
合により、分離度が不足し、高いピン端子間分離度が要
求されるフィルタなどの高周波部品の特性が、劣化する
という問題があった。特に、送信フィルタと受信フィル
タからなるアンテナ共用器のように、大電力信号と微少
電力信号を同時に扱い、高いピン端子間分離度が要求さ
れる周波部品の場合には、信号パターン間の分離度が不
十分なために送信出力が受信フィルタに回り込むなど特
性劣化が顕著になるという問題があった。Problems to be Solved by the Invention In the dielectric substrate having the above configuration, the signal transmission pattern 4 provided on the back surface of the dielectric substrate is not covered with a ground plane, and the signal transmission pattern of the dielectric substrate is not covered with a ground plane. Stray coupling between transmission patterns causes a problem in that the degree of separation is insufficient and the characteristics of high frequency components such as filters that require high degree of separation between pins and terminals are deteriorated. In particular, in the case of frequency components such as antenna duplexers consisting of a transmit filter and a receive filter, which handle high power signals and low power signals at the same time and require a high degree of separation between pin terminals, the degree of separation between signal patterns must be There was a problem in that the transmission output was insufficient and the characteristics deteriorated significantly, such as the transmission output going around to the reception filter.
本発明は従来技術の以上のような問題を解決するもので
、高周波信号をピン端子を用いて入出力する高周波部品
を実装する誘電体基板の信号伝送用パターン間の分離度
を高めることを目的とするものである。The present invention solves the above-mentioned problems of the prior art, and aims to increase the degree of separation between signal transmission patterns on a dielectric substrate on which high-frequency components that input and output high-frequency signals using pin terminals are mounted. That is.
問題点を解決するための手段
本発明は、高周波信号の入出力にピン端子を用いる高周
波部品を実装する誘電体基板を多層とし、その層の内、
信号伝送用パターンは高周波部品のピン端子に応じて異
なる層を用い、この信号伝送用パターンの上下には接地
用パターンを、ピン端子間には接地用パターンとこわら
を接続するスルーホールからなる接地部を設けることに
より、上記目的を達成するものである。Means for Solving the Problems The present invention provides a multi-layered dielectric substrate on which high-frequency components are mounted using pin terminals for inputting and outputting high-frequency signals, and among the layers,
Different layers are used for the signal transmission pattern depending on the pin terminal of the high-frequency component, and a grounding pattern is placed above and below this signal transmission pattern, and a grounding pattern consisting of a through hole connecting the grounding pattern and the stiffness is placed between the pin terminals. By providing this section, the above object is achieved.
作 用
本発明は上記構成により、高周波信号を伝送する信号伝
送用パターンを、上下に接地用パターン、ピン端子間に
接地部を設けることで包囲し、遮蔽効果を高めることで
、信号伝送用パターン間相互の迷結合を減少させるもの
である。According to the above configuration, the present invention surrounds the signal transmission pattern for transmitting high-frequency signals by providing grounding patterns above and below and a grounding part between the pin terminals to enhance the shielding effect. This reduces stray coupling between the two.
実施例 以下図面を用いて、本発明の第１の実施例を説明する。Example A first embodiment of the present invention will be described below with reference to the drawings.
第１口開は本発明の第１の実施例における高周波用多層
基板回路の正面図である。第１図（Ｂｌは第１口開の一
点鎖線ａ −ａ’から見た同断面図、第１図（Ｃ１は第
１図（Ｂ）で示す高周波用多層基板の表面（第１層）お
よび裏面（第４層）を示すパターン図、第１図（Ｄ）は
第１図（Ｂ）で示す高周波用多層基板の第２層を示すパ
ターン図、第１図（Ｅｌは第１図（Ｂｌで示す高周波用
多層基板の第３層を示すパターン゛ 図である。第１
図（５）、（Ｂ）、（Ｃ）、（Ｄｉ、（Ｅｌにおいて、
１１は入出力にピン端子を用いた高周波部品、１２は高
周波部品１１の入出力用のピン端子、Ｊ３は高周波部品
１１を実装する高周波用多層基板、］４は高周波用多層
基板１３に設けた信号伝送用のパターン、１５は高周波
用多層基板１３に設けた接地用パターン、１６はハンダ
などの金属接合剤、】７は高周波用多層基板１３の各層
に設けた接地用パターン１５を接続するスルーホールで
ある。The first opening is a front view of the high frequency multilayer board circuit in the first embodiment of the present invention. Figure 1 (Bl is the same sectional view taken from the dashed line a-a' of the first opening, Figure 1 (C1 is the surface (first layer) of the high frequency multilayer substrate shown in Figure 1 (B) and A pattern diagram showing the back surface (fourth layer), FIG. 1(D) is a pattern diagram showing the second layer of the high frequency multilayer board shown in FIG. 1(B), FIG. FIG. 1 is a pattern diagram showing the third layer of the high-frequency multilayer substrate shown in FIG.
In Figures (5), (B), (C), (Di, (El),
11 is a high frequency component using pin terminals for input and output, 12 is a pin terminal for input and output of the high frequency component 11, J3 is a high frequency multilayer board on which the high frequency component 11 is mounted, ] 4 is provided on a high frequency multilayer board 13 A pattern for signal transmission, 15 a grounding pattern provided on the multilayer board 13 for high frequency, 16 a metal bonding agent such as solder, and 7 a through hole for connecting the grounding patterns 15 provided on each layer of the multilayer board 13 for high frequency. It is a hall.
以上のよ５だ構成において−ハンダだどの金属の接合剤
１６により、高周波信号を高周波部品１１に入出力する
ピン端子１２を、高周波用多層基板１３の裏面で接続す
る。高周波信号は高周波用多層基板１３に設けた信号伝
送用パターン１４、ピン端子１２を通して、高周波部品
１１に入力される。入力された高周波信号は、高周波部
品１１により所望の信号処理がなされて、他のピン端子
１２から入力とは異なる信号伝送用パターン１４を通−
して出力する。例えば第１図（Ｄｉに示す第２層の信号
伝送用パターンを高周波信号の入力層とすると、出力層
は第１図（Ｅ）に示す第３層という具合である。In the above-described five-way configuration, the pin terminals 12 for inputting and outputting high-frequency signals to the high-frequency components 11 are connected to the back surface of the high-frequency multilayer board 13 using a metal bonding agent 16 such as solder. The high frequency signal is input to the high frequency component 11 through the signal transmission pattern 14 provided on the high frequency multilayer substrate 13 and the pin terminal 12. The input high-frequency signal is subjected to desired signal processing by the high-frequency component 11, and is then transmitted from another pin terminal 12 through a signal transmission pattern 14 different from the input signal.
and output. For example, if the signal transmission pattern of the second layer shown in FIG. 1 (Di) is the input layer of the high frequency signal, the output layer is the third layer shown in FIG. 1(E).
これらの信号伝送用パターンの上下には接地用ノくター
ン１５を設けると同時に、ピン端子間の各層に設ケた接
地用パターン１５をスルーホール１７にて接続すること
で、信号伝送用パターンの周囲を接地部で包囲し、信号
伝送用パターン間の遮蔽効果を高めている、
以上本実流側てよれば、高周波信号の入出力にピン端子
を用いろ高周波部品１１を実装する誘電体基板を多層と
し、信号伝送用ノ（ターン１４は、高周波部品のピン端
子１２に応じて異なる層を用い、この信号伝送用パター
ン１４の上下には接地用パターン１５を、ピン端子間に
は各層に接地用パターン１５とこれらを接続するスルー
ホール１７からなる接地部を設けることにより、信号伝
送用パターン１４の周囲を接地部で包囲し、信号伝送用
パターン１４間の遮蔽効果を高めている。こうすること
で、信号伝送用パターン１４間の分離度が向上し、高い
ピン端子間分離度が要求されるフィルタ、アンテナ共用
器などを特性劣化を招かずに実装することができる。By providing grounding turns 15 above and below these signal transmission patterns, and at the same time connecting the grounding patterns 15 provided on each layer between the pin terminals with through holes 17, the signal transmission patterns The dielectric substrate on which the high-frequency component 11 is mounted is surrounded by a grounding part to enhance the shielding effect between the signal transmission patterns. The signal transmission pattern (turn 14) uses different layers depending on the pin terminal 12 of the high frequency component, and the grounding pattern 15 is placed above and below this signal transmission pattern 14, and between the pin terminals in each layer. By providing a grounding section consisting of a grounding pattern 15 and a through hole 17 that connects these, the grounding section surrounds the signal transmission pattern 14, increasing the shielding effect between the signal transmission patterns 14. By doing so, the degree of separation between the signal transmission patterns 14 is improved, and filters, antenna duplexers, etc. that require a high degree of separation between pins and terminals can be mounted without causing characteristic deterioration.
なお、以上の説明では、１つの高周波部品を実装する場
合について述べたが、複数個の高周波部品を実装し、近
接する部品間の分離を図った（・場合にも適用できるこ
とは言うまでもない。Note that although the above explanation has been about the case where one high-frequency component is mounted, it goes without saying that this can also be applied to the case where multiple high-frequency components are mounted and separation of adjacent components is attempted.
発明の効果
以上のように本発明は、高周波信号の入出力にピン端子
を用いる高周波部品を実装する誘電体基板を多層とし、
高周波信号伝送用の信号パターンは、高周波部品のピン
端子に応じて異なる層を用い、この信号伝送用パターン
の上下には接地用パターンを、ピン端子間には各層に接
地用パターンとこれらを接続するスルーホールからなる
接地部を設け、信号伝送用パターンの周囲を接地部で包
囲することにより、信号伝送用パターン間の遮蔽を図り
、分離度を向上させ、高いピン端子間分離度を必要とす
るフィルタ、アンテナ共用器などの高周波部品を、特性
劣化を招かずに実装可能としたもので、その工業的利用
価値は大きい。Effects of the Invention As described above, the present invention has a multilayer dielectric substrate on which high-frequency components are mounted that use pin terminals for inputting and outputting high-frequency signals,
The signal pattern for high-frequency signal transmission uses different layers depending on the pin terminal of the high-frequency component, and a grounding pattern is placed above and below this signal transmission pattern, and a grounding pattern is connected to each layer between the pin terminals. By providing a grounding section consisting of a through hole and surrounding the signal transmission pattern with the grounding section, it is possible to shield the signal transmission patterns and improve the isolation, thereby eliminating the need for high isolation between pins and terminals. This allows high-frequency components such as filters and antenna duplexers to be mounted without deteriorating characteristics, and has great industrial value.
第１回置、（Ｂ）、（Ｃ）、（Ｄｌ、（Ｅｌは本発明の
一実施例における高周波用多層基板回路のそれぞれ正面
図、断面図、第１層および第４層のパターン図、第２層
のパターン図、および第３層のパターン図、第２区間、
（Ｂ）、（Ｃ１は従来の誘電体基板回路のそれぞれ正面
図、断面図および裏面図である。
１１・・・高周波部品、１２・・・ピン端子、１３・・
・高周波用多層基板、１４・・・信号伝送用パターン、
１５・・・接地用パターン、］Ｃ６・・金属接合剤、】
７・・・スルーホール。
第１図
（Ａ）
第 １ 図1st position, (B), (C), (Dl, (El are respectively a front view, a cross-sectional view, a pattern diagram of the first layer and the fourth layer of the high frequency multilayer board circuit in one embodiment of the present invention, A pattern diagram of the second layer, a pattern diagram of the third layer, a second section,
(B), (C1 is a front view, a sectional view, and a back view, respectively, of a conventional dielectric substrate circuit. 11...High frequency component, 12... Pin terminal, 13...
・High frequency multilayer board, 14...signal transmission pattern,
15...Grounding pattern, ]C6...Metal bonding agent,]
7...Through hole. Figure 1 (A) Figure 1
Claims (1)
実装する誘電体基板を有し、前記誘電体基板を多層とし
、その層の内、信号伝送用パターンは前記高周波部品の
ピン端子に応じて異なる層を用い、前記信号伝送用パタ
ーンの上下には接地用パターンを、前記高周波部品の入
出力ピン間には各層とも接地用パターンとスルーホール
からなる接地部を設けたことを特徴とする高周波用多層
基板回路。It has a dielectric substrate on which high-frequency components are mounted using pin terminals for inputting and outputting high-frequency signals, and the dielectric substrate is multilayered, and among the layers, signal transmission patterns are arranged according to the pin terminals of the high-frequency components. A high frequency device characterized in that different layers are used, a grounding pattern is provided above and below the signal transmission pattern, and a grounding portion consisting of a grounding pattern and a through hole is provided in each layer between the input and output pins of the high frequency component. Multilayer board circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61236462A JPH0752792B2 (en) | 1986-10-03 | 1986-10-03 | Multilayer circuit board for high frequency |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61236462A JPH0752792B2 (en) | 1986-10-03 | 1986-10-03 | Multilayer circuit board for high frequency |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6390892A true JPS6390892A (en) | 1988-04-21 |
| JPH0752792B2 JPH0752792B2 (en) | 1995-06-05 |
Family
ID=17001102
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61236462A Expired - Fee Related JPH0752792B2 (en) | 1986-10-03 | 1986-10-03 | Multilayer circuit board for high frequency |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0752792B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0423490A (en) * | 1990-05-18 | 1992-01-27 | Nec Corp | Multilayer wiring board |
| JPH0480086U (en) * | 1990-11-27 | 1992-07-13 | ||
| US10470346B2 (en) | 2009-02-06 | 2019-11-05 | Ge Embedded Electronics Oy | Electronic module with EMI protection |
-
1986
- 1986-10-03 JP JP61236462A patent/JPH0752792B2/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0423490A (en) * | 1990-05-18 | 1992-01-27 | Nec Corp | Multilayer wiring board |
| JPH0480086U (en) * | 1990-11-27 | 1992-07-13 | ||
| US10470346B2 (en) | 2009-02-06 | 2019-11-05 | Ge Embedded Electronics Oy | Electronic module with EMI protection |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0752792B2 (en) | 1995-06-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |