JPS6390157A - Sealing method for semiconductor device - Google Patents

Sealing method for semiconductor device

Info

Publication number
JPS6390157A
JPS6390157A JP23571986A JP23571986A JPS6390157A JP S6390157 A JPS6390157 A JP S6390157A JP 23571986 A JP23571986 A JP 23571986A JP 23571986 A JP23571986 A JP 23571986A JP S6390157 A JPS6390157 A JP S6390157A
Authority
JP
Japan
Prior art keywords
layer
glass
base material
sealing
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23571986A
Other languages
Japanese (ja)
Inventor
Kazuo Kanehiro
金廣 一雄
Tadashi Igarashi
五十嵐 廉
Takao Maeda
貴雄 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP23571986A priority Critical patent/JPS6390157A/en
Publication of JPS6390157A publication Critical patent/JPS6390157A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a sealing method which has excellent heat sink property and easily reduces thickness by glass-sealing through an oxide ceramic layer provided on a metal substrate. CONSTITUTION:An oxide ceramic layer 11 of aluminum, magnesium, silicon or titanium is formed by an ion plating method or a sputtering method on a metal substrate 10 having high heat sink property to become a base material. When it is sealed through the layer 11 with a low melting point glass layer 9, the layer 11 is remarkably wettable with the layer 9 and similar in thermal expansion coefficient to the layer 9. Accordingly, the sealability and airtightness are enhanced. As a result, a sealing method for a semiconductor device having an easily reduced thickness is obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はガラス封止型半導体装置の封止方法に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a method for sealing a glass-sealed semiconductor device.

〔従来の技術〕[Conventional technology]

現在使用されている半導体集積回路(以下ICと略称す
る)のパッケージ法は樹脂封止型、ガラx−セラミック
封止型及び積層セラミック型の3種類に分類される。
Currently used packaging methods for semiconductor integrated circuits (hereinafter abbreviated as IC) are classified into three types: resin sealing type, glass x-ceramic sealing type, and laminated ceramic type.

これらの・ξツケージ法は信頼性及び価格の点で各々長
短があり、信頼性に関しては積層セラミック型、ガラス
−セラミック型、樹脂封止型の順に優れ、一方価格の点
ではこの逆の順序で安価となる。そこで、これらの点を
比較考量して用途に応じて使いわけている現状である。
Each of these ξ-cage methods has its advantages and disadvantages in terms of reliability and price. In terms of reliability, the laminated ceramic type, glass-ceramic type, and resin-sealed type are superior in this order, while in terms of price, they are superior in the reverse order. It will be cheaper. Therefore, the current situation is to weigh these points and use them depending on the purpose.

最近では、各・ぐツケージ法の短所を克服すべく研究が
進められており、特に信頼性と価格において中間的なガ
ラス−セラミック封止型の改良が強く望まれている。
Recently, research has been carried out to overcome the shortcomings of various packaging methods, and in particular, it is strongly desired to improve the glass-ceramic sealing type, which is intermediate in terms of reliability and cost.

第3図に上記のガラス−セラミック封止型・ぐツケージ
の分解部品配列斜視図を、及び第4図にこの・ぐツケー
ジを用いてガラス封止した半導体装置の一例を示す。
FIG. 3 is a perspective view of the disassembled parts arrangement of the above-mentioned glass-ceramic sealing type shoe cage, and FIG. 4 shows an example of a semiconductor device sealed with glass using this shoe cage.

この、eツケージのベース材はアルミナ等のセラミック
材3であり、そのほぼ中央にIC等の半導体チップ1を
グイデンディングすべき凹部2が形成され、周縁のガラ
ス封止すべき部分の表面には鉛ガラスのような低融点ガ
ラス層4が設けである。
The base material of this e-cage is a ceramic material 3 such as alumina, and a recess 2 in which a semiconductor chip 1 such as an IC is to be guided is formed approximately in the center, and a recess 2 in which a semiconductor chip 1 such as an IC is to be placed is formed on the surface of the peripheral portion to be sealed with glass. A low melting point glass layer 4 such as lead glass is provided.

半導体チップ1を載置したセラミック基材3の周囲から
リードフレームから裁断したリード5が載せられ、各リ
ード5と半導体チップ1の各電極とはアルミニウム等の
デンディングワイヤ6で結線される。このセラミック基
材3の上に、半導体チップ1とデンディングワイヤ6を
収容する凹部8と該凹部8周縁に低融点ガラス層9を設
けたアルミナ等のセラミックキャップ7を重ねて加熱す
ることにより、低融点ガラス層4,9がリード5を固定
しつつ互いに融着してセラミック基材3とセラミックキ
ャップ7とを封止する。
Leads 5 cut from a lead frame are placed around the ceramic base material 3 on which the semiconductor chip 1 is placed, and each lead 5 and each electrode of the semiconductor chip 1 are connected with a denting wire 6 made of aluminum or the like. By overlaying and heating a recess 8 for accommodating the semiconductor chip 1 and the Dending wire 6 and a ceramic cap 7 made of alumina or the like having a low melting point glass layer 9 around the periphery of the recess 8, on top of the ceramic base material 3, The low melting point glass layers 4 and 9 fix the leads 5 and are fused together to seal the ceramic base material 3 and the ceramic cap 7.

しかし、従来使用されているアルミナAR203に代表
されるセラミック基材は熱伝導率が小さいために、半導
体素子で発生した熱を効率よく放散することができず、
熱の蓄積によって半導体装置の誤動作を招く等の欠点が
ある。また、セラミック自体の薄板化が技術的に非常に
困難であシ、例え薄板化できてもセラミックスの靭性が
低いために割れが発生しやすいという問題点があった。
However, conventionally used ceramic base materials such as alumina AR203 have low thermal conductivity, so they cannot efficiently dissipate the heat generated by semiconductor elements.
There are drawbacks such as heat accumulation leading to malfunction of the semiconductor device. In addition, it is technically very difficult to make the ceramic itself into a thin plate, and even if it could be made into a thin plate, the toughness of the ceramic is low, making it easy to crack.

最近、ICを中心とする半導体チップの高集積化及び小
型軽量化の傾向に伴ない、・ξツケージは薄く小型にな
り、半導体チップの発熱量は益々増大しているので、上
記したセラミック基材を用いてのガラス封止が困難にな
シつつある。
Recently, with the trend toward higher integration, smaller size, and lighter weight of semiconductor chips, mainly ICs, the It is becoming increasingly difficult to seal glass with glass.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明は、上記した従来のセラミック基材によるガラス
封止の欠点を解決して、熱放散性に優れ薄型化が容易な
半導体装置の封止方法を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for encapsulating a semiconductor device that has excellent heat dissipation properties and can be easily made thin by solving the above-described drawbacks of conventional glass encapsulation using a ceramic base material.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体装置の封止方法は、半導体チップを載置
するベース材として金属基材を使用し、該金属基材の少
なくともガラス封止されるべき部分の表面に酸化物系セ
ラミック層を形成し、該酸化物系セラミック層を介して
ガラス封止することを特徴とする。
The semiconductor device sealing method of the present invention uses a metal base material as a base material on which a semiconductor chip is placed, and forms an oxide-based ceramic layer on the surface of at least a portion of the metal base material that is to be sealed with glass. The device is characterized in that it is sealed with glass through the oxide ceramic layer.

上記金属基材としては、鉄、鉄合金、銅、銅合金、鉄−
ニッケル合金、又はこれらにニッケル又はクロムを被覆
した材料が好ましい。
The above metal base materials include iron, iron alloy, copper, copper alloy, iron-
A nickel alloy or a material obtained by coating these with nickel or chromium is preferable.

上記セラミックとしては、低融点ガラスとの濡れ性が非
常に良好で熱膨張係数が近似している酸化物系セラミッ
クを使用し、特にアルミニウム。
As the above-mentioned ceramic, an oxide ceramic is used which has very good wettability with low melting point glass and has a coefficient of thermal expansion similar to that of low melting point glass, especially aluminum.

マグネシウム、ケイ素及びチタンの少なくとも1種の酸
化物が好ましい。
Oxides of at least one of magnesium, silicon and titanium are preferred.

〔作用〕[Effect]

ガラス封止型・ぐツケージのベース材として金属基材を
使用した場合、一般に金属基材と低融点ガラスとの熱膨
張係数に大きな差があるため両者の接合自体が不可能で
ある。金属基材として鉄−ニッケル合金を用いた場合に
は両者の熱膨張係数の差が比較的少ないので接合可能で
あるが、金属基材表面の脆い金属酸化物を介して低融点
ガラスと接合しているので密着性に乏しく、ガラス封止
後の気密信頼性が著しく低い結果となる。
When a metal base material is used as a base material for a glass-sealed shoe cage, it is generally impossible to bond the metal base material and low-melting glass because there is a large difference in coefficient of thermal expansion between the two. When an iron-nickel alloy is used as the metal base material, the difference in thermal expansion coefficient between the two is relatively small, so it is possible to bond it, but it is possible to bond it to low-melting glass through the brittle metal oxide on the surface of the metal base material. This results in poor adhesion and extremely low airtight reliability after glass sealing.

本発明においては、第1図に示すように、ベース材とし
ての金属基材10の少なくともガラス封止されるべき部
分の表面に酸化物系セラミック層11を形成し、このセ
ラミック層11上に通常の低融点ガラス層9を形成しで
ある。その結果、金属基材10は酸化物系セラミック層
11を介してガラス封止されることになり、酸化物系セ
ラミックが低融点ガラスとの濡れ性が非常に良好で且つ
両者の熱膨張係数が近似しているから極めて良好な密着
強度と気密性が達成される。更に、セラミック層11に
は金属基材10と低融点ガラス層9との熱膨張差による
応力を緩和する作用があるので、金属基材10として熱
膨張係数の大きな銅又は銅合金を使用した場合でも完全
な封止が可能と唸る。
In the present invention, as shown in FIG. 1, an oxide ceramic layer 11 is formed on the surface of at least a portion of a metal substrate 10 serving as a base material to be sealed with glass, and on this ceramic layer 11, a A low melting point glass layer 9 is formed. As a result, the metal base material 10 is sealed with glass via the oxide ceramic layer 11, and the oxide ceramic has very good wettability with the low melting point glass and the coefficient of thermal expansion of both is low. Because they are similar, extremely good adhesion strength and airtightness can be achieved. Furthermore, since the ceramic layer 11 has the effect of relieving stress due to the difference in thermal expansion between the metal base material 10 and the low melting point glass layer 9, when copper or copper alloy with a large coefficient of thermal expansion is used as the metal base material 10, However, it is possible to completely seal it.

また、セラミック層11と金属基材10との密着性には
セラミック層11の形成方法によって差異がある。この
形成方法には物理的又は化学的蒸着法、溶射法及び塗布
法等があるが、溶射法及び塗布法は薄膜形成に不適当で
あるほか金属基材が熱的影響を受けて変質する恐れがあ
る。また、化学的蒸着法(CVD)も熱的影響が大きく
好ましくない。物理的蒸着法(PVD)はこの熱的影響
がなく、なかでもイオンシレーティング法及びスパッタ
リング法は金属基材との密着がよく完全な酸化物からな
るセラミック層を形成でき、加えてセラミック層11の
膜厚制御も容易である。好ましい金属基材−セラミック
層−形成法の組合わせの一部は、例えばFe又はFe合
金−AJ!203−イオンプレーティング、 Cu又は
Cu合金−5iO2−スパッタリング法グ法−Ni合金
−AP203又はT i O2−イオンプレーティング
である。しかし、真空蒸着法では完全な酸化物からなる
セラミック層を得ることは困難であシ、また得られたセ
ラミック層の金属基材との密着性も好ましくない。
Furthermore, the adhesion between the ceramic layer 11 and the metal base material 10 varies depending on the method of forming the ceramic layer 11. Formation methods include physical or chemical vapor deposition, thermal spraying, and coating methods, but thermal spraying and coating methods are unsuitable for forming thin films, and there is a risk that the metal substrate may deteriorate due to thermal effects. There is. Further, chemical vapor deposition (CVD) is also undesirable due to its large thermal influence. Physical vapor deposition (PVD) does not have this thermal effect, and ion silating and sputtering methods have good adhesion to metal substrates and can form a complete oxide ceramic layer. It is also easy to control the film thickness. Some of the preferred metal substrate-ceramic layer-formation method combinations include, for example, Fe or Fe alloy-AJ! 203-ion plating, Cu or Cu alloy-5iO2-sputtering method-Ni alloy-AP203 or TiO2-ion plating. However, it is difficult to obtain a ceramic layer made of a complete oxide by vacuum evaporation, and the adhesion of the obtained ceramic layer to the metal substrate is also unfavorable.

〔実施例〕〔Example〕

第2図に示すように、2枚の金属基板10の周縁部に酸
化物系のセラミック層11を形成し、このセラミック層
11を向い合わせてその間を低融点ガラス層9で封着し
た構造のサンプルを作成した。使用した金属基材10は
20 m11角で厚さ0.25關の1,5% Fe−C
u合金であり、セラミック層11は5μmのA1203
層を高周波励起によるイオンプレーティング法で形成し
、PbO−8203系低融点ガラスを用いて400Cで
封止した。
As shown in FIG. 2, the structure is such that an oxide-based ceramic layer 11 is formed on the periphery of two metal substrates 10, the ceramic layers 11 are faced to each other, and the space between them is sealed with a low-melting glass layer 9. I created a sample. The metal base material 10 used was 1.5% Fe-C with a 20 m square and a thickness of 0.25 mm.
The ceramic layer 11 is made of A1203 with a thickness of 5 μm.
The layer was formed by an ion plating method using high frequency excitation, and sealed at 400C using PbO-8203 low melting point glass.

比較のために、同一寸法で低融点ガラスと接合しやすい
42%Ni−Fe合金の金属基材10を使用した以外は
上記と同様にして同じ構造のサンプルを作成した。
For comparison, a sample with the same structure was prepared in the same manner as described above, except that a metal base material 10 of 42% Ni--Fe alloy, which has the same dimensions and is easily bonded to low-melting glass, was used.

これらのサンプル各100個について、1サイクルが一
65Cから150Cの温度サイクルテストを1000サ
イクル行った後、Heリークテストを実施した。本発明
のサンプルにはリークが全く認められなかったが、比較
例のサンプルには89個にリークが認められた。
For each of these 100 samples, a temperature cycle test was performed for 1000 cycles in which each cycle ranged from 165C to 150C, and then a He leak test was performed. No leaks were observed in the samples of the present invention, but leaks were observed in 89 samples of the comparative example.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、ベース材として金属基材を用いること
により熱放散性に優れ且つ薄型化が容易であり、しかも
金属基材のガラス封止すべき部分にイオンプレーティン
グ法又はスパッタリング法により酸化物系セラミック層
を設けることにより優れたガラス封着性を得ることがで
きる。
According to the present invention, by using a metal base material as a base material, it has excellent heat dissipation properties and can be easily made thin, and the part of the metal base material to be sealed with glass is oxidized by ion plating or sputtering. By providing the physical ceramic layer, excellent glass sealing properties can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係る酸化物系セラミック層を具えた金
属基材の一部の断面図であり、第2図は第1図の金属基
材2枚をガラス封止した封着性テストのサンプルの断面
図である。第3図はガラス−セラミック封止型ノξツケ
ージの分解部品配列斜視図であシ、第4図は第3図のノ
ツ、ゲージを用いてガラス封止した半導体装置の断面図
である。 1・・・半導体チップ、3・・・セラミック基材、4゜
9・・・低融点ガラス層、5・・・リード、6・・・ボ
ンディングワイヤ、7・・・セラミックキャップ、10
・・・金属基材、11・・・セラミック層。
Fig. 1 is a cross-sectional view of a part of a metal substrate provided with an oxide ceramic layer according to the present invention, and Fig. 2 is a sealing test in which two metal substrates of Fig. 1 are sealed with glass. FIG. FIG. 3 is a perspective view of an exploded arrangement of parts of a glass-ceramic sealed type nut cage, and FIG. 4 is a sectional view of a semiconductor device sealed in glass using the nut and gauge of FIG. 3. DESCRIPTION OF SYMBOLS 1... Semiconductor chip, 3... Ceramic base material, 4°9... Low melting point glass layer, 5... Lead, 6... Bonding wire, 7... Ceramic cap, 10
... Metal base material, 11... Ceramic layer.

Claims (4)

【特許請求の範囲】[Claims] (1)半導体チップを載置するベース材として金属基材
を使用し、該金属基材の少なくともガラス封止されるべ
き部分の表面に酸化物系セラミック層を形成し、該酸化
物系セラミック層を介してガラス封止することを特徴と
する半導体装置の封止方法。
(1) A metal base material is used as a base material on which a semiconductor chip is placed, an oxide ceramic layer is formed on the surface of at least a portion of the metal base material to be sealed with glass, and the oxide ceramic layer is 1. A method for sealing a semiconductor device, the method comprising glass-sealing a semiconductor device through a glass sealant.
(2)上記酸化物系セラミック層が、アルミニウム、マ
グネシウム、ケイ素及びチタンの少なくとも1種の酸化
物であることを特徴とする、特許請求の範囲(1)項に
記載の半導体装置の封止方法。
(2) The method for sealing a semiconductor device according to claim (1), wherein the oxide-based ceramic layer is an oxide of at least one of aluminum, magnesium, silicon, and titanium. .
(3)上記酸化物系セラミック層がイオンプレーティン
グ法又はスパッタリング法により形成されたことを特徴
とする、特許請求の範囲(1)項又は(2)項記載の半
導体装置の封止方法。
(3) The method for sealing a semiconductor device according to claim (1) or (2), wherein the oxide ceramic layer is formed by an ion plating method or a sputtering method.
(4)上記金属基材がFe−Ni合金、Fe、Fe合金
、Cu、Cu合金、又はこれらにNi若しくはCrを被
覆した材料であることを特徴とする、特許請求の範囲(
1)〜(3)項のいずれかに記載の半導体装置の封止方
法。
(4) The scope of the claims (
The method for sealing a semiconductor device according to any one of items 1) to (3).
JP23571986A 1986-10-03 1986-10-03 Sealing method for semiconductor device Pending JPS6390157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23571986A JPS6390157A (en) 1986-10-03 1986-10-03 Sealing method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23571986A JPS6390157A (en) 1986-10-03 1986-10-03 Sealing method for semiconductor device

Publications (1)

Publication Number Publication Date
JPS6390157A true JPS6390157A (en) 1988-04-21

Family

ID=16990216

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23571986A Pending JPS6390157A (en) 1986-10-03 1986-10-03 Sealing method for semiconductor device

Country Status (1)

Country Link
JP (1) JPS6390157A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0443017U (en) * 1990-08-07 1992-04-13

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0443017U (en) * 1990-08-07 1992-04-13

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