JPS6388663A - Data transmission control system - Google Patents

Abstract

PURPOSE:To prevent a faulty operation due to the disorder of a transmission data at the time of inserting-extracting a board by prohibiting the output of a transmission data from other boards during the time in which the board is being inserted or extracted. CONSTITUTION:An inputted pulse 100, after shaping the waveform by a Schmitt trigger circuit 22, is inputted to a T-flip-flop (FF) 23, and the TFF 23 outputs a control signal 300to stop the operation of a CPU 24, and thus the transfer of a data 400 outputted from the data output terminal D of the CPU 24 is stopped. Then, when a pulse signal 200 is inputted, the pulse 200, after being waveform-shaped, is inputted to the TFF 23, the TFF 23 stops the outputting of control signal 300 being outputted until now, and the CPU 24 starts its operation again, and a data 400 is outputted from its output terminal D. Therefore, upon starting the insertion of a board, the data transmission from the CPU 24 is stopped, but started upon the end of insertion. Still more, while the board is extracted, the input order of the pulse signals 100, 200 is inverted. As a result, a faulty operation can be prevented.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention provides a data transfer control system for computers, communication equipment, etc., which is constructed by combining a plurality of pluggable and removable boards mounted with various circuits. Regarding.

(Prior Art) Conventionally, this type of computer, communication equipment, etc. has a plurality of boards 1 on which various circuits (or the same circuit) are mounted, as shown in FIG.
is connected to the common bus 2 via the connector 3 in a freely insertable and removable manner.

By the way, when inserting and removing the board 1 with a live wire, measures are taken to prevent the circuit elements on the board 1 to be inserted and removed from deteriorating or being destroyed due to the turning on and off of the N source at the time of insertion. Countermeasures include turning the power on after the board is fully inserted to supply power to the circuitry on the board, or turning the power off before removing the board to cut off the power supply to the circuitry on the board. A switch is provided. In addition, as shown in Fig. 5, the lengths of the contacts 4-1 to 4-n of the plug portion of each board 1 are made different, and when inserting the contact 0■, the female contact on the common bus 2 side (Fig. (not shown), then the power supply contact, and finally the signal contact, and then the female contact on the common bus 2 side, and when handling the board, the above order is reversed. This prevents deterioration or destruction of elements on the board.

Although the above measures are effective against electrical breakdown and deterioration of the circuit elements on the board 1, they are not sufficient against disturbances in transferred data caused by the restoration of the board 1. That is, one board 1 transfers data to another board 1 via the common bus 2.
If another board 1 is placed 1 m away from another board 1 while data is being transferred to the board, the impedance of the common bus 2 will become unstable during that transition, causing distortion in the waveform of the transferred data or noise, which may cause malfunctions. There was a drawback.

(Problem to be Solved by the Invention) In conventional gates, communication gates, etc., which are made up of multiple boards mounted with various circuits that are reversibly connected, when the board is connected to a live wire, this board There is a drawback that when a return is made, data being transferred between other boards is disturbed, causing malfunctions. SUMMARY OF THE INVENTION Therefore, the present invention aims to eliminate the above-mentioned drawbacks, and aims to provide a data transfer control method that prevents malfunctions due to disturbances in transferred data by stopping data transfer to a data transfer source when a board is inserted. shall be.

[Structure of the Invention] (Means for Solving the Problems) The data transfer control system of the present invention is provided in an apparatus in which a plurality of boards mounted with various circuits are reversibly connected, and the board is inserted Or, when removing the board, a switch means that generates a potential change in the connecting part of the board when the board is inserted or removed at the beginning or end, and a switch means that captures the potential change to start or end the board insertion or removal. The method further comprises a board push detection means for outputting a pulse signal to notify the board, and a data transfer inhibiting means for stopping data transfer during a board insertion or removal period according to the pulse signal. Sometimes, a method is adopted in which the data transfer operations of other boards are stopped.

(Function) In the data transfer control system of the present invention, the switch means is turned on and off at the start and end of insertion or removal of a board, thereby causing a potential change in the plug portion. When the board insertion/removal detection means detects the potential change, it outputs a pulse signal through the plug of the board to notify the start and end of insertion or removal of the board. The data transfer inhibiting means of the board in the process of data transfer that receives or receives the pulse signal performs an operation to stop data transfer during the insertion or removal period of the board in response to the pulse signal.

(Example) An example of the present invention will be described below with reference to the drawings. 1st
The figure is a circuit diagram showing an embodiment of a switch means and a board return detection means for implementing the data transfer control system of the present invention. 11.20 is the longest contact on the plug part of the board (contact 20 is slightly longer than contact 11), 12 is the shortest contact on the plug part of the board, and 13.14 is the contact 11. 12 is a pull-up resistor that marks a constant potential Vcc 7JD, 15.16 is a Schmitt trigger circuit that shapes the potential change of contactors 1-11.12 into a waveform, and 17.18 is a pulse signal by the output of Schmitt trigger circuit 15.16. 19 is a pulse generation circuit that outputs pulse signals 100 and 200, and 19 is a pulse signal 100 and 2.
It is a circuit that takes the logical sum of 00. However, the pulse signals 100 and 200 have the same waveform.

Next, the operation of this embodiment will be explained. First, when the board on which the above circuit is mounted is inserted, the contacts 20 and 11 of the plug portion first come into contact with a female contact (not shown) on the common bus side. As a result, the potential of the contact 11 changes from the potential Vcc to the ground level. This potential change is shaped into a waveform by the Schmitt trigger circuit 15 and then input to the pulse generation circuit 17. The pulse generating circuit 17 outputs a single pulse 100 when detecting the potential change. This pulse 100 is oagu(
Output from the contact 20 via the circuit 19 onto a common bus (not shown). Next, contact the plug of this board just before the board is finally inserted! 12 is the ground level. The Schmitt trigger circuit 16 shapes the potential change of the contact 12 into a waveform and outputs it to the pulse generation circuit 18. The pulse generating circuit 18 generates a pulse 200 according to the potential change, and sends this to the or game 1.
The output signal is output from the tact 20 to the common bus via the tact circuit 19. Also, when removing a board, contacts 1 to 12 are the female contacts on the common bus side! - is released from 11. and goes to contact 1 just before the board removal is completed.
20 will be released. Therefore, when the contact 12 is opened, a potential change occurs at the :] contact in the same manner as described above, so that the pulse 200 is outputted from the pulse generating circuit 18 to the contact 1 via 20 ( ) onto the common bus. Thereafter, due to the potential change to the contact 1 that occurs when the contact 11 is opened, a pulse 100 is generated from the pulse generating circuit 17, and this pulse is outputted onto the common bus via the contact 20.

FIG. 2 is a circuit diagram illustrating an embodiment of data transfer inhibiting means for realizing the data transfer control method of the present invention. 21.
25 is a contact of the board connector, 22 is a Schmidts trigger circuit that shapes the pulse signal 100.200 inputted from the contactor 1-21, and 23 outputs a control signal 300 when the first pulse is inputted. Then, when the next pulse is input, the output of the control signal 300 is stopped.
The flip-flop circuit 24 is a CPU that transfers data to other boards.

Next, the operation of this embodiment will be explained. Contact 1-2
1, when a pulse 100 is input, this pulse 10
0 is waveform-shaped by the Schmidts t-1-rigger circuit 22 and then input to the T flip-flop 23.

As a result, the T flip-flop 23 outputs the control signal @3OO to the bold terminal H of the CPU 24 to stop the operation of the CPU 24, and the transfer of the data 400 that has been output from the data output terminal of the CPU 24 is stopped.

Next, when a pulse signal @200 is input via the contactor 1-21, this pulse signal 200 is waveform-shaped by the Schmitt trigger circuit 22 and then input to the T flip-flop 23. The T-flip 70 knob 23 stops the output of the υ control (i.
4 starts operating again and outputs data 400 from its data output terminal via contact 25 onto a common bus (not shown). Therefore, as soon as the board starts to be inserted, the CP
Data transfer from tJ24 is prohibited, and data transfer from CPU 24 is restarted when the insertion is completed. Incidentally, when the board is removed, the input order of the pulse signals 100.200 inputted from the contacts i to 21 is simply reversed, and similarly, data transfer from the CPU 24 is prohibited during the board 1 removal period.

According to this embodiment, when the board is inserted, a pulse signal of 100
．． 200 is output, and this pulse signal ioo.

The CPU on the board that is the subject of data transfer that received 200? 4
is controlled by the circuit shown in FIG. 2 to stop data transfer during the board insertion period. Therefore, the transferred data 400 is not disturbed when the board is returned to the board, and malfunctions caused by this can be prevented.

Note that each board constituting the device is normally equipped with both the circuits shown in FIGS. 1 and 2, but a board without a data transfer function may be equipped with only the circuit shown in FIG. 1.

FIG. 3 is a circuit diagram showing another embodiment of the data transfer inhibiting means shown in FIG. 2. Usually, T flip-flop 2
The control signal 300 output from G is at a high level and opens the AND gate 27. Therefore, the transfer data 4
00 passes through this AND gate 27 and is output onto the common bus. However, when another board is inserted, for example, the pulse signal 10 is sent to the T flip-flop 26 via the Schmitt 1 hemlock circuit 28, as described in the previous embodiment.
0 is input, and this pulse signal 100 causes the control signal g3QQ outputted from the T flip-flop 26 to become low level. Therefore, a) the spikes 1 to 27 are closed and the output of the transfer data 400 is stopped. In this state, when the next pulse signal 200 is input to the T flip-flop 26 via the trigger circuit 28 to the Schmidt 1, the flip-flop 26 again receives the control signal 30.
0 is set to high level, AND gate 27 is opened, and output of transfer data 400 is started. In the end, this example also stops the output of the transfer data during the board recovery period and achieves the same effect as the previous example, but the transfer data is turned on and off regardless of the CPU operating clock. be able to.

[Effects of the Invention] As described above, according to the data transfer control means of the present invention, by prohibiting the output of transfer data from other boards during the period when the board is pressed, disturbances in the transfer data when the board is returned are prevented. This has the effect of preventing malfunctions due to

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the data transfer control method of the present invention, the switching means and the hold return detection means, and FIG. 2 is the circuit diagram of the data transfer inhibiting means realizing the data transfer control method of the present invention. A circuit diagram showing one embodiment, FIG. 3 is a circuit diagram showing another embodiment of the data transfer inhibiting means shown in FIG. 2, and FIG. 4 is a circuit diagram showing a plurality of boards mounted with various conventional circuits. FIG. 5 is a block diagram illustrating an example of a device made of the same, and FIG. 5 is a diagram showing an example of the plug portion of the board shown in FIG. 4. 11, 12.21.25... Contact 13, 14.
...Pull-up resistor 15, 16.22.28...Schmitts 1 to Riga circuit 17, 18...Pulse generation circuit 19...OR circuit 23, 26...T flip-flop circuit 24... C
PU 27...ANDGATE agent Patent attorney Nori Chika Yudo Sanno - Figure 2 Figure 3

Claims (1)

[Claims] In a device consisting of a plurality of boards mounted with various circuits connected in a freely insertable and removable manner, when inserting or removing the board, a potential change is applied to the connecting part of the board at the beginning and end of the insertion or removal of the board. board insertion/removal detection means for capturing the potential change and outputting a pulse signal to notify the start and end of board insertion or removal; 1. A data transfer control method comprising: data transfer prohibition means for stopping transfer of data.