JPS6387877A - Digital video synthesis circuit - Google Patents

Abstract

PURPOSE:To decrease the circuit scale by incorporating a YM signal into a YS signal by an analog part so as to eliminate the need for a D/A converter and a double speed conversion circuit. CONSTITUTION:The input signals YS, YM are added by an adder circuit 30 and digitized into YS1 by an A/D converter 2. Further, the part of the YS is completely 0 by subtracting the YS1 from the output luminance signal Y1 and the color difference signals U1, V1 of the digital signal demodulation circuit 6 by subtractor circuits 21-23 and the YM part is subtracted by a constant (a). Then character signals Y3, U3, V3 are added to a part extracted by the YS1 at the adder circuits 24-26. Thus, the YM operation is realized by a simple adder circuit without using an A/D converter, a double speed conversion circuit and a D/A converter and the circuit scale is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a digital video synthesis circuit for synthesizing digitized video signals and character signals.

Conventional Technology In recent years, with the development of digital technology, digital TVs have been announced, and superimposition, which superimposes images and text, has been introduced to enhance additional functions. A conventional digital video signal synthesis circuit will be described below with reference to the drawings.

FIG. 2 shows a block diagram of a conventional digital video signal synthesis circuit. In Figure 2, 1 to 5 are A/
6 is a digital video signal demodulation circuit, 7 is a double speed conversion circuit, 9 to 11 are D/A converters, 16 is an RGB conversion circuit, and 18 is a CR7 display device. Also, 20 is YU
V matrix circuit, 21 to 23 are subtracters, 23 to 26 are adders, 27 is an A/D converter, 28 is a double speed conversion circuit, and 29 is a D/A converter.

The operation of the digital video signal synthesis circuit configured as described above will be explained below with reference to the signal waveforms shown in FIG. 3. In FIG. 2, first, a composite video signal (see FIG. 3(a)) is digitized by an A/D converter 1, and is then digitized by a digital video signal demodulation circuit 6 as shown in FIG. 3(b).
, (C) and (d), they are demodulated into digital luminance/color difference signals Y1, Ul, and Vl, respectively. Here, the waveforms in FIG. 3 are analog waveforms for the sake of explanation, and the numerical values represent amplitudes. On the other hand, Fig. 3(e),
Character signals such as those shown in (f) and (g) 0R
The GB signals C*D*'' are converted by the YUV matrix circuit 20 into luminance/color difference signals Y2, U2, and V2, respectively, as shown in Φ), (i), and lj) in FIG. It is digitized by A/D converters 3 and 4.5.

At this time, the YUV matrix circuit 2o is created from RGB signals, and the relationship generally satisfies the following equation.

Y2:0.3R+0.69G-)-0,11BU2=B
-Y2 V2=R-Y2 Furthermore, the switching signal (Ys)B for screen composition shown in FIG. 4(k) is digitized by the A/D converter 2,
It is added to the subtracter 23 as the Ysl signal. Ys
As shown in FIG. 4 (example), the l signal outputs a character signal when the signal level is high, and outputs a video signal when the signal level is low. The switching signal Y is originally a switching signal, but if it is processed as a 1-bit signal, jitter will occur in the cycle of the sampling clock, so it is processed as an n-bit signal. Therefore, the switching is done in stages.

Next, the entire screen composition method will be explained, focusing on the Y signal. In this case, the luminance signal will be explained as a representative.

By subtracting the switching signal Y,1 i shown in FIG. 4(k) from the video luminance signal Y1 shown in FIG. )
A signal Y' as shown in is obtained. That is, Y51
When the signal Y1 is large, the component of the video luminance signal Y1 becomes small. Furthermore, since subtraction is performed, switching is performed smoothly in stages. Furthermore, the adder 24 converts the character luminance signal Y3 shown in FIG. 4(m) into
By being added to the signal Y', as shown in FIG.
As shown in FIG. 2, a luminance signal Y'' is obtained by combining the video and character signals.

At this time, the hatched part in FIG. 4(0) becomes the part of the synthesized character signal.

Further, the synthesized luminance signal Y/l is converted into a double speed conversion circuit 7
The waveform Y4 shown in Figure 4) is
I get it. Thereafter, the signal Y4 is converted into an analog signal by the D/A converter 9. Similarly, the color difference signals are also processed to obtain the signals Us, V5'ii. Then, in the RGB conversion circuit 1e, the Y5, US, and V6 signals are transferred to the CRT.
In order to fully drive the display device 18, RGB signals R5 and Gs
, B5 and displayed.

On the other hand, YM is digitized by the A/D converter 27 (waveform (1>)), doubled in speed by the double speed conversion circuit 28 (waveform (r)), and converted back to analog by the D/A converter 29. In the RGB conversion circuit 16, when the YM-fold signal is at a high level, the contrast is reduced by a certain level.

Problems to be Solved by the Invention However, in the circuit configuration shown in Fig. 2, an A/D converter t''/large converter 1 constant-speed conversion circuit is required for double-speed conversion, and the circuit size is increased. It had the problem of becoming large.

In view of the above problems, the present invention provides an inexpensive and practical circuit that can perform YM operation before the input to the A/D converter, that is, in the analog domain.

Means for Solving the Problems In order to solve the above problems, the digital video synthesis circuit of the present invention includes an A/D converter that digitizes a video signal, and a digital luminance 9 color difference signal from the digitized signal. A digital signal adjustment circuit that generates a digital signal, an addition circuit that adds YM to Y, and an A/D converter that digitizes it.
Digital brightness.

A subtraction circuit that subtracts the digitized (Y, +Y,) from the color difference signal, an addition circuit that adds all nine character digital luminance color difference signals, and a double speed conversion circuit that doubles the density of the combined signal. Digital brightness.

It consists of a D/A converter that converts color difference signals to analog, an RGB conversion circuit that converts the analog luminance 1 color difference signal to R, C, and B signals, and a CRT display device that displays images using RGB signals. It was profitable.

According to the present invention, by incorporating the YM multiplied signal into the Y8 signal in the analog part with the above-described configuration, YM operation is performed by subtracting a certain constant from the video signal.

A D/A converter and a double speed conversion circuit are not required, and the circuit scale can be reduced.

EXAMPLE An example of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of a digital video signal synthesis circuit in one embodiment of the present invention. In FIG. 1, 1 to 6 are human/D converters, 6 is a digital signal demodulation circuit, A is a double speed conversion circuit, 9 to 11 are D/A converters,
16 is an RGB conversion circuit, 21 to 23 are subtraction circuits, and 24 to 23 are subtraction circuits.
26 is an adder circuit, 2o is a Y, U, V matrix 22 circuit,
The above is the same as in Figure 2. Further, 30 is an adder circuit.

The operation of the digital video signal synthesis circuit configured as described above will be explained below using FIG. 6.

When input signals Y, , Y, are given as shown in FIG. 6(S) I (t), they are added in the adder circuit 30 (see FIG. 5), digitized by the A/D converter 2, and Ysl
(Figure 6 (U)).

In addition, the output luminance signal Y1. of the digital signal demodulation circuit 6. Color difference signal U1. Ys by subtraction circuits 21 to 23 from V1
By subtracting l f, the ・part of Y8 becomes completely 0, and the part of YM is subtracted by a certain constant &(&
is determined by the resistor 31 in FIG. 6) as shown in FIG. 6ff). Next, adding circuits 24 to 26 add character signals Y3, U3,
V3 is added (Fig. 6 (W)). Thereafter, as described in the conventional example, the outputs Y'', U'/, and v' of each adder circuit 24, 25, 26 (7) are converted to a double speed conversion circuit, respectively. 7, converted into analog signals by D/A converters 9 to 11, and converted into R, G, and B signals by an R, G, and B conversion circuit 16 to drive a CRT display device 18.

FIG. 5 shows a specific example of the adder circuit 30. One end of resistor 31? Connected to the anode of diode 32 and also connected to resistor 3
The other end of the diode 32 is connected to the YM input end, and the cathode of the diode 32 is connected to the Ys input end. diode 320
The cathode also serves as an output terminal.

Effects of the Invention As described above, according to the present invention, the operation of YM is A/
The D converter 1 can be realized by a simple addition circuit without using a speed conversion circuit or a D/A converter, and 11 it has a great effect on practical application by reducing the circuit scale.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a digital video synthesis circuit according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a conventional video synthesis circuit,
FIGS. 3, 4, 6, and 6 are waveform diagrams and circuit diagrams for explaining the operation of the circuits shown in FIGS. 1 and 2, respectively. 1-5...A/D converter, 6...
Signal demodulation circuit, 7... Double speed conversion circuit, 9 to 11
...D/A converter, 16...RGB conversion circuit, 18...CRT display device, 20...
...YUV matrix circuit, 21-23...
Subtraction circuit, 24-26.30... Addition circuit. Name of agent: Patent attorney Toshio Nakao and one other person
3 Figure (j2-ty, 76-- -6,3f□Figure 4

Claims (2)

[Claims] (1) A plurality of first digital signals, a plurality of second digital signals, a third signal, an addition circuit that adds a fourth signal to the third signal, and the third signal. an A/D converter that digitizes a fifth signal obtained by adding the fourth signal and the first digital signal;
A digital video synthesis circuit comprising: a subtracter for subtracting a signal; and an addition circuit for adding the subtracted signal and the second digital signal. (2) An adding circuit that adds the third signal and the fourth signal,
A patent claim comprising: a resistor connected in series to the fourth signal; and a diode, one end of which is connected to an anode, and the cathode side of the diode is connected to the third signal. The digital video synthesis circuit according to item 1.