JPS6385911A - Servo circuit - Google Patents

Servo circuit

Info

Publication number
JPS6385911A
JPS6385911A JP61231831A JP23183186A JPS6385911A JP S6385911 A JPS6385911 A JP S6385911A JP 61231831 A JP61231831 A JP 61231831A JP 23183186 A JP23183186 A JP 23183186A JP S6385911 A JPS6385911 A JP S6385911A
Authority
JP
Japan
Prior art keywords
circuit
discrimination
digital
motor
pwm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61231831A
Other languages
Japanese (ja)
Other versions
JP2563908B2 (en
Inventor
Kenji Shimoda
下田 乾二
Shuhei Kanda
神田 修平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP61231831A priority Critical patent/JP2563908B2/en
Publication of JPS6385911A publication Critical patent/JPS6385911A/en
Application granted granted Critical
Publication of JP2563908B2 publication Critical patent/JP2563908B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To simplify circuit constitution, by constituting a character compensation circuit to an adder circuit with a digital circuit, and providing a PWM (pulse width modulation) circuit at the rear stage of the adder circuit. CONSTITUTION:An analog AFC (automatic frequency control) signal, after being digital-signalized at an amplifying and waveform arranging circuit 31, is inputted to a speed discrimination circuit 32, and is used for the discrimination of the rotation speed of a motor. The output is inputted to the characteristic compensation circuit 33, and is processed so as to obtain a required control characteristic. An APC signal is also digital-signalized at an amplifying and waveform arranging circuit 34, and is inputted to a phase discrimination circuit 35, and is used for the discrimination of the rotation phase of the motor. The output is processed so as to obtain the required control characteristic at a characteristic compensation circuit 36. The outputs of both characteristic compensation circuits 33 and 36, after being added at the adder circuit 37 constituted as the digital circuit, are PWMed at the PWM circuit 38. The output of the PWM, after being rectified at a rectifier circuit 39, is sent to the motor 40, and controls the rotation of the motor.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) この発明は、モータ等の回転体の回転速度及び回転位相
を制御するサーボ回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a servo circuit that controls the rotational speed and rotational phase of a rotating body such as a motor.

(従来の技術) モータ等の回転速度及び回転位相を制御するサーボ回路
として、速度比較回路や位相比較回路をデジタル回路と
するデジタルサーボ回路がある(文献■ディジタル制御
方式によるVTRサーボ、片山、NHK技研、月報昭和
46年10月、■Digital Signal Pr
ocessing LSI for Hol1e VC
R3ervo ct−rcutt、印材 IEEE T
rans、 CE−25,41979年8月)。
(Prior art) As a servo circuit that controls the rotational speed and rotational phase of a motor, etc., there is a digital servo circuit in which a speed comparison circuit and a phase comparison circuit are digital circuits (Reference ■VTR servo using a digital control method, Katayama, NHK Giken, monthly report October 1971, ■Digital Signal Pr
ocessing LSI for Hol1e VC
R3ervo ct-rcutt, stamp material IEEE T
rans, CE-25, August 41979).

このデジタルサーボ回路における速度比較出力や位相比
較出力(いずれも2進データ)をモータに供給するため
の出力インターフェースとしては、2進データをディジ
タル的にパルス幅変調(以下、PWMと記す)して出力
する方式のものが用いられている。また、モータ等の低
消費電力駆動方式としては、スイッチングレギュレータ
形式の駆動方式が知られている。
As an output interface for supplying the speed comparison output and phase comparison output (both binary data) to the motor in this digital servo circuit, the binary data is digitally pulse width modulated (hereinafter referred to as PWM). An output method is used. Further, as a low power consumption drive method for motors and the like, a switching regulator type drive method is known.

第4図は、出力インターフェースの方式や駆動方式にそ
れぞれ上述した方式をもつサーボ回路の構成を示すブロ
ック図である。
FIG. 4 is a block diagram showing the configuration of a servo circuit having the above-mentioned output interface method and drive method, respectively.

第4図において、モータから帰還されてきたモータの回
転速度を示す自動周波数制御(以下、AFCと記す)信
号は、増幅・波形整形回路第1゜速度弁別回路12.P
WM回路13.リップルフィルタ14.特性補償回路1
5を介して加算・増幅回路16に入力される。一方、モ
ータから帰還されてきたモータの回転位相を示す自動位
相制御(以下、APCと記す)信号も、増幅・波形整形
回路172位相比較回路18.PWM回路19゜リップ
ルフィルタ20.特性補償回路21を介して加算・増幅
回路16に与えられる。この加算・増幅回路16の出力
はPWM回路22.整流回路23を介してモータ24に
与えられ、このモータ24の回転速度及び回転位相を制
御する。
In FIG. 4, an automatic frequency control (hereinafter referred to as AFC) signal indicating the rotational speed of the motor, which is fed back from the motor, is transmitted to the amplification/waveform shaping circuit 1.degree. speed discrimination circuit 12. P
WM circuit 13. Ripple filter 14. Characteristic compensation circuit 1
5 to the adder/amplifier circuit 16. On the other hand, an automatic phase control (hereinafter referred to as APC) signal indicating the rotational phase of the motor, which is fed back from the motor, is also transmitted to the amplification/waveform shaping circuit 172, the phase comparison circuit 18. PWM circuit 19° ripple filter 20. It is applied to the addition/amplification circuit 16 via the characteristic compensation circuit 21. The output of this addition/amplification circuit 16 is the PWM circuit 22. The signal is applied to the motor 24 via the rectifier circuit 23 to control the rotational speed and rotational phase of the motor 24.

速度弁別回路12や位相弁別回路18は上記の如くデジ
タル回路化されている。リップルフィルタ14.20は
、特性補償回路15.21や加算・増幅回路16がアナ
ログ回路であるため、PWM回路13.19の出力を直
流化するものである。
The speed discrimination circuit 12 and the phase discrimination circuit 18 are digital circuits as described above. Since the characteristic compensation circuit 15.21 and the addition/amplification circuit 16 are analog circuits, the ripple filter 14.20 converts the output of the PWM circuit 13.19 into DC.

また、このように加算・増幅回路16等がアナログ回路
であるため、後段には、PWM回路22が設けられ、フ
ィルタ14.20でアナログ化された信号を再びデジタ
ル信号に戻すようになっている。
Furthermore, since the addition/amplification circuit 16 and the like are analog circuits, a PWM circuit 22 is provided at the subsequent stage to convert the signal converted into an analog signal by the filter 14.20 back into a digital signal. .

第5図に、第4図の一部の具体回路を示す。この第5図
では、PWM回路22における比較用の基準信号として
のこぎり波を示す。
FIG. 5 shows a part of the specific circuit shown in FIG. 4. FIG. 5 shows a sawtooth wave as a reference signal for comparison in the PWM circuit 22. In FIG.

しかし、上記構成においては、PWMを2回行う必要が
あるため、回路構成が複雑になるという問題があった。
However, in the above configuration, there is a problem in that the circuit configuration becomes complicated because it is necessary to perform PWM twice.

(発明が解決しようとする問題点) 以上述べたように、モータに対する制御信号供給方式と
してPWM方式を採用し、モータの駆動方式としてスイ
ッチングレギュレータ方式を採用するサーボ回路におい
ては、従来、PWMの重複により、回路構成が複雑にな
るという問題があった。
(Problems to be Solved by the Invention) As described above, in a servo circuit that employs a PWM method as a control signal supply method to a motor and a switching regulator method as a motor drive method, PWM overlap has conventionally been used. Therefore, there was a problem that the circuit configuration became complicated.

そこでこの発明は、PWMの重複を排し、回路構成の簡
単なサーボ回路を提供することを目的とする。
Therefore, an object of the present invention is to eliminate duplication of PWM and provide a servo circuit with a simple circuit configuration.

[発明の構成] (問題点を解決するための手段) 上記目的を達成するためにこの発明は、特性補償回路や
加算回路をデジタル回路とし、この加算回路の後段のP
 W M回路を設けるようにしたものである。
[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the present invention uses a characteristic compensation circuit and an addition circuit as digital circuits, and a P in the latter stage of the addition circuit.
A WM circuit is provided.

(作用) 上記構成によれば、PWMが1回で済むので、回路構成
の簡易化を図ることができる。
(Function) According to the above configuration, since PWM only needs to be performed once, the circuit configuration can be simplified.

(実施例) 以下、図面を参照してこの発明の一実施例を詳細に説明
する。
(Embodiment) Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

第1図はこの発明の一実施例の構成を示すブロック図で
ある。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

この第1図において、アナログのAFC信号は増幅・波
形整形回路31でデジタル信号化された後、デジタル回
路化された速度弁別回路32に入力され、モータの回転
速度の弁別に供される。この弁別出力は、デジタル回路
として構成された特性補償回路33に入力され、所要の
制御特性が得られるように処理される。
In FIG. 1, an analog AFC signal is converted into a digital signal by an amplification/waveform shaping circuit 31, and then inputted to a speed discrimination circuit 32, which is a digital circuit, and is used to discriminate the rotational speed of the motor. This discrimination output is input to a characteristic compensation circuit 33 configured as a digital circuit, and processed so as to obtain a desired control characteristic.

APC信号も増幅・波形整形回路34でデジタル信号化
された後、位相弁別回路35に入力され、モータの回転
位相の弁別に供さ゛れる。この弁別出力は、特性補償回
路36で所要の制gAvf性が得られるように処理され
る。この場合も、位相弁別回路35.特性補償回路36
はデジタル回路として構成される。
The APC signal is also converted into a digital signal by the amplification/waveform shaping circuit 34, and then input to the phase discrimination circuit 35, where it is used to discriminate the rotational phase of the motor. This discrimination output is processed by the characteristic compensation circuit 36 so as to obtain the required gAvf control property. In this case as well, the phase discrimination circuit 35. Characteristic compensation circuit 36
is configured as a digital circuit.

両特性補償口133.36の出力は、デジタル回路とし
て構成される加算回路37で加算された後、PWM回路
38でPWMされる。このP W M出力は整流回路3
9で整流された後、モータ40に与えられ、その回転を
制御する。
The outputs of both characteristic compensation ports 133 and 36 are added by an adder circuit 37 configured as a digital circuit, and then PWMed by a PWM circuit 38. This PWM output is the rectifier circuit 3
After being commutated at 9, it is applied to a motor 40 to control its rotation.

第2図はデジタル回路として構成される加算回路33.
36の回路構成の一例を示すものであり、同図(b)は
、従来使われていたアナログの加算回路の構成を示すも
のである。
FIG. 2 shows an adder circuit 33 configured as a digital circuit.
FIG. 36 shows an example of the circuit configuration of a conventional analog adder circuit. FIG.

この場合、それぞれの利(9Ga、Gbを示すと次のよ
うになる。
In this case, the respective benefits (9Ga, Gb) are as follows.

第3図(a)はデジタル回路として与えられる特性補償
回路36の回路構成の一例を示すものであり、同図(b
)は、従来使われていたアナログの特性補償回路の構成
を示すものである。
FIG. 3(a) shows an example of the circuit configuration of the characteristic compensation circuit 36 provided as a digital circuit, and FIG.
) shows the configuration of a conventionally used analog characteristic compensation circuit.

この場合、それぞれの利IWGa、Gbは、次のように
表わされる。
In this case, the respective profits IWGa and Gb are expressed as follows.

1−FZ−’     ・・・(3) 以上詳述したようにこの実施例によれば、特性補償回路
33.36や加算回路37をデジタル回路化したので、
速度弁別回路32や位相弁別回路33の出力を直流化す
る必要がない。したがって、この実施例では、PWMが
1回で済み、回路構成の簡易化が図られる。
1-FZ-' (3) As detailed above, according to this embodiment, the characteristic compensation circuits 33, 36 and the adder circuit 37 are converted into digital circuits.
There is no need to convert the outputs of the speed discrimination circuit 32 and the phase discrimination circuit 33 into direct current. Therefore, in this embodiment, PWM only needs to be performed once, and the circuit configuration can be simplified.

また、この実施例では、PWM回路38を加算回路37
の後段に設けたので、PWM回路が1つで済み、回路構
成は、さらに簡易なものとなる。
Further, in this embodiment, the PWM circuit 38 is replaced by the adder circuit 37.
Since it is provided at the subsequent stage, only one PWM circuit is required, and the circuit configuration becomes even simpler.

また、この実施例によれば、スイッチングレギュレータ
方式における基準発振信号周波数の固定化を図れるとと
もに、デジタルフィルタやアンプを集積回路に内蔵する
ことにより、外付は回路の部品点数の削減を図ることが
できるという利点がある。
Furthermore, according to this embodiment, it is possible to fix the reference oscillation signal frequency in the switching regulator system, and by incorporating the digital filter and amplifier into the integrated circuit, it is possible to reduce the number of external components in the circuit. It has the advantage of being possible.

[発明の効果1 以上述べたようにこの発明によれば、回路構成の簡単な
サーボ回路を提供することができる。
[Advantageous Effects of the Invention 1] As described above, according to the present invention, a servo circuit with a simple circuit configuration can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例の構成を示すブロック図、
第2図は加算回路の具体例を示す回路図、第3図は特性
補償回路の具体例を示す回路図、第4図は従来のサーボ
回路の構成を示すブロック図、第5図は第4図の一部の
具体例を示す回路図である。 31.34・・・増幅・波形整形回路、32・・・速度
弁別回路、35・・・位相比較回路、33.36・・・
特性補償回路、37・・・加算回路、38・・・PWM
回路、39・・・整流回路、40・・・モータ。 出願人代理人 弁理士 鈴江武彦 第1図 第3図
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
Fig. 2 is a circuit diagram showing a specific example of an adder circuit, Fig. 3 is a circuit diagram showing a specific example of a characteristic compensation circuit, Fig. 4 is a block diagram showing the configuration of a conventional servo circuit, and Fig. 5 is a circuit diagram showing a specific example of a characteristic compensation circuit. FIG. 3 is a circuit diagram showing a specific example of a part of the diagram. 31.34... Amplification/waveform shaping circuit, 32... Speed discrimination circuit, 35... Phase comparison circuit, 33.36...
Characteristic compensation circuit, 37... Addition circuit, 38... PWM
Circuit, 39... Rectifier circuit, 40... Motor. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 3

Claims (1)

【特許請求の範囲】 デジタル回路によって構成され、回転体より帰還される
該回転体の回転速度を示す信号からその回転速度を弁別
する回転速度弁別手段と、デジタル回路によって構成さ
れ、上記回転速度弁別手段の弁別出力を、所要の特性を
もつように補正する第1の特性補償手段と、デジタル回
路によつて構成され、上記回転体から帰還される該回転
体の回転位相を示す信号からその回転位相を弁別する回
転位相弁別手段と、デジタル回路によって構成され、上
記回転速度弁別手段の弁別出力を、所要の特性をもつよ
うに補正する第2の特性補償手段と、 デジタル回路によつて構成され、上記第1、第2の特性
補償手段の補償出力を加算する加算手段と、 この加算手段の加算出力をパルス幅変調して上記回転体
の回転制御信号を得るパルス幅変調手段とを具備したこ
とを特徴とするサーボ回路。
[Scope of Claims] Rotation speed discrimination means constituted by a digital circuit and for discriminating the rotation speed of the rotary body from a signal indicating the rotation speed of the rotary body fed back from the rotary body; a first characteristic compensating means for correcting the discrimination output of the means to have a desired characteristic; and a digital circuit, the rotation of which is determined from a signal indicating the rotational phase of the rotating body fed back from the rotating body; A rotational phase discrimination means for discriminating the phase, and a second characteristic compensation means for correcting the discrimination output of the rotational speed discrimination means, which is constituted by a digital circuit and has a desired characteristic, and a digital circuit. , comprising an addition means for adding the compensation outputs of the first and second characteristic compensation means, and a pulse width modulation means for pulse width modulating the addition output of the addition means to obtain a rotation control signal for the rotating body. A servo circuit characterized by:
JP61231831A 1986-09-30 1986-09-30 Servo circuit Expired - Lifetime JP2563908B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61231831A JP2563908B2 (en) 1986-09-30 1986-09-30 Servo circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61231831A JP2563908B2 (en) 1986-09-30 1986-09-30 Servo circuit

Publications (2)

Publication Number Publication Date
JPS6385911A true JPS6385911A (en) 1988-04-16
JP2563908B2 JP2563908B2 (en) 1996-12-18

Family

ID=16929700

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61231831A Expired - Lifetime JP2563908B2 (en) 1986-09-30 1986-09-30 Servo circuit

Country Status (1)

Country Link
JP (1) JP2563908B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0294169A (en) * 1988-09-30 1990-04-04 Toshiba Corp Disc motor controller

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511050A (en) * 1974-06-23 1976-01-07 Kotaro Hirano Teiikitsuka oyobi koikitsukadeijitarufuiruta
JPS5856101A (en) * 1981-09-30 1983-04-02 Toshiba Corp Digital servo device
JPS6013488A (en) * 1983-07-05 1985-01-23 Sony Corp Digital phase servo circuit
JPS60241784A (en) * 1984-05-15 1985-11-30 Sanyo Electric Co Ltd Controller of dc servo motor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511050A (en) * 1974-06-23 1976-01-07 Kotaro Hirano Teiikitsuka oyobi koikitsukadeijitarufuiruta
JPS5856101A (en) * 1981-09-30 1983-04-02 Toshiba Corp Digital servo device
JPS6013488A (en) * 1983-07-05 1985-01-23 Sony Corp Digital phase servo circuit
JPS60241784A (en) * 1984-05-15 1985-11-30 Sanyo Electric Co Ltd Controller of dc servo motor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0294169A (en) * 1988-09-30 1990-04-04 Toshiba Corp Disc motor controller

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Publication number Publication date
JP2563908B2 (en) 1996-12-18

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