JPS6384072A - Manufacture of semiconductor pressure sensor - Google Patents
Manufacture of semiconductor pressure sensorInfo
- Publication number
- JPS6384072A JPS6384072A JP22855886A JP22855886A JPS6384072A JP S6384072 A JPS6384072 A JP S6384072A JP 22855886 A JP22855886 A JP 22855886A JP 22855886 A JP22855886 A JP 22855886A JP S6384072 A JPS6384072 A JP S6384072A
- Authority
- JP
- Japan
- Prior art keywords
- silicon
- etching
- single crystal
- thickness
- diaphragm
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 3
- 238000004519 manufacturing process Methods 0.000 title claims 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 37
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 37
- 239000010703 silicon Substances 0.000 claims abstract description 37
- 238000005530 etching Methods 0.000 claims abstract description 24
- 239000013078 crystal Substances 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 239000000203 mixture Substances 0.000 claims abstract description 6
- 238000000034 method Methods 0.000 claims abstract description 5
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 abstract description 7
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052782 aluminium Inorganic materials 0.000 abstract description 3
- 229910017604 nitric acid Inorganic materials 0.000 abstract description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 3
- 239000006185 dispersion Substances 0.000 abstract 1
- 239000000243 solution Substances 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 239000012670 alkaline solution Substances 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Landscapes
- Pressure Sensors (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の目的〕
（産業上の利用分野）
本発明は単結晶シリコンの一部を精度よく薄板化する方
法に関するもので、半導体圧力センサのダイヤフラム形
成に利用されるものである。[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a method for accurately thinning a part of single crystal silicon, and is used for forming a diaphragm of a semiconductor pressure sensor. It is.
（従来の技術）
単結晶シリコンを薄板化するためには、第３図に示すよ
うにＮ型シリコン基板表面の一部にＰ型不純物を拡散さ
せることによりピエゾ抵抗３を形成し、ホイートストン
ブリッジ回路を構成後、シリコン基板１の裏面９よりエ
ツチングし薄板化することによりダイヤフラムを形成し
ている。(Prior art) In order to make single crystal silicon thinner, as shown in FIG. 3, a piezoresistor 3 is formed by diffusing P-type impurities into a part of the surface of an N-type silicon substrate, and a Wheatstone bridge circuit is formed. After forming the silicon substrate 1, a diaphragm is formed by etching the back surface 9 of the silicon substrate 1 to make it thin.
（発明が解決しようとする問題点）
ダイヤフラムの板厚はセンサの出力感度の２乗に反比例
する相関があり、板厚のコントロールは非常に重要であ
る。(Problems to be Solved by the Invention) The thickness of the diaphragm is inversely proportional to the square of the output sensitivity of the sensor, and control of the thickness is very important.
しかし従来のダイヤフラムの形成には高温アルカリ溶液
によるエツチングをおこなって形成しており板厚の制御
はエツチング時間の管理で実施しているために、
（１）高温アルカリ溶液を使用するため、エツチング速
度が安定しなく、このために厚さのコントロールが難し
く、
（２）湿式エツチングであるため、本質的にエツチング
速度がシリコン基板面内でバラツキ、従ってダイヤプラ
ムの板厚の面内バラツキがおこり易い、
という問題点がある。However, conventional diaphragms are formed by etching with a high-temperature alkaline solution, and the plate thickness is controlled by managing the etching time. (2) Since it is a wet etching method, the etching speed essentially varies within the plane of the silicon substrate, and therefore the thickness of the diaphragm tends to vary within the plane. , there is a problem.
本発明は精度良く、安定的にダイヤフラムを形成するこ
とを技術的課題とするものである。The technical object of the present invention is to form a diaphragm stably with high precision.
（問題点を解決するための手段）
前記技術的課題を解決するための手段は、ピエゾ抵抗を
抵抗率の低いシリコン基板上にエピタキシャル成長させ
たｎ型シリコン単結晶中に形成し、低抵抗シリコン基板
をフッ化水素酸（ＨＦ）：硝酸（ＨＮＣｈ ）：酢酸（
ＣＨ３Ｃ００Ｈ）＝１ ：３：８の比率で混合した溶液
モエッチングしてダイヤフラムを形成するものである。(Means for Solving the Problem) A means for solving the above technical problem is to form a piezoresistor in an n-type silicon single crystal epitaxially grown on a low-resistivity silicon substrate, and Hydrofluoric acid (HF): Nitric acid (HNCh): Acetic acid (
A diaphragm is formed by etching a solution mixed at a ratio of CH3C00H)=1:3:8.
（作用）
前記組成比を持つエツチング液は第４図に示すように、
シリコンの抵抗率によりエツチング速度が変化し、比較
的高い抵抗のシリコンはエツチングされない。従ってエ
ツチングは低抵抗シリコン基板のみ進行し、エピタキシ
ャル成長で積層したｎ型シリコン単結晶が現われると自
動的に停止するため、ダイヤフラムの板厚はｎ型シリコ
ン単結晶の厚さとなる。エピタキシャル成長は膜厚の制
御性がよく±１μｍ程度の精度で積層可能であることか
ら、ダイヤフラムの手反厚のコントロールは良好となる
。(Function) As shown in FIG. 4, the etching solution having the above composition ratio has the following properties:
The etching rate varies depending on the resistivity of the silicon, and silicon with relatively high resistance will not be etched. Therefore, etching proceeds only on the low-resistance silicon substrate and automatically stops when the n-type silicon single crystal layered by epitaxial growth appears, so that the thickness of the diaphragm becomes equal to the thickness of the n-type silicon single crystal. Since epitaxial growth has good controllability of film thickness and can be stacked with an accuracy of about ±1 μm, the thickness of the diaphragm can be well controlled.
エツチングは室温で良く、水分蒸発による濃度変化も僅
かであり、又エツチング速度が面内でばらついても、ｎ
型シリコン単結晶で停止するのでダイアフラムの板厚の
面内バラツキも良くなるものである。Etching can be performed at room temperature, there is only a slight change in concentration due to water evaporation, and even if the etching rate varies within the plane, n
Since it stops at the type silicon single crystal, in-plane variations in the thickness of the diaphragm are also improved.
（実施例）
第１図に於いて抵抗率０．０１Ω−（至）以下のシリコ
ンウェハ１にエピタキシャル成長によりＮ型抵抗率１Ω
−ｃｍ以上のシリコン単結晶層２を積層し、プレーナ技
術によりシリコン単結晶層２中にピエゾ抵抗怠を形成後
アルミ配線４によりホイートストンブリッジ回路を構成
するもので、５はシリコン酸化膜、６は窒化ケイ素であ
る。(Example) In Fig. 1, an N-type resistivity of 1Ω is formed by epitaxial growth on a silicon wafer 1 with a resistivity of 0.01Ω-(to) or less.
- cm or more of silicon single crystal layers 2 are laminated, a piezoresistive layer is formed in the silicon single crystal layer 2 by planar technology, and then a Wheatstone bridge circuit is constructed with aluminum wiring 4, where 5 is a silicon oxide film and 6 is a silicon oxide film. It is silicon nitride.
次に第２図に示すようにエツチング液から表面を保護す
るためにアビニジワックス７を表面にコーティングし、
ＨＦ ： ＨＮＯｓ ： ＣＨ３Ｃｏ ０Ｈ＝１：３
：８の組成比の溶液中でＳ ｉ ３ Ｎａをマスクとし
て８に示すようにエツチングし、ダイヤフラムを形成す
るものである。Next, as shown in Figure 2, the surface is coated with avinidiwax 7 to protect it from the etching solution.
HF: HNOs: CH3Co 0H=1:3
A diaphragm is formed by etching in a solution having a composition ratio of 1:8 using S i 3 Na as a mask as shown in 8.
エピタキシャル成長により積層したシリコン単結晶の厚
さは圧力センサーの使用圧力範囲より決定され数μｍ〜
数十μｍ程度の厚さで選ばれる。The thickness of the silicon single crystal layered by epitaxial growth is determined by the working pressure range of the pressure sensor, and ranges from several μm to
It is selected with a thickness of approximately several tens of micrometers.
抵抗率０．００５Ω−（２）、板厚２００μｍのシリコ
ンウェハ１を上記組成比の溶液中で７５分エツチングし
たところ、ウェハ全面にわたり均一な板厚のダイヤフラ
ムを形成できた。When a silicon wafer 1 having a resistivity of 0.005 Ω-(2) and a thickness of 200 μm was etched in a solution having the above composition ratio for 75 minutes, a diaphragm having a uniform thickness could be formed over the entire surface of the wafer.
本発明は次の効果を有する。即ち、従来技術の問題点を
解消するため、エツチング容器上部に冷却器を設はエツ
チング液からの水分の蒸発を防止したり、シリコン基板
を回転させながらエツチングを行い面内のエツチング速
度を均一にすることが行われている（胚倉電線技報６６
号Ｐ２４、昭和５８年９月発行）。しかしこの方法はシ
リコン基板に存在する板厚のバラツキがそのままエツチ
ング後のダイヤフラム板厚のバラツキに現われるが、本
発明は板厚がエピタキシャル成長で積層したシリコン単
結晶層で決まるものであるからシリコン基板の板厚のバ
ラツキを考慮する必要がないという効果を有する。The present invention has the following effects. In other words, in order to solve the problems of the conventional technology, a cooler is installed on the top of the etching container to prevent moisture from evaporating from the etching solution, and etching is performed while rotating the silicon substrate to make the etching rate uniform within the surface. (Gerukura Electric Wire Technical Report 66)
No. P24, published September 1982). However, in this method, variations in the thickness of the silicon substrate directly appear in variations in the thickness of the diaphragm after etching, but in the present invention, the thickness is determined by the silicon single crystal layers laminated by epitaxial growth, so the thickness of the silicon substrate is This has the effect that there is no need to consider variations in plate thickness.
また高温アルカリ溶液を用いてシリコン単結晶をエツチ
ングすると結晶面によってエツチング速度が異なるため
ダイヤフラムのコーナーがテーパー状となるのに対して
本発明ではエツチング速度は結晶面に関係なく一定であ
るためにコーナーが曲面となりダイヤフラムの強度が従
来のものより向上するものである。Furthermore, when a silicon single crystal is etched using a high-temperature alkaline solution, the etching rate differs depending on the crystal plane, resulting in a tapered corner of the diaphragm, whereas in the present invention, the etching rate is constant regardless of the crystal plane, so the corner The diaphragm has a curved surface, which improves the strength of the diaphragm compared to conventional diaphragms.
第１図は圧力センサーの要部の拡大断面図でシリコンウ
ェハのエツチング前の状況を示し、第２図は第１図のも
のをエツチングした後の状況を示す。第３図は従来例の
説明図で、第４図はシリコン抵抗率とエツチング速度の
グラフである。
１・・・低抵抗シリコン基板、２・・・シリコン単結晶FIG. 1 is an enlarged cross-sectional view of the main part of the pressure sensor, showing the state before the silicon wafer is etched, and FIG. 2 shows the state after etching the silicon wafer. FIG. 3 is an explanatory diagram of a conventional example, and FIG. 4 is a graph of silicon resistivity and etching rate. 1...Low resistance silicon substrate, 2...Silicon single crystal
Claims (1)
シリコン単結晶を積層し、その表面にピエゾ抵抗を形成
後シリコン基板をＨＦ：ＨＮＯ＿３：ＣＨ＿３ＣＯＯＨ
＝１：３：８の組成をもつ溶液中でエッチングし、ダイ
ヤフラムを形成する半導体圧力センサーの製造方法。N-type silicon single crystals are laminated by epitaxial growth on a low-resistance silicon substrate, and after forming a piezoresistor on the surface, the silicon substrate is HF:HNO_3:CH_3COOH.
A method for manufacturing a semiconductor pressure sensor in which a diaphragm is formed by etching in a solution having a composition of 1:3:8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22855886A JPS6384072A (en) | 1986-09-26 | 1986-09-26 | Manufacture of semiconductor pressure sensor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22855886A JPS6384072A (en) | 1986-09-26 | 1986-09-26 | Manufacture of semiconductor pressure sensor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6384072A true JPS6384072A (en) | 1988-04-14 |
Family
ID=16878255
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22855886A Pending JPS6384072A (en) | 1986-09-26 | 1986-09-26 | Manufacture of semiconductor pressure sensor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6384072A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0897439A (en) * | 1994-09-14 | 1996-04-12 | Delco Electron Corp | One-chip accumulation sensor |
| WO2000009440A1 (en) * | 1998-08-11 | 2000-02-24 | Infineon Technologies Ag | Micromechanical sensor and corresponding production method |
| CN109696185A (en) * | 2018-12-30 | 2019-04-30 | 吉林大学 | A kind of bionical micro cantilever structure, its manufacturing method and piezoresistance sensor |
-
1986
- 1986-09-26 JP JP22855886A patent/JPS6384072A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0897439A (en) * | 1994-09-14 | 1996-04-12 | Delco Electron Corp | One-chip accumulation sensor |
| WO2000009440A1 (en) * | 1998-08-11 | 2000-02-24 | Infineon Technologies Ag | Micromechanical sensor and corresponding production method |
| US6389902B2 (en) | 1998-08-11 | 2002-05-21 | Infineon Technologies Ag | Micromechanical sensor and method for its production |
| CN109696185A (en) * | 2018-12-30 | 2019-04-30 | 吉林大学 | A kind of bionical micro cantilever structure, its manufacturing method and piezoresistance sensor |
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