JPS6383884U - - Google Patents
Info
- Publication number
- JPS6383884U JPS6383884U JP17771186U JP17771186U JPS6383884U JP S6383884 U JPS6383884 U JP S6383884U JP 17771186 U JP17771186 U JP 17771186U JP 17771186 U JP17771186 U JP 17771186U JP S6383884 U JPS6383884 U JP S6383884U
- Authority
- JP
- Japan
- Prior art keywords
- converter
- catv
- detection circuit
- video signal
- recording device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 3
Description
第１図乃至第３図は本発明の一実施例に係り、
第１図はＣＡＴＶ受信装置の回路構成図、第２図
は電力検出回路の回路構成図、第３図はタイマー
予約時間のタイムチヤートを示す図である。第４
図は従来のＣＡＴＶ受信装置の回路構成図である
。
５……ＣＡＴＶケーブル、６……ＣＡＴＶコン
バータ、７……ＶＴＲ（タイマー機能を有する記
録装置）、１１……電力検出回路、１２……チヤ
ンネル制御回路。
1 to 3 relate to an embodiment of the present invention,
FIG. 1 is a circuit diagram of a CATV receiver, FIG. 2 is a circuit diagram of a power detection circuit, and FIG. 3 is a time chart of a timer reservation time. Fourth
The figure is a circuit configuration diagram of a conventional CATV receiver. 5...CATV cable, 6...CATV converter, 7...VTR (recording device with a timer function), 11...power detection circuit, 12...channel control circuit.
Claims (1)
て入力し、該映像信号をデスクランブルするＣＡ
ＴＶコンバータの後段に、該コンバータを介して
駆動電力が供給されるタイマー機能を有する記録
機器を接続し、前記ＣＡＴＶコンバータに、前記
記録機器の消費電力を検出する電力検出回路と、
該検出回路の出力により予め設定されていたプロ
グラムに従い受信チヤンネルを切換えるチヤンネ
ル制御回路とを設けたことを特徴とするＣＡＴＶ
受信装置。 A CA that inputs a scrambled video signal via a cable and descrambles the video signal.
A recording device having a timer function to which drive power is supplied via the converter is connected to the rear stage of the TV converter, and a power detection circuit detects power consumption of the recording device to the CATV converter;
A CATV characterized by being provided with a channel control circuit that switches reception channels according to a preset program based on the output of the detection circuit.
Receiving device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17771186U JPS6383884U (en) | 1986-11-19 | 1986-11-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17771186U JPS6383884U (en) | 1986-11-19 | 1986-11-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6383884U true JPS6383884U (en) | 1988-06-01 |
Family
ID=31119170
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17771186U Pending JPS6383884U (en) | 1986-11-19 | 1986-11-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6383884U (en) |
-
1986
- 1986-11-19 JP JP17771186U patent/JPS6383884U/ja active Pending
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