JPS6326189U - - Google Patents

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Publication number
JPS6326189U
JPS6326189U JP11766586U JP11766586U JPS6326189U JP S6326189 U JPS6326189 U JP S6326189U JP 11766586 U JP11766586 U JP 11766586U JP 11766586 U JP11766586 U JP 11766586U JP S6326189 U JPS6326189 U JP S6326189U
Authority
JP
Japan
Prior art keywords
circuit
video signal
scramble
switch
connector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11766586U
Other languages
Japanese (ja)
Other versions
JPH0514622Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986117665U priority Critical patent/JPH0514622Y2/ja
Publication of JPS6326189U publication Critical patent/JPS6326189U/ja
Application granted granted Critical
Publication of JPH0514622Y2 publication Critical patent/JPH0514622Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Television Signal Processing For Recording (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示す図である。第
２図は第１図のスイツチ回路の動作を説明する図
である。第３図第４図第５図は従来例を示す図で
ある。 １２…アンテナ端子、１４…チユーナ回路、ｉ
…映像信号出力端子、３６…スクランブルデコー
ダ用２１ピンコネクタ、３８…ＡＵＸ用２１ピン
コネクタ（第二２１ピンコネクタ）、ｊ，ｎ…映
像信号入力端子、１６…映像信号処理回路、３０
…スイツチ回路、３４…第１スイツチ制御手段、
ｋ…ＡＶコントロール入力端子（ＡＶコントロー
ル端子）、３２…第２スイツチ制御手段。 FIG. 1 is a diagram showing an embodiment of the present invention. FIG. 2 is a diagram illustrating the operation of the switch circuit of FIG. 1. FIG. 3, FIG. 4, and FIG. 5 are diagrams showing conventional examples. 12...Antenna terminal, 14...Tuner circuit, i
...Video signal output terminal, 36...21-pin connector for scramble decoder, 38...21-pin connector for AUX (second 21-pin connector), j, n...Video signal input terminal, 16...Video signal processing circuit, 30
...switch circuit, 34...first switch control means,
k...AV control input terminal (AV control terminal), 32...Second switch control means.

Claims (1)

【実用新案登録請求の範囲】 アンテナ端子からの信号が入力されるチユーナ
回路と、 前記チユーナ回路からの映像信号を映像信号出
力端子より出力するスクランブルデコーダ用２１
ピンコネクタと、 第二２１ピンコネクタと、 前記スクランブルデコーダ用、第二２１ピンコ
ネクタの夫々の映像信号入力端子及び前記チユー
ナ回路からの少なくとも３つの映像信号を選択的
に導出するスイツチ回路と、 前記スイツチ回路からの映像信号を処理する映
像信号処理回路とを、 備えるスクランブル放送受信用ＶＴＲに於いて、 前記スイツチ回路を前記チユーナ回路側と前記
第二２１ピンコネクタ側に選択的に切り換え制御
する第１スイツチ制御手段と、 ＡＶコントロール信号が入力される前記スクラ
ンブル用２１ピンコネクタのＡＶコントロール端
子と、 前記第１スイツチ制御手段により前記スイツチ
回路が前記チユーナ回路側に接続されている時に
作動し、前記スクランブル用２１ピンコネクタか
らの前記ＡＶコントロール信号により前記スイツ
チ回路を前記スクランブル用２１ピンコネクタ側
に接続する第２スイツチ制御手段とを、 備えることを特徴とするスクランブル放送受信用
ＶＴＲ。[Claims for Utility Model Registration] A tuner circuit into which a signal from an antenna terminal is input, and a scramble decoder 21 which outputs a video signal from the tuner circuit from a video signal output terminal.
a switch circuit that selectively derives at least three video signals from the video signal input terminals of the scramble decoder and the second 21-pin connector, and the tuner circuit; In a scrambled broadcast receiving VTR comprising a video signal processing circuit that processes a video signal from a switch circuit, the switch circuit is selectively switched to the tuner circuit side and the second 21-pin connector side. an AV control terminal of the scramble 21-pin connector into which an AV control signal is input, the first switch control means operates when the switch circuit is connected to the tuner circuit side; A VTR for receiving scrambled broadcasting, comprising: second switch control means for connecting the switch circuit to the 21-pin scramble connector in response to the AV control signal from the 21-pin scramble connector.
JP1986117665U 1986-07-31 1986-07-31 Expired - Lifetime JPH0514622Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986117665U JPH0514622Y2 (en) 1986-07-31 1986-07-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986117665U JPH0514622Y2 (en) 1986-07-31 1986-07-31

Publications (2)

Publication Number Publication Date
JPS6326189U true JPS6326189U (en) 1988-02-20
JPH0514622Y2 JPH0514622Y2 (en) 1993-04-19

Family

ID=31003386

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986117665U Expired - Lifetime JPH0514622Y2 (en) 1986-07-31 1986-07-31

Country Status (1)

Country Link
JP (1) JPH0514622Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07112139A (en) * 1993-10-18 1995-05-02 Sanzou Kankyo Eng Kk Refuse supplying device and refuse supplying method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814215U (en) * 1981-07-20 1983-01-28 株式会社ケンウッド Video tape recorder with tuner

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2553164C3 (en) * 1975-11-27 1980-09-25 Karl 7519 Oberderdingen Fischer Frit insert for a deep fryer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814215U (en) * 1981-07-20 1983-01-28 株式会社ケンウッド Video tape recorder with tuner

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07112139A (en) * 1993-10-18 1995-05-02 Sanzou Kankyo Eng Kk Refuse supplying device and refuse supplying method

Also Published As

Publication number Publication date
JPH0514622Y2 (en) 1993-04-19

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