JPS6382380A - Integrated circuit - Google Patents

Abstract

PURPOSE:To curtail a testing process, by providing an LSI itself with an identifying means for indicating the type to enable automatic switching of a program when several types of LSIs are tested by being housed into the same testing machine having respective programs being stored. CONSTITUTION:An LSI chip 100 is designed to perform a desired logic function and provided with an identification circuit 110 to identify several types of chips different in the function while the circuit is provided with two input terminals 121 and 122 and an output terminal 130. The circuit 110 is made up of an AND circuit 111 and transmits '1' to the terminal 130 when given '1' together with the terminals 121 and 122 to indicate that it differs from other types of LSIs. The testing machine catches a signal '1' to operate a corresponding program while an identification signal reaches '10' from '00' with the increment of the counting.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to integrated circuits, and more particularly to integrated circuits that facilitate the automation of electrical testing.

[Conventional technology]

The entire logic device is an integrated circuit (hereinafter referred to as rLSIJ)
If you try to configure it with , generally there are few logic repetitions, so many kinds of LSIs and a small number of LSIs are required. For this reason, so-called gate array LSIs (hereinafter referred to as "gate arrays") are widely used.

A gate array is manufactured by preparing diffusion layers such as transistors and resistors constituting basic gates in a common pattern, and designing wiring layers individually in accordance with desired logic functions. Therefore, electrical tests of gate arrays are performed using different test programs for each type of gate array with different functions.

[Problem that the invention seeks to solve]

However, electrical testing of LSIs including the gate array described above is performed using different programs for each type of LSI, so each time the type is changed, the test program must be manually switched to the one corresponding to that type. figure,
Testing many types of LSIs has the drawback that loss time is large due to the man-hours involved in switching. Further, this loss time is particularly large when manufacturing a large number of types and in small quantities, such as gate arrays.

The purpose of the present invention is to eliminate the above-mentioned drawbacks, and to
An object of the present invention is to provide an LSI that can automatically switch programs and reduce the number of man-hours for electrical testing by providing identification means for identifying the type.

[Means for solving problems]

In the integrated circuit of the present invention, in a plurality of types of integrated circuits in which electrical tests are performed by respective programs stored in the same testing machine, an identification signal composed of n bits given from the testing machine is applied to the eye drop integrated circuit. The tester is configured to include an identification circuit that sends out a matching signal to the testing machine when the identification signal represents the type of tester.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, in which an integrated circuit chip (hereinafter referred to as an "rLSI chip") 100 not only has a desired logic function, but also has multiple types of LSIs with different functions when performing an electrical test. Identification circuit 11 for identifying chips
0, and the two input terminals 121.1 of the identification circuit 110
22 and an output terminal 130 are provided on the LSI chip.

FIG. 2 is a diagram showing the correspondence between the 2-bit identification signal applied to the two input terminals 121 and 122 in FIG. 1 and the type of LSI chip. The four types of identification signals are LSI chip type A, It corresponds to B, C and D.

FIG. 3 shows the circuit surface of the identification circuit 110, which is not provided in the type of LSI chip shown in FIG.
22 is connected to the input of the two-person AND circuit 111, and A
The output of the ND circuit 111 is connected to the output terminal +130. With this circuit, when "1" is applied to both input terminals 121 and 122, "1" is sent to the output terminal 130, and when the identification signal of the own LSI chip is applied, a match signal is output. It is clear that for other types of LSI chips, an identification circuit that sends out a coincidence signal when a self-identification signal is applied can be easily constructed by combining an inverter circuit and an AND circuit.

FIG. 4 is an operational diagram in an electrical test of the present invention. Before conducting an electrical test, an identification program is executed on the testing machine, and four types of identification signals are sequentially applied to input terminals 121 and 122, and each You can test whether a matching signal can be obtained. When a matching signal is obtained, L
The program is switched to a test program corresponding to the type of SI chip, and the test starts. Case 1 in Figure 4
shows the case where LSI chip type C was the subject of the test. The test machine counts up the identification signal from 00'', and when it reaches 10, a match signal is obtained from the output terminal 130, indicating that the test program corresponding to the seed MC of the LSI chip is started. .L in case 2
This shows a case where SI chip type B is the subject of the test, and similarly to case 1, the corresponding test program is started.

In the above embodiment, the case where there are four types of LSI chips has been described, but by providing an identification circuit that has n input terminals and discriminates 2n identification signals, it is possible to conduct a series of electrical tests on LSI chips. It is clear that the type of can be 2fi. Furthermore, the identification circuit is not limited to inverter circuits and AND circuits, and may be made using other logic gates.

〔Effect of the invention〕

As explained above, the present invention eliminates the need to manually distinguish between multiple types of LSI chips with different functions and to switch test programs to perform tests, and can also be applied to different types of LSI chips within the same web. The type can be automatically identified and tests can be performed continuously, which has the effect of reducing loss time due to changeover work.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a correspondence diagram between identification signals and types of LSI chips, Fig. 3 is a circuit diagram of an example of an identification circuit, and Fig. 4 is an electrical diagram of an embodiment of the invention. It is an operation diagram in a test. 100... integrated circuit chip (LSI chip), 110
...Identification circuit, 121.122...Input terminal, 13
0...Output terminal. J ノ times $2TM

Claims (1)

[Claims] In a plurality of types of integrated circuits in which electrical tests are performed by respective programs stored in the same testing machine, an identification signal composed of n bits given from the testing machine is an identification signal representing the type of the integrated circuit. An integrated circuit characterized in that it has an identification circuit that sends a coincidence signal to the tester when .