JPS6381626U - - Google Patents

Info

Publication number
JPS6381626U
JPS6381626U JP17483086U JP17483086U JPS6381626U JP S6381626 U JPS6381626 U JP S6381626U JP 17483086 U JP17483086 U JP 17483086U JP 17483086 U JP17483086 U JP 17483086U JP S6381626 U JPS6381626 U JP S6381626U
Authority
JP
Japan
Prior art keywords
switching transistors
sensors
power supply
controlled
control power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17483086U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17483086U priority Critical patent/JPS6381626U/ja
Publication of JPS6381626U publication Critical patent/JPS6381626U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Emergency Alarm Devices (AREA)
  • Emergency Protection Circuit Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による集中警報装置の一実施例
を示す回路図、第2図は従来の集中警報装置の回
路図である。 307′,308′,309′……保持回路、
310……リセツト回路。
FIG. 1 is a circuit diagram showing an embodiment of a centralized alarm device according to the present invention, and FIG. 2 is a circuit diagram of a conventional centralized alarm device. 307', 308', 309'...holding circuit,
310...Reset circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数のセンサ101〜103に対応して集中的
に配設された複数の警報器201〜203に夫々
直列接続され、かつ前記複数のセンサ101〜1
03の各出力に応じて夫々開閉制御される複数の
スイツチングトランジスタ301〜303により
、前記複数の警報器201〜203への給電を夫
々制御すると共に、前記複数のスイツチングトラ
ンジスタ301〜303に過電流が流れたときに
、該複数のスイツチングトランジスタ301〜3
03に対応して夫々設けられた過電流検出回路3
04〜306の各出力を記憶保持する保持回路3
07′〜309′の各出力により、前記複数のス
イツチングトランジスタ301〜303に過電流
が流れないように該複数のスイツチングトランジ
スタ301〜303を夫々開状態に制御してなる
集中警報装置であつて、前記各保持回路307′
〜309′の出力を所定時間毎にリセツトするリ
セツト回路を有することを特徴とする集中警報装
置。
Each of the plurality of sensors 101 to 1 is connected in series to a plurality of alarm devices 201 to 203 centrally arranged corresponding to the plurality of sensors 101 to 103, and
A plurality of switching transistors 301 to 303, which are controlled to open and close according to the respective outputs of 03, control power supply to the plurality of alarm devices 201 to 203, respectively, and also control power supply to the plurality of switching transistors 301 to 303, respectively. When a current flows, the plurality of switching transistors 301 to 3
Overcurrent detection circuit 3 provided corresponding to 03
Holding circuit 3 that stores and holds each output of 04 to 306
07' to 309', each of the plurality of switching transistors 301 to 303 is controlled to be in an open state so that an overcurrent does not flow through the plurality of switching transistors 301 to 303. Each of the holding circuits 307'
309' is characterized in that it has a reset circuit that resets the outputs of the alarms at predetermined time intervals.
JP17483086U 1986-11-14 1986-11-14 Pending JPS6381626U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17483086U JPS6381626U (en) 1986-11-14 1986-11-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17483086U JPS6381626U (en) 1986-11-14 1986-11-14

Publications (1)

Publication Number Publication Date
JPS6381626U true JPS6381626U (en) 1988-05-30

Family

ID=31113583

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17483086U Pending JPS6381626U (en) 1986-11-14 1986-11-14

Country Status (1)

Country Link
JP (1) JPS6381626U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61199416A (en) * 1985-02-28 1986-09-03 富士電機株式会社 Short-circuiting protection circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61199416A (en) * 1985-02-28 1986-09-03 富士電機株式会社 Short-circuiting protection circuit

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