JPS6381428U

JPS6381428U -

Info

Publication number: JPS6381428U
Application number: JP17334186U
Authority: JP
Priority date: 1986-11-13
Filing date: 1986-11-13
Publication date: 1988-05-28

Description

[Brief explanation of drawings]

第１図ないし第４図は本考案の一実施例を示す
もので、第１図は全体の回路構成を示すブロツク
図、第２図は第１図におけるアンテナ切り換え回
路の詳細を示す回路構成図、第３図は第１図にお
けるピーク・ホールド回路、カウンタ回路、比較
回路、スイツチング信号形成回路部分の詳細を示
すブロツク図、第４図は動作を説明するためのタ
イミングチヤート、第５図は従来のダイバーシテ
イ・アンテナ制御装置の回路構成を示すブロツク
図、第６図は第５図の動作を説明するための信号
波形図である。１１……アンテナ切り換え回路、１２……テレ
ビ受信機、１３……ピーク・ホールド回路、１４
……カウンタ回路、１５……比較回路、１６……
スイツチング信号形成回路、２１……第１のアン
テナ、２２……第２のアンテナ、３０，３１……
ローパスフイルタ。 Figures 1 to 4 show an embodiment of the present invention. Figure 1 is a block diagram showing the overall circuit configuration, and Figure 2 is a circuit diagram showing details of the antenna switching circuit in Figure 1. , Fig. 3 is a block diagram showing details of the peak hold circuit, counter circuit, comparison circuit, and switching signal forming circuit portion in Fig. 1, Fig. 4 is a timing chart for explaining the operation, and Fig. 5 is a conventional FIG. 6 is a block diagram showing the circuit configuration of the diversity antenna control device of FIG. 5, and FIG. 6 is a signal waveform diagram for explaining the operation of FIG. 11... Antenna switching circuit, 12... Television receiver, 13... Peak hold circuit, 14
... Counter circuit, 15 ... Comparison circuit, 16 ...
Switching signal forming circuit, 21...first antenna, 22...second antenna, 30, 31...
low pass filter.

Claims

[Scope of utility model registration request]

A plurality of antennas, an antenna switching circuit that selects the plurality of antennas based on a switching signal, a television receiver to which the received signal of the antenna selected by the antenna switching circuit is input, and a television receiver that receives the received signal of the antenna selected by the antenna switching circuit; A counter circuit that starts operation with a vertical synchronization pulse and generates an operation timing signal by counting horizontal synchronization pulses, and maintains the comparison period of antenna reception signals and the selection state of a specific antenna based on the count output of this counter circuit. a peak hold circuit for holding a maximum amplitude value of an intermediate frequency signal corresponding to each antenna taken out from the television receiver; and each of the antennas held in the peak hold circuit. maximum value detection means for comparing the amplitude values of intermediate frequency signals corresponding to the above and detecting the maximum amplitude value, a switching signal for sequentially selecting each of the antennas during the comparison period, and the maximum value detection means for the holding period. 1. A diversity antenna control device comprising means for outputting a switching signal for selecting and designating an antenna corresponding to a detection signal to the antenna switching circuit.