JPS5976162U

JPS5976162U - Facsimile transmission mode identification device

Info

Publication number: JPS5976162U
Application number: JP8656583U
Authority: JP
Inventors: 渡辺　真喜男; 片岡　紀雄; 崇小林; 中潟　紀雄
Original assignee: 株式会社田村電機製作所; 沖電気工業株式会社
Priority date: 1983-06-07
Filing date: 1983-06-07
Publication date: 1984-05-23
Also published as: JPS6340936Y2

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は本考案によるファクシミリの送信モード識別装
置の一実施例を示すブロック図、第２図ないし第７図は
第１図の動作説明図で、第２図は第１図の識別回路に入
力される４種類の送信モードの位相信号を示す波形図、
第３図は第１図に示すブロック図において検出部の動作
を説明するためのタイムチャート、第４図は第２図Ａに
示す信号が入力された場合における第１図各部の動作を
示すタイムチャート、第５図は第２図Ｂに示す信号が入
力された場合における第１図各部の動作を示すタイムチ
ャート、第６図は第２図Ｃに示す信号が入力された場合
における第１図各部の動作を示すタイムチャート、第７
図は白送りモードと黒送りモードの場合の入力信号波形
図である。１・・・直線検波回路、２・・・カウンタ・タイマ回路
、３Ａ〜３Ｄ・・・検出部、４Ａ〜４Ｄ・・・モード判
別カウンタ、５Ａ〜５Ｄ、５Ａ〜６Ｄ・・・記憶回路、
７Ａ〜７Ｄ・・・選択確認パルス回路。FIG. 1 is a block diagram showing an embodiment of a facsimile transmission mode identification device according to the present invention, FIGS. 2 to 7 are explanatory diagrams of the operation of FIG. 1, and FIG. Waveform diagram showing phase signals of four types of input transmission modes,
Fig. 3 is a time chart for explaining the operation of the detection section in the block diagram shown in Fig. 1, and Fig. 4 is a time chart showing the operation of each part in Fig. 1 when the signal shown in Fig. 2 A is input. 5 is a time chart showing the operation of each part in FIG. 1 when the signal shown in FIG. 2B is input, and FIG. 6 is a time chart showing the operation of each part in FIG. 1 when the signal shown in FIG. 2C is input. Time chart showing the operation of each part, No. 7
The figures are input signal waveform diagrams in white feed mode and black feed mode. DESCRIPTION OF SYMBOLS 1... Linear detection circuit, 2... Counter timer circuit, 3A-3D... Detection part, 4A-4D... Mode discrimination counter, 5A-5D, 5A-6D... Memory circuit,
7A to 7D...Selection confirmation pulse circuit.

Claims

[Scope of utility model registration request]

The envelope signal of the input signal is extracted in a facsimile transmission mode identification device that automatically identifies the other party's transmission mode on the receiver side based on the phase signal sent from the transmitter to perform phase matching before transmitting the image signal. a linear detection circuit; a counter/timer circuit that performs a timing operation while the envelope signal from the linear detection circuit is supplied as an enable signal and sequentially sends out output signals after a predetermined period of time has elapsed;
a plurality of detection units that monitor whether or not the continuous time of the envelope signal is within each specified time width determined by the output from the counter/timer circuit, and that is reset by the end of the envelope signal; and a plurality of mode discrimination counters that count the output pulses of each of these detection units and output a transmission mode identification signal when the count value reaches a certain number.