JPS63138739U - - Google Patents

Info

Publication number
JPS63138739U
JPS63138739U JP3115187U JP3115187U JPS63138739U JP S63138739 U JPS63138739 U JP S63138739U JP 3115187 U JP3115187 U JP 3115187U JP 3115187 U JP3115187 U JP 3115187U JP S63138739 U JPS63138739 U JP S63138739U
Authority
JP
Japan
Prior art keywords
antenna
pulse
synchronization
supplied
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3115187U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3115187U priority Critical patent/JPS63138739U/ja
Publication of JPS63138739U publication Critical patent/JPS63138739U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のダイバシテイ受信装置を示す
回路図、第2図は第1図の動作説明用の信号波形
図、第3図は従来のダイバシテイ受信装置を示す
回路図、第4図、第5図は第3図の動作説明用の
信号波形図である。 1,2……アンテナ、3……スイツチ回路、8
……同期分離回路、11……レベル比較回路、1
2……システムコントローラ、13……カウンタ
回路。
Fig. 1 is a circuit diagram showing the diversity receiving device of the present invention, Fig. 2 is a signal waveform diagram for explaining the operation of Fig. 1, Fig. 3 is a circuit diagram showing a conventional diversity receiving device, Figs. FIG. 5 is a signal waveform diagram for explaining the operation of FIG. 3. 1, 2...Antenna, 3...Switch circuit, 8
... Synchronization separation circuit, 11 ... Level comparison circuit, 1
2...System controller, 13...Counter circuit.

Claims (1)

【実用新案登録請求の範囲】 複数のアンテナでテレビジヨン放送信号を受け
、最も入力レベルの高いアンテナを自動的に選択
してチユーナに接続するようにしたダイバシテイ
受信装置であつて、 前記チユーナに対するアンテナの接続状態を切
換え可能とし、アンテナ切換パルスの到来毎に別
のアンテナへ切換え接続を行うスイツチ回路と、 前記チユーナからの出力信号を処理して複合映
像信号を得る回路と、 前記複合映像信号および第1、第2のサンプリ
ングパルスが供給され、第1のサンプリングパル
スにより前記切換え前のアンテナでの受信信号レ
ベルを検出し、第2のサンプリングパルスにより
切換え後のアンテナでの受信信号レベルを検出し
、両検出出力を比較して受信信号レベルの大きい
方のアンテナを選択するための比較出力を発生す
るレベル比較回路と、 前記複合映像信号が入力として供給され、出力
として複合同期信号および垂直同期パルスを発生
する同期分離回路と、 前記垂直同期パルスおよび複合同期信号がそれ
ぞれ入力として供給され、前記垂直同期パルスの
後の前記複合同期信号に含まれる水平同期パルス
を所定数カウントして垂直ブランキング期間内に
おいてトリガパルスを出力するカウンタ回路と、 前記トリガパルスが供給され、このトリガパル
スを基準にして垂直ブランキング期間内の所定の
水平同期信号とこれに続く次の水平同期信号間に
おいて前記アンテナ切換パルスおよび第1、第2
のサンプリングパルスを発生するシステムコント
ローラとを具備して成るダイバシテイ受信装置。
[Claims for Utility Model Registration] A diversity receiving device that receives television broadcast signals through a plurality of antennas and automatically selects the antenna with the highest input level and connects it to a tuner, the antenna for said tuner a switch circuit that can switch the connection state of the antenna and switches the connection to another antenna each time an antenna switching pulse arrives; a circuit that processes the output signal from the tuner to obtain a composite video signal; First and second sampling pulses are supplied, the first sampling pulse detects the received signal level at the antenna before switching, and the second sampling pulse detects the received signal level at the antenna after switching. , a level comparison circuit that generates a comparison output for comparing both detection outputs and selecting the antenna with a higher received signal level; and the composite video signal is supplied as an input, and a composite synchronization signal and a vertical synchronization pulse are supplied as outputs. a synchronization separation circuit that generates a vertical synchronization pulse and a composite synchronization signal, each of which is supplied as an input, and counts a predetermined number of horizontal synchronization pulses included in the composite synchronization signal after the vertical synchronization pulse to generate a vertical blanking period. a counter circuit that outputs a trigger pulse within a vertical blanking period; Pulse and first, second
and a system controller that generates sampling pulses.
JP3115187U 1987-03-05 1987-03-05 Pending JPS63138739U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3115187U JPS63138739U (en) 1987-03-05 1987-03-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3115187U JPS63138739U (en) 1987-03-05 1987-03-05

Publications (1)

Publication Number Publication Date
JPS63138739U true JPS63138739U (en) 1988-09-13

Family

ID=30836625

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3115187U Pending JPS63138739U (en) 1987-03-05 1987-03-05

Country Status (1)

Country Link
JP (1) JPS63138739U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02141180A (en) * 1988-11-22 1990-05-30 Seiko Epson Corp Diversity device for television receiver

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02141180A (en) * 1988-11-22 1990-05-30 Seiko Epson Corp Diversity device for television receiver

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