JPS6381354U - - Google Patents
Info
- Publication number
- JPS6381354U JPS6381354U JP17503386U JP17503386U JPS6381354U JP S6381354 U JPS6381354 U JP S6381354U JP 17503386 U JP17503386 U JP 17503386U JP 17503386 U JP17503386 U JP 17503386U JP S6381354 U JPS6381354 U JP S6381354U
- Authority
- JP
- Japan
- Prior art keywords
- timer
- reproduction
- regeneration
- storage means
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000008929 regeneration Effects 0.000 claims 5
- 238000011069 regeneration method Methods 0.000 claims 5
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
Landscapes
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
Description
第１図は本考案の一実施例を示す回路図、第２
図は従来の回路図である。
Ｍ……メモリー、ＭＣ……曲間検出コントロー
ル回路、Ｓ９……スイツチ、Ｃ１０……コンデン
サ、ＩＣ……ロジツクコントロール回路。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a conventional circuit diagram. M...Memory, MC...Song interval detection control circuit, S9 ...Switch, C10 ...Capacitor, IC...Logic control circuit.
Claims (1)
プログラムする記憶手段と、この記憶手段のプロ
グラムに基づいて再生する再生手段と、この再生
手段をタイマーによりタイマー再生可能とするタ
イマー回路とを備えたタイマー再生回路において
、前記記憶手段の電源をオフしてもその記憶内容
を保持する記憶保持手段と、前記タイマー回路に
より再生状態とされる前記再生手段は前記記憶手
段に記憶されたプログラムに基づいて再生するよ
うに制御する制御手段とを有してなるタイマー再
生回路。 A storage means for programming reproduction of a recording medium on which a plurality of pieces of information are recorded in advance, a reproduction means for reproduction based on the program of the storage means, and a timer circuit for enabling timer reproduction of the reproduction means by a timer. In the timer regeneration circuit, a memory holding means retains the stored contents even when the power of the storage means is turned off, and the regeneration means which is brought into a regeneration state by the timer circuit is configured based on a program stored in the storage means. A timer regeneration circuit comprising: control means for controlling regeneration.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17503386U JPS6381354U (en) | 1986-11-14 | 1986-11-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17503386U JPS6381354U (en) | 1986-11-14 | 1986-11-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6381354U true JPS6381354U (en) | 1988-05-28 |
Family
ID=31113980
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17503386U Pending JPS6381354U (en) | 1986-11-14 | 1986-11-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6381354U (en) |
-
1986
- 1986-11-14 JP JP17503386U patent/JPS6381354U/ja active Pending
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