JPS61109229U - - Google Patents
Info
- Publication number
- JPS61109229U JPS61109229U JP19432684U JP19432684U JPS61109229U JP S61109229 U JPS61109229 U JP S61109229U JP 19432684 U JP19432684 U JP 19432684U JP 19432684 U JP19432684 U JP 19432684U JP S61109229 U JPS61109229 U JP S61109229U
- Authority
- JP
- Japan
- Prior art keywords
- detecting
- state
- writing
- reading
- operating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
Description
第1図は本考案の実施例を示すブロツク図、第
2図は第1図のチユーナの操作パネルを示す正面
図、第3図は第1図のチユーナのコントローラ部
の動作を示すフロー図、第4図はコントローラ部
の構成を示すブロツク図である。
主要部分の符号の説明、6……PLLシンセサ
イザ部、17……コントローラ部、20……操作
パネル、SW1ないしSW7……プリセツトスイ
ツチ、SW8……アツプ指令スイツチ、SW9…
…ダウン指令スイツチ。
Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a front view showing the operation panel of the tuner shown in Fig. 1, and Fig. 3 is a flow diagram showing the operation of the controller section of the tuner shown in Fig. 1. FIG. 4 is a block diagram showing the configuration of the controller section. Explanation of symbols of main parts, 6... PLL synthesizer section, 17... Controller section, 20... Operation panel, SW 1 to SW 7 ... Preset switch, SW 8 ... Up command switch, SW 9 ...
...Down command switch.
補正 昭60.6.11
実用新案登録請求の範囲を次のように補正する
。Amendment June 11, 1986 The scope of claims for utility model registration is amended as follows.
【実用新案登録請求の範囲】
所定モードの状態を変化させる操作手段と、該
操作手段によつて設定した状態を記憶する記憶手
段と、該記憶手段に対して複数の状態の書き込み
又は読み出しを指示する書き込み/読み出し手段
と、前記操作手段の作動終了を検知する第1の検
知手段と、前記書き込み/読み出し手段が読み出
し状態で第1の期間以上この読み出し状態が維持
されているかを検知する第2の検知手段と、前記
第1又は第2の検知手段によつて前記書き込み/
読み出し手段を第2の期間中は書き込み可能状態
とする書き込み制御手段とを備えたことを特徴と
するメモリ装置。[Claims for Utility Model Registration] An operating means for changing the state of a predetermined mode, a storage means for storing the state set by the operating means, and an instruction to write or read a plurality of states into the storage means a first detection means for detecting an end of operation of the operation means; and a first detection means for detecting completion of operation of the operating means; and a first detection means for detecting completion of operation of the operating means; a second detection means for detecting whether the writing/writing is done by the first or second detection means;
1. A memory device comprising: write control means for setting the read means in a writable state during a second period.
Claims (1)
操作手段によつて設定した状態を記憶する記憶手
段と、該記憶手段に対して複数の書き込み又は読
み出しを指示する書き込み/読み出し手段と、前
記操作手段の作動終了を検知する第1の検知手段
と、前記書き込み/読み出し手段が記憶手段に記
憶されている1の状態を読み出し中に第1の期間
以上この読み出し状態が維持されているかを検知
する第2の検知手段と、前記第1又は第2の検知
手段によつて前記書き込み/読み出し手段を第2
の期間中は書き込み可能状態とする書き込み制御
手段とを備えたことを特徴とするメモリ装置。 An operating means for changing the state of a predetermined mode, a storage means for storing the state set by the operating means, a writing/reading means for instructing the storage means to perform a plurality of writes or reads, and the operating means a first detection means for detecting the end of the operation; and a first detection means for detecting whether the read state is maintained for a first period or more while the write/read means is reading the first state stored in the storage means. 2 detecting means, and the writing/reading means is activated by the first or second detecting means.
1. A memory device comprising: write control means that enables writing during the period.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19432684U JPS61109229U (en) | 1984-12-21 | 1984-12-21 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19432684U JPS61109229U (en) | 1984-12-21 | 1984-12-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61109229U true JPS61109229U (en) | 1986-07-10 |
Family
ID=30751776
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19432684U Pending JPS61109229U (en) | 1984-12-21 | 1984-12-21 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61109229U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5680918A (en) * | 1979-12-04 | 1981-07-02 | Brother Ind Ltd | Automatic channel selector |
-
1984
- 1984-12-21 JP JP19432684U patent/JPS61109229U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5680918A (en) * | 1979-12-04 | 1981-07-02 | Brother Ind Ltd | Automatic channel selector |
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