JPS6380631A - Noise reduction circuit - Google Patents

Abstract

PURPOSE:To preclude a parasitic operation such as oscillations and high-frequency peaking by holding the product of the closed loop gain of a main amplifier and the gain of a variable gain amplifier provided on a feedback path at a specific value, and improving compression linearity corresponding to a wide-range input level. CONSTITUTION:A current output obtained by a detecting circuit 12 is fed back to the constant current source 206 of the main amplifier 20 as a feedback signal through a resistance 22 after passing through a path 18 to hold the product of the closed loop gain of the main amplifier 20 and the gain of the variable gain amplifier 8 at the specific value. Consequently, variation in feedback quantity which varies large corresponding to a strong and a weak input enters a specific range, so the compression linearity can be improved corresponding to the wide-range input level and the feedback system can be stabilized. Then, the product of the closed loop gain of the main amplifier 20 and the gain of the variable gain amplifier 8 is held at the specific value, so a countermeasure to the capacity of a phase correcting capacitor is not necessary and the necessary capacity is minimized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a noise reduction circuit that reduces noise in a recording medium or a transmission medium, and particularly to stabilization of its feedback system.

[Conventional technology]

Generally, logarithmic companding type noise reduction circuits are used for recording media and transmission, as shown in Japanese Patent Publication No. 57-22454 "Noise Reduction System" and Japanese Patent Application Laid-Open No. 60-232726 "Noise Reduction Circuit". An encoder logarithmically compresses the dynamic range of a signal to be recorded or transmitted on a medium, and then a decoder expands the recorded or transmitted signal in accordance with the logarithmic compression. This is to reduce the noise in the signal.

For example, in the noise reduction circuit used in the Hi-Fi audio system of a VTR, as shown in Figure 3,
Operational amplifier (M
For the OA) 2, an emphasis circuit (ENPH) 6 is installed in the feedback path 4 to reduce the high frequency components of the signal.
The signal obtained by the ENPH 6 is amplified by a variable gain amplifier (VCA) 8 and then fed back to the MOA 2. Then, the feedback signal is
hting) circuit (WTNG) 10 to frequency-weight the high-frequency components, the detection circuit (DET) 1
2 detects the AC level and generates a DC voltage according to the input signal level, and this DC voltage causes the VCA8 to
The gain is controlled. Therefore, the input signal VIN (fNc) applied to the input terminal 14 is subjected to logarithmic compression with high-frequency emphasis through the MOA 2 and its feedback path 4, and the output voltage from the output terminal 16 is output voltage . (Extracted as tNcl.

MOA2 is the open loop gain A due to the characteristics of the operational amplifier.
vo, and the transfer gain of the feedback path 4 is β, then MOA
The closed loop gain Avc of 2 is A vc = A vo/
(1+βAvo) ... fl), and AVO
Assuming that is sufficiently large compared to β (Avo>>
1/β), AvC#1/β...(2),
The closed loop gain is determined by the transfer characteristics of the feedback path 4.

Then, the amplification degree of VCA8 is A vca −V CA
When the gain control sensitivity of 8 is α, the voltage transmission characteristic of WTNG 10 is W, the voltage transmission characteristic of ENPH6 is E, and the AC/DC conversion rate of DET 12 is D, the output voltage V of VCA 8 is, V1=AvCA −E・■ . (fNc) ...(3)
Therefore, the amplification degree AvcA of VCA8 is AvC,a =
α・D−W・■. (, Nc,...(4), and the transfer characteristic in return path 4 is
o(ENc)2...(5) Here, due to the characteristics of the feedback amplifier, if Av6 is sufficiently large, ■l;■1, (!Nc, ... (6), so the output voltage ■..NC) is V o rtN
c+ = 1/α・DW−E・&>CX−vW■π;, (7), and logarithmic compression characteristics are obtained.

[Problem that the invention seeks to solve]

By the way, the encoding characteristic of such a noise reduction circuit is as shown in FIG.
C) - Output voltage V. (!Me) characteristics, input voltage V IN
(tNc> -V CA Gain (attenuation) of 8 Gv+
It has logarithmic compression characteristics as shown in vcA+ characteristics.

Therefore, for example, if the input frequency f is 1kHz, VI
When N+1:NC) = 0dBV, Vo+tNc+
= 0dBV, and in a circuit where the constant is set so that the transmission characteristic E of EMPH6 is 1, the gain of VCA8 is O.
dB, so the gain of MOA2 representing the encoding gain is OdB. At this time, V IN +ti
c) =-60dB In V, V o uNc〉=
30dB V, G V tVCA) = 30
dB. However, 0 dBV represents IV r m s.

Therefore, in such a noise reduction circuit, the dynamic range can be increased to 100 dB or more (VIN=-
100 to 0 dBV) The gain variable range of the VCA 8 to be set must be 50 dB (-50 to O dBV) or more.

By the way, the MOA in this noise reduction circuit is
2 open loop gain GVCfMOA)-frequency f characteristics are as shown in Figure 5, and the gain of feedback path 4 (attenuation ratio Gv(,4□,)-frequency characteristics are as shown in Figure 6. is common.

FIG. 7 shows the inverse gain (attenuation ratio)-frequency characteristics YI, Y2, Y of the feedback path 4 superimposed on the open-loop gain-frequency characteristic X of MOA2, and this is the result of encoding. Becomes a characteristic.

Also, for characteristic Y2, Y is Y at the time of weak input.

indicates strong input. Here, the portion surrounded by each Y characteristic and each X characteristic becomes the actual encoding characteristic, and the difference between the X characteristic and each Y characteristic becomes the feedback amount.

In this manner, when a strong input is applied, the phase margin of the feedback path 4 is lost in the high frequency range, and therefore peaking and oscillation of the frequency characteristics are likely to occur. To prevent this, it is necessary to increase the capacitance of the phase correction capacitor of MOA2 and narrow the frequency band of MOA2.

In addition, when the input is weak, the amount of feedback is insufficient and the high frequency characteristics deteriorate, making it impossible to obtain the normal frequency characteristics.
Distortion may worsen. To prevent this, it is necessary to reduce the capacitance of the phase correction capacitor of MOA 2 and widen the band. The characteristic Xl shown by a broken line in FIG. 7 shows the high frequency characteristic of MOA2 when the capacitance of the phase correction capacitor is made small, and the characteristic X2 shown by a broken line shows the high frequency characteristic of MOA2 when the capacitance of the phase correction capacitor is made large.

In other words, in conventional noise reduction circuits, the amount of feedback changes greatly depending on the input level, so when the amount of feedback is large (during strong input), oscillation, high-frequency peaking, etc.
This has the disadvantage that the feedback system becomes unstable, and the compression linearity deteriorates when the amount of feedback is small (at the time of weak input).

Furthermore, the phase margin at the time of strong input and the enhancement of the amount of feedback at the time of weak input are related to the band of MOA2, and contradictory conditions must be established regarding increase/decrease in the capacitance of the phase correction capacitor. , it is impossible to satisfy both.For example, in conventional noise reduction circuits, priority is given to countermeasures for strong inputs, sacrificing countermeasures for weak inputs, and the improvement of the high-frequency characteristics of MOA2 is performed. Only convenient improvements have been made, such as adding a capacitor or the like to the feedback path 4 to prevent oscillation.

The phase correction capacitor installed as such an expedient measure has a large capacity, and if it is used as a capacitive element on the IC, it will affect the chip size of the IC.

Accordingly, the present invention provides a noise reduction circuit that prevents oscillation during strong input, improves the deterioration of high-frequency characteristics during weak input, and reduces the capacitance of a phase correction capacitor.

[Means for solving problems]

As shown in FIG. 1, the noise reduction circuit of the present invention changes the gain of the variable gain amplifier (VCA8) installed in the feedback path 4 of the main amplifier (MOA20) to the main amplifier (MOA20).
In the noise reduction circuit that controls the output level of the main amplifier (MOA20) and the gain of the variable gain amplifier (VCA8), the product is set to a specific value (for example, a constant or close to constant value). ).

[For production]

With this configuration, by keeping the product of the open loop gain of the main amplifier (MOA20) and the gain of the variable gain amplifier (VCA8) at a specific value, it will not fluctuate greatly in response to strong or weak inputs. The fluctuation in the amount of feedback that had previously been caused is now within a specific range, and the compression linearity can be improved in response to a wide range of input levels, and the feedback system can be stabilized. In order to maintain the product of the open loop gain of the main amplifier (MOA20) and the gain of the variable gain amplifier (VCA8) at a specific value, there is no need to take measures for the capacitance of the phase correction capacitor. It can be configured with a capacity of

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the noise reduction circuit of the present invention.

This noise reduction circuit uses MO as the main amplifier.
A feedback path 4 is installed between the output terminal of A20 and its inverting input terminal (-), and the VCA installed in this feedback path 4
The gain of VCA 8 is controlled according to the output level of MOA 20, and the product of the open loop gain of MOA 20 and the gain of VCA 8 is held at a specific value.

That is, the product of the open-loop gain of the MOA 20 and the gain of the VCA 8 is kept at a specific value, particularly in a high frequency region, at or near a constant value.

The MOA 20 is, for example, a transistor 202.2.
A differential amplifier is constructed by sharing the emitter of 04 and installing a constant current source 206 on the emitter side, and a transistor 208.2 as an active load is connected to this differential amplifier.
10 and resistors 212 and 214, a phase correction capacitor 216 is installed between the collector (output point) of the transistor 204 and the ground point, and a transistor 218 and a constant current source 220 are installed as an output circuit. It was installed.

The amplified output obtained on the emitter side of the transistor 218 of this MOA 20 is taken out as an output signal from the output terminal 16, and is also output from the ENP provided in the feedback path 4.
Added for H6 and WTNGIO, WTNGI
The output signal whose high frequency weighting has been corrected by O is
It is converted to a DC level signal by DETI2, and the VC
Added to A8 as a variable gain control input. The output of the VCA 8 is fed back to the base of the transistor 204 on the inverting input side of the MOA 20 as a feedback signal on the feedback path 4 .

As an example of maintaining the product of the open loop gain of the MOA 20 and the gain of the VCA 8 at a specific value, the current output obtained by the DETI 2 is sent to the constant current source 206 of the MOA 2 as a feedback signal through the path 18 to the resistor 2 I am returning via.

Therefore, the current flowing through the constant current source 206 is 1.IN%. ,
If the output current fed back from DETI 2 is I OET, the current 1. Is””Io In. T...(8), which is the operating reference current of MOA20. DETI
It is obtained by subtracting the output current IDET of 2.

By doing this, by increasing or decreasing the detection voltage,
The gain of the VCA 8 and the open loop gain of the MOA 20 are controlled simultaneously.

In this case, the output current I□7 of DETI2 is WTNGI
It is a rectified signal that has been high-frequency corrected by O.
It is given as a direct current with a level depending on the high frequency correction.

Note that the open loop gain of the MOA 20 is the same as that of the transistor 20.
2.204 dynamic resistance re = 2Vt/I, (Vt ” k
T / Q ) and the impedance on the collector side of the transistor 204, that is, the l / h o e of the transistor 210 that constitutes the active load, and the input resistance of the phase correction capacitor 216 and transistor 218 connected thereto. However, due to the increase/decrease in IIN, re
and hoe act in the direction of cancellation, so the open loop gain does not change significantly in the low frequency region, but in the high frequency region, the collector load is dominated by the phase correction capacitor, so the open loop gain in the high frequency region does not change significantly. The loop gain changes proportionally as the current IIN increases or decreases.

Thus, the gain of MOA20 is proportional to the operating current IN, especially in the high frequency range, and the output current of DETI2 10
Since FT increases or decreases in proportion to the output signal level of MOA20, as shown in Figure 2, with the gain characteristic expands, and when there is a strong input, I 11! as shown in characteristic xb! ? By increasing M
The gain band of the OA 20 will be narrowed. As a result, M
The product of the open loop gain of OA20 and the gain of VCA8 is
It will keep you in a certain relationship. In Fig. 2, Yl, Y2, and Y3 indicate the inverse characteristics of the feedback path 4 with the input level as a parameter. Based on the characteristic Y2, the characteristic Y corresponds to a strong input, and the characteristic Y3 corresponds to a weak input. represent.

In a noise reduction circuit with such characteristics, if the characteristics are set as shown in Fig. 4, for example,
When the input level of input signal V0 is set to -20 dBV, the gain of VCA8 is -10 dB and the encoding gain is 1.
For example, if the open loop gain of the MOA 20 is 60 dB, the product of the open loop gain of the MOA 20 and the gain of the VCA 8, that is, the amount of feedback, is 50 dB. Also, when the input level of the input signal VIN increases to 0 dBV, the gain of CA8 decreases to O dB and the encoding gain increases to O dB, but at that time, MOA2
Since the open loop gain of 0 is reduced and the gain band on the high frequency side is expanded, the amount of feedback changes less than when the open loop gain of the MOA 20 is constant. In addition, the input signal VIN
If the input level of V decreases to 1100 dB V, then V
Although the gain of CA8 is reduced to -50 dB and the encode gain is increased to 50 dB, the open loop gain of MOA 20 is increased and the gain band on the high frequency side is expanded, so that the change in the amount of feedback is also reduced here. These effects are particularly noticeable in high frequency regions.

Further, since the value of the constant current 1° flowing through the constant current source 206 affects the gain bandwidth, the capacitance of the phase correction capacitor 216 can be reduced by selecting the value.

As a design consideration, it is necessary to suppress the offset that occurs between the inverting and non-inverting input terminals as much as possible by changing the constant current 118 of the MOA 20.

In particular, since changes occur in the base currents of the transistors 202 and 204, the impedance of the input signal source and VCA 8 is lowered.

[Examples of odd forms]

The following modifications can be considered to the noise reduction circuit of the present invention.

(As an example of maintaining the product of the open loop gain of MOA 20 and the gain of VCA 8 at a specific value, in the above embodiment, the gain of VCA 8 is controlled using the DC current obtained by detecting the output signal of MOA 20. At the same time, the gain of the MOA 20 is controlled, and the amount of feedback to the MOA 20 through the feedback path 4 is kept constant or its fluctuation is suppressed to keep it close to constant. The gain of the VCA 8 and the gain of the MOA 20 may be controlled.

The means for maintaining the product of the open loop gain of +21M0A20 and the gain of VCA8 at a specific value can also be achieved by partially adjusting or subtracting the compression characteristics.

〔Effect of the invention〕

As explained above, according to the present invention, the following effects can be obtained.

(a) Since the product of the open-loop gain of the main amplifier and the gain of the variable gain amplifier provided in the feedback path is held at a specific value, the amount of feedback to the main amplifier through the feedback path is constant or its fluctuation. is suppressed to a value close to a constant value, so it is possible to improve compression linearity in response to a wide range of input signal levels, prevent unnecessary parasitic operations such as oscillation and high-frequency peaking, and reduce noise. The operation of the circuit can be stabilized.

(b) The capacity of the phase correction capacitor installed in the main amplifier can be reduced, compared to the conventional one when the noise reduction circuit is configured with an IC and the phase correction capacitor is configured with an internal capacitance element. Therefore, the chip size can be reduced by using internal elements.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the noise reduction circuit of the present invention, Fig. 2 is a diagram showing the gain-frequency characteristics of the noise reduction circuit shown in Fig. 1, and Fig. 3 is a circuit diagram showing a conventional noise reduction circuit. The block diagram shown in Figure 4 is
A diagram showing the encode output voltage-encode input voltage characteristic and VCA gain-encode input terminal characteristic of the noise reduction circuit shown in the figure, FIG. 5 is a diagram showing the gain-frequency characteristic shown in FIG. 3, and FIG. FIG. 7 is a diagram showing the attenuation ratio of the feedback path, and FIG. 7 is a diagram showing the gain-frequency characteristics of the noise reduction circuit shown in FIG. 3. 4... Feedback path, 8... Variable gain amplifier, 12...
・Detection circuit, 18...path, 2o...main amplifier. Uf-1 Figure 2 Figure 3 Figure 4 f□ Figure 5 Figure 6

Claims (1)

[Claims] In a noise reduction circuit that controls the gain of a variable gain amplifier installed in the feedback path of the main amplifier according to the output level of the main amplifier, the product of the open loop gain of the main amplifier and the gain of the variable gain amplifier is A noise reduction circuit characterized by holding the value at a certain value.