JPS6380615U - - Google Patents
Info
- Publication number
- JPS6380615U JPS6380615U JP17574486U JP17574486U JPS6380615U JP S6380615 U JPS6380615 U JP S6380615U JP 17574486 U JP17574486 U JP 17574486U JP 17574486 U JP17574486 U JP 17574486U JP S6380615 U JPS6380615 U JP S6380615U
- Authority
- JP
- Japan
- Prior art keywords
- output terminal
- base
- output
- current control
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Control Of Electrical Variables (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
- Control Of Voltage And Current In General (AREA)
Description
第１図は本考案の一実施例の直流電源回路の回
路図、第２図は他の実施例の回路図、第３図は従
来例の回路図である。
Ａ，Ｂは第１、第２入力端子、Ｃ，Ｄ，Ｅは第
１、第２、第３出力端子、Ｑ３，Ｑ４は電流制御
用トランジスタ、Ｒ３はベースバイアス抵抗、Ｄ
２，Ｄ３はベースバイアス電流設定手段としての
ダイオード、Ｆは電圧帰還回路。
FIG. 1 is a circuit diagram of a DC power supply circuit according to one embodiment of the present invention, FIG. 2 is a circuit diagram of another embodiment, and FIG. 3 is a circuit diagram of a conventional example. A and B are the first and second input terminals, C, D and E are the first, second and third output terminals, Q3 and Q4 are current control transistors, R3 is the base bias resistor, D
2, D3 is a diode as a base bias current setting means, and F is a voltage feedback circuit.
Claims (1)
入力端子と、 前記第１および第２入力端子それぞれに対応す
る第１および第２出力端子と、 前記第１出力端子との間で第１負荷が、また前
記第２出力端子との間で第２負荷がそれぞれ接続
される第３出力端子と、 それぞれのコレクタを前記第１および第２出力
端子に接続され、かつ、互いのエミツタを共通に
前記第３出力端子に接続されたｎｐｎ型の第１電
流制御用トランジスタおよびｐｎｐ型の第２電流
制御用トランジスタと、 前記第１入力端子と前記第１電流制御用トラン
ジスタのベースとの間に接続されたベースバイア
ス抵抗と、 前記両電流制御用トランジスタのベース間に接
続され、無負荷時の前記両電流制御用トランジス
タのベースバイアス電流を設定する無負荷ベース
バイアス電流設定手段と、 前記第３出力端子に入力部が接続され、前記第
２電流制御用トランジスタのベースに出力部が接
続されるとともに、前記第３出力端子に現れる直
流出力電圧をその入力部に帰還電圧として与えら
れ、この帰還電圧の変動に応答してその直流出力
電圧を一定値に保つようにその出力部から前記第
２電流制御用トランジスタのベースに対してその
ベース電位を変化させる電圧帰還回路と を具備したことを特徴とする直流電源回路。 (2) 前記ベースバイアス電流設定手段が少なく
とも２個のダイオードで構成されている前記実用
新案登録請求の範囲第(1)項に記載の直流電源回
路。[Claims for Utility Model Registration] (1) First and second to which DC input voltage is applied
a first load between the input terminal, first and second output terminals corresponding to the first and second input terminals, and the first output terminal; and a first load between the first output terminal and the second output terminal. a third output terminal to which two loads are respectively connected; and an npn type third output terminal having respective collectors connected to the first and second output terminals and having their emitters commonly connected to the third output terminal. a PNP-type second current control transistor; a base bias resistor connected between the first input terminal and the base of the first current control transistor; and both current control transistors. a no-load base bias current setting means connected between the bases of the transistor and configured to set the base bias current of both of the current control transistors when no load is applied; and an input section connected to the third output terminal, the second current control transistor The output part is connected to the base of the transistor for the purpose of operation, and the DC output voltage appearing at the third output terminal is applied to the input part as a feedback voltage, and the DC output voltage is set to a constant value in response to fluctuations in the feedback voltage. 2. A DC power supply circuit comprising: a voltage feedback circuit for changing the base potential from the output portion of the circuit to the base of the second current control transistor so as to maintain the voltage at the base of the second current control transistor. (2) The DC power supply circuit according to claim 1, wherein the base bias current setting means includes at least two diodes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986175744U JP2528838Y2 (en) | 1986-11-14 | 1986-11-14 | DC power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986175744U JP2528838Y2 (en) | 1986-11-14 | 1986-11-14 | DC power supply circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6380615U true JPS6380615U (en) | 1988-05-27 |
| JP2528838Y2 JP2528838Y2 (en) | 1997-03-12 |
Family
ID=31115345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986175744U Expired - Lifetime JP2528838Y2 (en) | 1986-11-14 | 1986-11-14 | DC power supply circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2528838Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5071742U (en) * | 1973-11-02 | 1975-06-24 |
-
1986
- 1986-11-14 JP JP1986175744U patent/JP2528838Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5071742U (en) * | 1973-11-02 | 1975-06-24 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2528838Y2 (en) | 1997-03-12 |
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