JPS6378645A - Telephone controller - Google Patents

Abstract

PURPOSE:To make an arithmetic processing means carry out an efficient operation, by constituting a device so that no holding state of the arithmetic processing means is generated in the disconnected state of a telephone line in a short period to execute the operation of a specific mode, for example, hooking, or flashing, etc. CONSTITUTION:When an information signal of L level which represents the disconnected state of the telephone line at a time t1 is supplied to the input terminal (a) of an input circuit 21, the common contact 29a of a switching circuit 29 is switched and controlled to a fixed contact 29c, and the charged voltage (VDD) of a capacitor C1 is discharged. In this time, since a diode D1 is reversely biased, the voltage level of the hold terminal 23a of a CPU23 is lowered by a time constant of C1.R1. In such a case, by generating the connection state of the telephone line, setting the H level of the information signal, and switching the switching circuit 20 to a state shown in figure, by a discharged voltage level, at a time t2 before a time t3 when a level arrives at the level Vh that the CPU23 becomes the holding state, the D1 is biased in a forward direction, and the C1 is charged rapidly, and the voltage level to be impressed on the hold terminal 23a is increased, therefore, no holding state of the CPU23 is generated.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention provides a telephone that detects that a telephone line has been interrupted for a predetermined period of time and executes a specific mode of operation. The present invention relates to a control device, and particularly to one that controls a microcomputer from going into a hold state when a telephone line is disconnected.

(Prior Art) As is well known, in a telephone communication system, by performing so-called hooking, in which the telephone line is disconnected by going on-hook for a predetermined period during a call, it is possible to switch to, for example, hold mode or extension transfer mode. Devices that can perform operations in specific modes are becoming widespread.

Additionally, in recent years, push-button type telephones have been introduced to operate the flash key for a predetermined period of time during a call to disconnect the telephone line (so-called flashing), thereby allowing the operation in the specific mode described above to be performed without going on-hook. New features are emerging that can be used, and efforts are being made to improve operability.

FIG. 8 shows such a conventional telephone control device. That is, in the figure, reference numeral 11 denotes an exchange, which is connected to a telephone line (not shown), and is also connected to a speech network circuit 18 via a connection terminal 12.1B, a rectifier circuit 14, and switches 15 to 17, and a handset 19. Telephone calls can be made via the . Further, this exchange 11 can detect that the telephone line has been interrupted for a predetermined period of time, switch the telephone line to a specific line, and execute operations in a specific mode, such as a hold mode or an extension transfer mode. This is how it is done.

On the other hand, numeral 20 in the figure is a button operation section, and operation signals of each key are supplied to a control section 26 consisting of an input circuit 21, a timer circuit 22, a microcomputer (hereinafter referred to as CPU) 23, a memory 24, and an output circuit 25. . This control section 26 controls, for example, the sending operation of dial pulses, etc., and uses a signal output from the output terminal of the output circuit 25 to control the switch 17, which is normally on, to an off state, thereby generating dial pulses. The break signal is sent to the telephone line.

Note that in FIG. 8, a constant voltage circuit 28 consisting of a constant current circuit 27, a diode DI, and a constant voltage source E generates power to be supplied to the control section 26.

Here, the switch 15 is linked to a hook switch (not shown), and is controlled to be in an on-hook state and an off state, thereby disconnecting the telephone line. When the switch 15 is turned off, it generates an information signal at the input terminal a of the input circuit 21 indicating that the telephone line has been disconnected.

Further, the switch 16 is connected to the button switch key operation section 2.
The telephone line is turned off by an information signal generated when the button of the flash key F provided at 0 is operated, and even in the off-hook state, the telephone line can be disconnected by operating the flash key F. ing. The information signal output by operating this flash key F is also supplied to the input terminal a of the input circuit 21.

Here, the CPU 23 of the control section 26 controls the input circuit 21.
While the above-mentioned information signal is being supplied to the input terminal a of , it is in a hold state. In this case, when the CPU 23 enters the hold state, it stops its internal oscillation operation and stops all processing operations.

Specifically, as shown in FIG. 9, the hold terminal 23a of the CPU 23 is connected to a common contact 29a of a switch circuit 29 whose switching is controlled by the information signal. When the information signal is not supplied to the input circuit 21, that is, when the telephone line is connected, the switch circuit 29 connects its common contact 29a to the power supply terminal 30 to which the DC voltage VDD is applied. 1 fixed contact 29b
and when the information signal is supplied to the input circuit 21, that is, when the telephone line is disconnected, the common contact 29a is switched to be connected to the second fixed contact 29c connected to the ground terminal. It is something.

The CPU 23 performs normal arithmetic processing operations with the DC voltage VDD applied to its hold terminal 23a, and enters a hold state with the hold terminal 23a at ground level.

Because of this, the telephone line may become disconnected, whether in the hooking or flushing state to execute a specific mode of operation, or in the on-hook state for a period when the exchange 11 determines that the exchange has ended. Accordingly, C
The PU 23 will be in a hold state, and the operation of the control unit 26 will be stopped.

Therefore, for example, the hooking period and the flushing period are measured using the CPU 23 of the control section 26, and the control section 26 measures the hooking period and the flushing period.
6 cannot be used to perform predetermined arithmetic and control processing, etc., resulting in extremely inefficient operation.

(Problems to be Solved by the Invention) As described above, in the conventional telephone control device, when the telephone line is disconnected, the CPU 23 enters the hold state.
23 cannot be used for measurement, and there is a problem in that it is very inefficient in terms of operation.

Therefore, this invention was made in consideration of the above circumstances, and in order to execute a specific mode of operation, the CPU is not placed in a hold state in a short-term telephone line disconnection state such as hooking or flashing. It is an object of the present invention to provide an extremely good telephone control device that enables efficient operation.

[Configuration of the Invention (Means for Solving Problems) That is, the telephone control device according to the present invention includes an arithmetic processing means that enters a hold state when an information signal indicating that the telephone line is disconnected. This system is designed to detect when a telephone line has been interrupted for a predetermined period of time and execute a specific mode of operation. Then, the information signal is supplied to the arithmetic processing means in a state in which the information signal is continuously generated for a predetermined period or more.

(Function) According to the above configuration, the information signal that puts the arithmetic processing means in a hold state is supplied to the arithmetic processing means in a state in which the information signal is continuously generated for a predetermined period or more. Therefore, the arithmetic processing means does not go into a hold state even if the telephone line is disconnected for a short period of time, such as due to hooking or flashing, and the arithmetic processing means can operate efficiently.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. In FIG. 1, the same parts as in FIG. 9 are shown with the same symbols, and only the different parts will be explained here. That is, the hold terminal 23a of the CPU 23
The difference from the conventional method is that a delay circuit 31 consisting of resistors R1, R2, a capacitor C1, and a diode D1 is interposed between the switch circuit 29 and the common contact 29a of the switch circuit 29.

According to such a configuration, as shown in FIG. 2(a),
When an L level information signal indicating that the telephone line is disconnected is supplied to the input terminal a of the input circuit 21 at time t1, the common contact 29a of the switch circuit 29 is connected to the second fixed contact 29c. Since switching is controlled, capacitor C1
The charging voltage (approximately V DD) is discharged. At this time, since the diode D1 is reverse biased, the voltage level of the hold terminal 23a of the CPU 23 decreases with a time constant of C1·R1, as shown in FIG. 2(b).

In this case, the time t before the time t3 when the discharge voltage level reaches the level vh at which the CPU 23 enters the hold state.
2, if the telephone line is connected, the information signal is set to H level, and the switch circuit 29 is switched to the state shown in FIG. 1, the diode DI is forward biased, so the capacitor CI is rapidly charged. This increases the voltage level applied to the hold terminal 23a, thereby preventing the CPU 23 from entering the hold state.

Therefore, if the period from time 11 to t3 is set longer than the new period of the telephone line required to execute the specific mode operation, if the specific mode operation is executed by hooking or flashing, , the CPU 23 is not put into a hold state and can be utilized for other calculation processing.

FIG. 3 shows a modification of the above embodiment, in which, similarly to FIG. 1, a delay circuit 32 consisting of resistors R3, R4, a capacitor C2, and a diode D2 is used, and its charging/discharging time constant and CPU 23 are held. The CPU 23 is controlled to enter the hold state depending on the relationship with the state level vh.

Next, FIG. 4 shows another embodiment of the present invention. That is, the common contact 29a of the switch circuit 29
, C through the counter input terminal 23b of the CPU 23.
It is connected to the counter 33 installed in the PU23. Then, at time t4 in FIG. 5(a), the telephone line is disconnected and the switch circuit 29 is switched to the opposite state to that in FIG.
The counter input terminal 23b of the CPU 23 is at ground level (L
level).

Then, the counter 33 starts counting, and it takes a period of time t until the count value reaches a predetermined value.

At time t5, before , the telephone line is connected and the switch circuit 29 is returned to the switching state shown in FIG.
As shown in FIG. 5(b), since the output of the counter circuit 33 supplied to the hold terminal 23a via the counter output terminal 23c of the CPU 23 remains at H level,
The CPU 23 is not in a hold state.

Further, there is a period t from when the counter input terminal 23b of the CPU 23 is set to the L level at time t6 in FIG. 5 until the count value of the counter 33 reaches a predetermined value.

If the L level is still supplied to the counter input terminal 23b even after the elapse of
), it becomes L level. This L level signal is then supplied to the hold terminal 23a via the counter output terminal 23c, and the CPU 23 enters the hold state.

Next, FIG. 6 shows a third embodiment of the present invention. That is, the common contact 29 of the switch circuit 29
a to the CPU 23 via the hold terminal 23a of the CPU 23.
It is connected to the counter 34 installed in U23. Then, at time t7 in FIG. 7(a), the telephone line is disconnected and the switch circuit 29 is switched to the opposite state to that in FIG.
Assume that the hold terminal 23a of the PU 23 is set to the ground level (L level).

Then, the counter 34 starts counting, and it takes a period t until the count value reaches a predetermined value.

At time t8 before the elapse of , when the telephone line is connected and the reswitch circuit 29 is returned to the switching state shown in FIG.
As shown in FIG. 7(b), the output of the counter circuit 34 remains at H level. Therefore, regardless of the hold release signal shown in FIG. 7(c) supplied to the input terminal 35, the output of the OR circuit 36 is at H level as shown in FIG. 7(d).

At this time, if the forced hold signal supplied to the input terminal 37 is at H level as shown in FIG. 7(e), an H level signal is output from the AND circuit 38 as shown in FIG. 7(f). The signal is output to the terminal 39, and the CPU 2B is controlled so as not to enter the hold state.

On the other hand, at time t9 in FIG.
If the hold terminal 21a is still supplied with the L level even after the period to has elapsed until the count value of the counter 34 reaches the predetermined value after the signal 3a is set to the L level, the output of the counter circuit 34 is as shown in the figure. It becomes L level as shown in (b). Therefore, the respective outputs of the OR circuit 36 and the AND circuit 38 become L level, and the CPU 23 enters a hold state.

Further, at time tlO in FIG. 7, the hold terminal 23a of the CPU 23 is set to the L level for a period longer than to until the count value of the counter 34 reaches a predetermined value, and the CPU 23 is in the hold state. Assume that the hold release signal becomes H level. Then, each output of the OR circuit 36 and the AND circuit 38 becomes H level, and the hold state of the CPU 23 is released.

Furthermore, in the hold release state as described above, at time t12
When the forced hold signal becomes L level, the output of the AND circuit 38 becomes L level, and the CPU 23 is forced to enter the hold state.

It should be noted that the present invention is not limited to the above-mentioned embodiments, and can be implemented with various modifications without departing from the spirit of the invention.

[Effect of the invention] Therefore, as detailed above, according to this invention,
In order to execute a specific mode of operation, for example, during a short period of telephone line disconnection such as hooking or flashing, C
It is possible to provide an extremely good telephone control device that allows the 02 units to operate efficiently without putting the PU in a hold state.

[Brief explanation of the drawing]

Fig. 1 is a circuit configuration diagram showing an embodiment of the telephone control device according to the present invention, Fig. 2 is a timing diagram for explaining the operation of the embodiment, and Fig. 3 shows a modification of the embodiment. 4 and 5 are block diagrams showing a second embodiment of the present invention and timing diagrams for explaining its operation, and FIGS. 6 and 7 are block diagrams showing a second embodiment of the present invention, respectively. 8 is a block diagram showing the embodiment of No. 3 and a timing diagram for explaining its operation; FIG. 8 is a block diagram showing the telephone control device; and FIG. 9 explains problems with the conventional telephone control device. FIG. 11...Exchange machine, 12.13...Connection terminal, 14.
... Rectifier circuit, 15-17... Switch, 18...
Speech network, network circuit, 19... handset, 20
... Butush key operation section, 21 ... Input circuit, 22
...Timer circuit, 23...CPU. 24... Memory, 25... Output circuit, 2B... Control unit, 27... Constant current circuit, 28... Constant voltage circuit,
29... Switch circuit, 30... Power supply terminal, 31.
32...Delay circuit, 33.34...Counter, 35
...input terminal, 3B...OR circuit, 37...input terminal, 38...AND circuit, 39...output terminal. Applicant's representative Patent attorney Takehiko Suzue Figure 1 t+ t2t3 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 9

Claims (1)

[Claims] The apparatus includes arithmetic processing means that enters a hold state when an information signal indicating that the telephone line is cut off, detects that the telephone line is cut off for a predetermined period of time, and executes a specific mode of operation. A telephone control device, characterized in that the telephone control device comprises control means for supplying the information signal to the arithmetic processing means in a state in which the information signal is continuously generated for the predetermined period or more.