JPS6376614A - Josephson driver circuit - Google Patents

Abstract

PURPOSE:To change over and output the signal with an arbitrary polarity from one side of first and second Josephson gates at a high speed by dot-connecting respective output edges of first and second magnetic fields combining type Josephson gates biased by a mutually different polarity through a resistance. CONSTITUTION:A circuit is constituted to induce an electromagnetic induction current to a loop and switch a Josephson element, and a Josephson gate 10 is biased by a bias current +IB of a positive polarity from an input terminal 12 and on the other hand, a Josephson gate 11 is biased by a bias current -IB of a negative polarity from an input terminal 13. The output terminal the Josephson gate 10 is mutually dot-connected through resistances 14a and 14b serially and the output terminal of the Josephson gate 11 is dot-connected through resistances 15a and 15b serially, and between the dot connecting point and the ground, a load resistance 18 is connected. Thus, the changing-over of the highly speedy output current specified only by a switching speed can be executed with a comparatively simple constitution.

Description

[Detailed Description of the Invention] [Summary] The present invention provides an integrated circuit using a Josephson element, in which signals of positive polarity and signals of negative polarity are switched and outputted at high speed. By connecting each output terminal of the first and second magnetically coupled Josephson gates to the driver 1 through a resistor, a signal of arbitrary polarity can be transmitted from one of the first and second magnetically coupled Josephson gates at high speed. The output is switched between the two.

[Industrial application field]

The present invention relates to a driver circuit, and more particularly to a driver circuit that selectively outputs signals of both positive and negative polarities.

For example, in a Josephson memory made up of memory cells made up of Josephson elements, for example, during a write operation, a positive polarity signal and a negative polarity signal are sent from the driver circuit depending on whether the data is '1'' or II OII. It is necessary to select and use the signal, and in that case, it is required to switch the signal polarity at high speed.

[Conventional technology]

FIG. 3 shows a circuit diagram of an example of a conventional driver circuit. The driver circuit shown in Figure 3 consists of four Josephson ropes J1.
~J4 is composed of 70 current flips connected in a bridge, and the output loop by line 2 has a circuit configuration that does not include a resistor.

Now, if we assume that a signal current enters only 5etl of 5et1 and 5et2, Josephson element J1
and J3 switches to voltage state and becomes high resistance, so
The bias current (DC current) from the bias current source 1 is applied to the Josephson cable J2° line 2. Josephson element J4
flows in the order of , and a positive output current is obtained.

On the other hand, if a signal current is input to only 5et2 of set l and 5et2, Josephson elements J2 and J4 will each switch to a voltage state, resulting in high resistance.
The bias current from bias current source 1 is connected to Josephson element J+, line 2. Flows in the order of Josephson element J3,
A current flows through line 2 in the opposite direction to the above, and an output current of negative polarity is obtained.

[Problem that the invention seeks to solve]

In a conventional driver circuit using a Josephson element (Josephson driver circuit), the circuit is configured with current-norming flops, so the time td required for switching from one of the positive and negative polarities to the other is td=L・Determined by I/VJ. However, in the above formula, L is the loop inductance,
(2) is the output current level, and VJ is the voltage generated across the Josephson junction, which is the gap voltage of the hollow junction.

In other words, the time td required for switching in the conventional driver circuit is clearly determined by the loop inductance L from the above equation.
However, the loop inductance L is large, and even if an attempt is made to reduce it, L cannot be reduced enough to drive a plurality of loads, resulting in a problem that the switching speed is slow.

The present invention was created in view of the above-mentioned problems, and it is an object of the present invention to provide a dichroic driver circuit capable of switching output between a positive polarity signal and a negative polarity signal at high speed. purpose.

[Means for solving problems]

The Josephson driver circuit of the present invention has first and second magnetically coupled Josephson gates biased with mutually different polarities, and an input signal to either one of the first and second magnetically coupled Josephson gates. input means for supplying the first and second resistors, one end of which is separately connected to each output terminal of the Josephson gate, and the other end of which is dot-connected to each other; and a connection between the dot connection point and ground. and a load resistance.

In addition, if necessary, two Josephson gates may be connected, one end of which is separately connected to the two transmission paths between the output terminal of the Josephson gate and the first and second resistors, and the other end of which is connected to ground. It has an element.

Further, the input means comprises first and second two-input gate circuits to which the same input signal and different control signals are respectively supplied.

-〇- [Operation] The first and second magnetically coupled Josephson gates are biased with different polarities, and their respective output terminals are dot-connected via the first and second resistors. Here, the input signal is supplied to one of the first and second magnetically coupled Josephson gates by the input means, and a signal corresponding to the bias polarity is extracted from the supplied Josephson gate. Here, since the Josephson gate is composed of a Radzigate, the excitation is determined by the switching speed of the Josephson element.

Output lines from the dot connection points can be wired using strip lines.

The two Josephson elements, the other ends of which are connected to ground, block current from flowing into the other Josephson gate when one of the first and second magnetically coupled Josephson gates is switched.

Furthermore, when a two-input gate circuit is used as the input means, the output signal of the Josephson memory decoder is used as the input signal, and the output signal of the polarity control circuit is used as the control O signal, so that the selected output can be controlled. You can set the output status of

〔Example〕

FIG. 1 shows a circuit diagram of an embodiment of the present invention.

In FIG. 1, the input signal S entering the input terminal 3 is
The signal is supplied to two-man power AND gates 6 and 7, respectively, constructed using Josephson elements. On the other hand, the control signal A that has entered the input terminal 4 is supplied to the AND gate 6, and the control signal B that has entered the input terminal 5 is supplied to the AND gate 7. The output signal of the AND gate 6 is supplied to a first magnetically coupled Josephson gate 10 via a resistor 8. Also,
The output signal of the AND gate 7 is supplied to a second magnetically coupled Josephson gate 11 via a resistor 9.

Both of the magnetically coupled Josephson gates 10 and 11 magnetically couple a superconducting loop using a three-junction quantum interference Josephson device with an input signal line, and induce an electromagnetic induction current in the loop to form a Josephson device. However, while the Josephson gate 10 is biased by the positive polarity bias current 118 from the input terminal 12, the Josephson gate 11 is biased by the negative polarity bias current -IB from the input terminal 13. The difference is that it is biased by

The output terminals of the Josephson gate 10 are connected to resistors 14a and 1
4b in series, and the Josephson gate 11
The output terminals of the output terminals are dot-connected to each other via resistors 15a and 15b in series. A load resistor 18 is connected between this dot connection point and ground.

The connection point between resistors 14a and 14b is connected to ground via Josephson element 16, and the connection point between resistors 15a and 15b is connected to ground via Josephson element 17.

In the above circuit, if you want to obtain a positive output current,
The control signal Δ is at a high level and the control signal B is at a low level, and in this state, a high level input signal S is input. As a result, a high level signal is taken out only from the AND gate 6, and an input current is applied to the input line of the Josephson gate 10 via the resistor 8. As a result, the Josephson gate 10 switches to a voltage state, so that the positive bias current +8 is output to the load resistor 18 via the resistors 14a and 14b in series. Therefore, a positive output current is obtained. At this time, Josephson Gate 11
is in a superconducting state, and the negative polarity bias current -Is is di''
It flows only into the SEFRAN gate 11.

Further, the positive bias current +Is from the Josephson gate 10 flows through the resistor 15b to the Josephson element 17 in a superconducting state, and is not supplied to the Josephson gate 11.
The Josephson gate 11 is prevented from switching due to the effect of switching.

On the other hand, when obtaining a negative output current, the control signal A is set to a low level and the control signal B is set to a high level, and in this state, a high level input signal S is input, so the AND
A high-level signal is taken out only from the gate 7, and an input current is applied to the input line of the Josephson gate 11 through the resistor 9. As a result, the Josephson gate 11 switches to the electric state, and the input terminal 13 A negative polarity bias current -Is is outputted to the load resistor 18 via the resistors 15a and 15b (however, the direction of the current is opposite). Therefore, in this case, the negative electrode +1 current is output. In this case, the Josephson element 16 causes the Josephson element 1 to switch by the Josephson gate 11.
o is prevented from being switched.

Note that when the input signal S is low level, or when the control signal A
and B are both low level, AND gate 6
Since the output signals of and 7 are both at low level and neither of the Josephson gates 10 and 11 switches, no output current is obtained.

FIG. 2 shows the configuration of a memory circuit having such a driver circuit according to the present invention. In Figure 2, Josephson memory 2
0 has a configuration in which a large number of memory cells 21 using Josephson elements are arranged in a matrix. This memory cell 21 includes m driver circuits 221 to 22m of the present invention.
and output signals of n driver circuits 231 to 23η of the present invention are supplied. The driver circuits 221 to 22m are supplied with the signal of the X decoder/polarity control circuit 24, and the driver circuits 231 to 23TI are supplied with the output signal of the Y decoder/polarity circuit 25.

Here, driver circuits 221 to 22m and 231 to 23n
have the configuration shown in FIG. 1, and the output signal of the X decoder or Y decoder is supplied as the input signal S, and the control signals A and B are supplied from the polarity control circuit.

As a result, when writing data to the memory cell 21 at a desired address, for example, when writing data of 1'', a positive polarity current is output from each driver circuit corresponding to the selected address among the driver circuits 221 to 22m and 23+ to 23η. When data is written to II O11, a negative polarity current is output.

It should be noted that the present invention is not limited to the above-mentioned embodiment, and -11= is not required; for example, the Josephson elements 16 and 17 may not necessarily be provided. Also, Josephson Gate 10 and 1
The output terminal 1 is not limited to the embodiment, and may be obtained from, for example, a connection point between the bias current input terminal 12, 13 and a resistor. Further, the di-sefson gate is not limited to the three-junction quantum interference type Josephson device, but can also be a two-junction quantum interference type di-sefson device.

〔Effect of the invention〕

As described above, according to the present invention, by selecting two Josephson gates without using a loop inductance, the current of positive and negative polarities is switched and output. The main feature of the cap is that it can switch the output current quickly, which is determined only by the switching speed, with a relatively simple configuration, and that the current propagation time can be shortened because strip line wiring is possible. It is.

= 12 -

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is a diagram showing the configuration of a memory circuit having a circuit of the present invention, and FIG. 3 is a circuit diagram of an example of a conventional driver circuit. In the figure, 3 is an input terminal, 4.5 is a control signal input terminal, 6.7 is an AND gate, 1o and ii are magnetically coupled Josephson gates, 12.1
3 is a bias current input terminal, 14314b, 15a, 15b are resistors, 16.17 is a Josephson element, 18 is a load resistor, 221-22m, 231-23η are driver circuits.

Claims (3)

[Claims] (1) First and second magnetically coupled Josephson gates (10, 11) biased with signals of mutually different polarities
and input means (6, 7) for supplying an input signal to either one of the first and second magnetically coupled Josephson gates, one end of which is connected to the first and second magnetically coupled Josephson gates ( 10, 11) separately connected to each output terminal, and
First and second resistors (1
4a, 14b, 15a, 15b), and the first and second resistors (14a, 14b, 15a, 15
A Josephson driver circuit comprising a load resistor (18) connected between the dot connection point of b) and ground, and configured to switch and output one of positive and negative polarity signals to the load resistor. (2) One end is connected separately to two transmission paths between the output terminals of the first and second magnetically coupled Josephson gates and the first and second resistors, and the other end is connected to ground. 2. The Josephson driver circuit according to claim 1, characterized in that it has two Josephson elements (16, 17), respectively. (3) The input means includes first and second two-input gate circuits (6) to which the same input signal and different control signals are supplied, respectively.
, 7). The Josephson driver circuit according to claim 1, characterized in that the Josephson driver circuit comprises: