JPS637165A - Power converter - Google Patents

Abstract

PURPOSE:To eliminate a complicated external synchronizer by providing power source synchronizing means for canceling a schedule set already in response to a power source synchronization input signal and synchronizing the power source by setting a new schedule. CONSTITUTION:An extinguishing pattern is applied to the component of a converter 2 by a pattern generator 10 made of a control one-chip microcomputer. The generator 10 has function generating means 100 for generating a phase command and a conduction rate command in response to a current error, general phase forming means 120 for forming a general phase command, region judging means 130 for judging a region which contains the general phase command, and a distributor 140 for deciding to which how pulse pattern is applied from deciding information, the general phase command and the conduction rate command to any control element. A synchronizer 9 corrects the content of an integral value storage register of the frequency command in the generator 10 at the time of generating a zero crossing pulse.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power conversion device, and particularly to a power conversion device suitable for a converter that performs pulse width control.

[Conventional technology]

Japanese Patent Application Laid-Open No. 56-1629 from the viewpoint of improving the power factor of converters
In Publication No. 76, a controllable switching element with a current interrupting function is connected to the arm, and pulse width control and phase control are combined. A method using only control has been proposed. However, both require synchronization with the power supply voltage for converter control. In conventional technology, as a means for performing this synchronization, a pulse train is generated using a synchronization signal generated when one phase of the AC power supply voltage changes from negative to positive and crosses zero voltage (pulse width control only). ), a method was used in which a series of pulse generation processes were executed in synchronization with a synchronization signal, such as by activating a phase control system prior to pulse train generation (if phase control was also used).

However, with this type of synchronization technology, synchronization is forcibly performed when a synchronization signal is generated, regardless of what kind of pulse train is currently being generated. There are many situations where an ignition command is generated for a converter element, but an extinguishing command must be immediately generated through synchronization processing.
From the point of view of ensuring the minimum pulse width given to the converter element (needing to prevent damage to the element), Japanese Patent Application Laid-Open No. 59-103579
There was room for improvement in the simplicity of the system configuration, such as the need to provide an additional circuit externally as shown in the publication.

[Problem that the invention seeks to solve]

In the above-mentioned conventional technology, a software method is generally used in which a minimum pulse width securing circuit is installed separately, or a software method that has a built-in pulse width securing algorithm but cannot narrow the output pulse width sufficiently due to processing time. There was a problem with the technology to ensure pulse width.

An object of the present invention is to provide a power conversion device that can eliminate the need for a complicated external synchronous circuit and simplify the system.

Means for Solving Problem C] The above purpose is to provide a power synchronization processing means that cancels an already set schedule in response to a power synchronization input signal and performs power synchronization processing by setting a new schedule, and The generation is performed using a schedule, which is a peripheral function of the microcomputer, and the synchronization process is achieved by resetting a new schedule after ensuring the minimum pulse width.

[Effect]

The synchronization process according to the present invention operates in a manner that includes the minimum pulse width securing process, so the minimum pulse width securing is implemented in software, and the pulse pattern output is scheduled, so no external attached circuit is required. becomes.

〔Example〕

The present invention will be described below with reference to FIGS. 1, 2, 4, and 7.

The embodiments shown in FIGS. 8, 10, and 11 and the third
This will be explained in detail with reference to FIG. 5, FIG. 6, and FIG. 9.

FIG. 1 is an overall configuration diagram showing an embodiment of a power conversion device of the present invention. First, the overall configuration will be explained. 1
is a replacement power supply that supplies power to converter 2, 3 is a current detector that detects the DC output current of converter 2, and 4 is L
-R load, 5 is the input terminal of the DC current command knee, 6 is the comparator for calculating the deviation Δi between the command 1 and the feedback value iz, 7 is the voltage detector that detects the AC voltage level, 8 is the AC voltage value 9 is a waveform shaping circuit that generates a pulse when a zero cross occurs; 9 is a synchronization device that corrects the contents of the integral value storage register of the frequency command ωψ inside the pattern generator 10 when a zero cross pulse U↑ is generated; 10 is a component of the converter 2 This is a pattern generating device consisting of a one-chip microcomputer for control that generates a flashing and extinguishing pattern. Pattern generator 1
0 is a function generating means 110 that generates the second phase command PHx and the conduction rate command PU- according to the current deviation Δi. Comprehensive phase creating means 12 that integrates the power supply frequency command ω table at regular time intervals to create a first phase command PH5-, and creates a comprehensive phase command θT from the second phase command PH2-.
0. Depending on the value of the comprehensive phase command θ, the output ranges from 0 to 60.
@, 60~120'', 120~180', 180~2
40@, 240-300'.

Region determination means 1 stage 1302 determination information Mo for determining which region it is included in among the six regions 300 to 36o@
, a total phase command 0-1 duty ratio command PUψ, and the like, the distribution device 140 determines which pulse pattern should be given to which control element. In addition, 2
1 to 26 are control elements of the converter 2.

Next, the operation will be specifically explained. Note that here, since each device 1 means is realized by a microcomputer, the operation of each device 7 means will be explained using a flowchart.

FIG. 2 is a flowchart showing an embodiment of the general processing of the synchronization device 9 of FIG. 1, which is the main processing. Since the synchronization process is started by the zero cross pulse U↑ of the power supply, if there is no fluctuation in the power supply and a 50 Hz power supply is used, this subroutine will be executed every 2Qmsec. The main processing of this subroutine is to reset to zero the value of the first phase command PHz- obtained by integrating the frequency command ω- of the power supply every fixed time Δ;
These are to ensure minimum pulse width and to provide criteria for schedule cancellation and rescheduling.

Next, the details will be explained one by one. Process 91 is an additional process for making this synchronization process less likely to malfunction due to disturbances. In other words, when the ideal zero-cross pulse is input, the 1-phase command PH1''l should be close to the electrical angle of 360°.If the value of PHx is too far from 360°, the signal is rejected. The interrupt is
The program returns to waiting for an interrupt without performing synchronization processing.

This additional processing can prevent malfunctions in the synchronization processing.

Figure 4 shows an example where such a phenomenon occurs.
(a) shows the ideal case, (b) shows the case where an erroneous zero-crossing pulse occurs; there is no guarantee that the power supply voltage waveform vU will always be in the state shown in (,).

It is obvious that noise will be superimposed as shown in (b),
If synchronization processing is performed each time due to an erroneous zero-cross pulse at this time, normal pattern generation cannot be expected.

If the zero-cross pulse input is normal, it is determined in the next process 92 whether the minimum pulse width determined by the specifications of the converter components is secured, and if not, a time waiting loop is entered. That is, the minimum pulse width is ensured by software by checking whether the elapsed time since the last time the transistor was turned on or off is equal to or greater than the minimum pulse width. Next, in process 93, the pulse distribution schedule as described later is canceled. This schedule 1 of pulse distribution is performed by pulse distribution processing in the distribution device 140 in the pattern generation device 10 every - fixed time Δ, and is performed by sending an on or off signal to a predetermined transistor at a predetermined time. C
This is a function that is generated without PU intervention. Naturally, zero-crossing pulse input may occur while the pulse distribution schedule still remains, so cancel processing is performed to prevent problems from occurring due to this remaining schedule when rescheduling. Process 94 is for pattern generation processing. Preparations are made for a process 96 that cancels the timer interrupt schedule and reschedules the pattern generation process of the pattern generation device 10 to start immediately. Processing 95
resets the phase command PH2 in preparation for rescheduling the pulse distribution process, and finally sets a timer interrupt schedule to start the pattern generation process immediately in process 96, and ends the process.

Rescheduling, that is, synchronization, is achieved by the resetting process 95 of the phase command PHz- and the pattern generation process which is started immediately thereafter.

Next, pattern generation processing will be explained. This pattern generation process is a timer interrupt task that is activated every fixed period of time Δ. This task turns the converter element on and off every Δ, so the switching frequency of converter 2 is determined by this value, 1/Δt(
Hz).

Furthermore, if Δt is determined so that 20m5ac/Δt is an integer, and the timer interrupt is set to synchronize with the zero-crossing pulse, and if the power supply does not cause frequency fluctuations, this pattern generation process will be synchronized with the synchronization process. However, since one frequency fluctuation always occurs, it can be said that this pattern generation process is activated asynchronously with the power supply.

FIG. 4 is a schematic flowchart showing an example of the pattern generation processing of the pattern generation bag [10] shown in FIG.
Creation process of duty ratio command PU-.

Process 120 is a process for creating a comprehensive phase command θT11 performed by the comprehensive phase creating means 120, and process 130 is a process for creating a comprehensive phase command θT11 performed by the region determining means 13.
140 is the area determination processing performed by .theta.0 and 140 is the pulse distribution processing performed by the distribution device 140.

FIG. 5 is a diagram showing an example of the relationship between pattern generation processing and zero-cross pulse input, where the dotted line indicates a state in which zero-loss pulses are input in a situation where pattern generation processing is not activated, and the - dot lA line is This shows a state in which a zero-cross pulse is interrupted during pattern generation processing. In the case of the dotted line and the -dotted chain line, the pattern generation process is started starting from the input point. Strictly speaking, it starts immediately after the synchronization process ends.

Next, the processing contents will be explained in detail. As shown in FIG. 6, the process 110 in FIG. 4 is a function generation process that generates the conduction rate command PUS and the second phase command PHx* in accordance with the current deviation Δi. Phase control operates in the region β where Δi is small, and pulse width control operates in the region α where the absolute value of Δi is large. Furthermore, although the minimum conductivity PU-, □1 is set here, this value is a numerical value linked to the minimum pulse width mentioned above. This value itself is not affected by the synchronization process, so if you ensure PU''-s and ensure the minimum pulse width within the synchronization process, you can ensure the minimum pulse width without any additional circuitry.Of course. For applications where only pulse width control is required and phase control is not required, the second phase command PHx and fist are not required, and the essence of the present invention regarding synchronization is not affected.

The process 120 is a comprehensive phase creation process, the details of which are described in the seventh
In the process 121 shown in the example of the figure, the previous phase command PH1 is
The current phase command PHz is determined by adding the power frequency command ω which is multiplied by the gain to the fist. Processing 122
Then, replace the previous PH1 umbrella with the current PHx* and prepare for the first-order integral.

In process 123, a comprehensive phase command θ711 is obtained from the current first phase command PHZ* and second phase command PH2*.

Here, ω- is a power frequency command, so it is 50 Hz or 60 Hz. Note that if only pulse width control is performed without phase control, process 123 is unnecessary.

Process 130 in FIG. 4 is a process for determining in which region of 360 degrees of electrical angle a pulse should be output using the overall phase command θTll. The detailed process is shown in the flowchart of FIG. 8.

First, in process 131, the value of the comprehensive phase command θ76 is set to 3 electrical angles.
Which 60″ section of 60° is it in (Mo)
Find out. Based on this determination, which converter components should be fired continuously for a period of Δt?

An element to be shorted, a first ignition element to extinguish the shorted element and then ignite, a second ignition element to extinguish the first ignition element and then ignite, etc. The element to be turned off during the time Δ of is determined. moreover.

In process 132, 076 checks (st) which Δ of the 60° interval exists. Suppose Δt=555.
6μSee, it can be seen that there are 6 Δ sections within the 60'' section (if the power supply is 50 Hz).If you know this st, which data table should you use when searching for the extinction time? This will tell you which method to use.Although the explanation here has been given by taking as an example a method that can realize sine wave formation (unequal pulses), if equal pulses are sufficient, this process 132 is unnecessary.

Next, the pulse distribution process 140 in FIG. 4 will be explained. First, if it is known in which 60° region the comprehensive phase command 0 is in by the above-mentioned region determination process 130, then as shown in Table 1, the first order of the vanishing arc, which determines the element to be vanishing arc, is determined. All that is required is to know the time, and the conduction rate command PUS is used for this purpose. Here, the total phase command 0- is 0~
The case in the 60° section will be explained as an example. Furthermore, if the switching frequency is 1.8 kHz,
The 60° section is further composed of six stages. Here, assuming that θT* was at the first stage and the conduction rate command PUS = 0.6, by referring to the conduction rate vs. vanishing time table shown in Fig. 9, The following distribution processing contents (1) to (4) can be understood.

(1) ignition of element 25 for Δt; (2) ignition of shorting element 22 for t<tz; element 21.
23, 24, 26 turn off the element 21 while tz≦t≦tz (3) tz≦t≦tz;
22, 24, and 26 are turned off (4) element 21 is turned on while lz≦t≦Δt, and element 22 .
23, 24, and 26 are turned off.Thus, in the pulse distribution process 140, as shown in the flowchart of the pulse distribution process 140 shown in the embodiment of FIG. In step 142, the specific timing is checked, and in step 143, pulse distribution is performed by setting a schedule for the output port.

FIG. 11 is a detailed flowchart showing one embodiment of the schedule processing 143 of FIG. Here, as in the example shown in FIG. 9, the case where 00≦θth≦60' is shown. In process 1431, a schedule is made to immediately short circuit, in process 1432, a schedule is made to immediately turn off phases other than the shorted phase, in process 1433, a schedule is made to operate after tL has elapsed, and in process 1434, a schedule is made to operate after tz has elapsed.

As described above, according to this embodiment, in the power synchronization process, the minimum pulse width is ensured by software, and the schedule of pulse pattern output is canceled.

Since this is achieved by rescheduling, there is no need for an external minimum pulse width securing circuit while achieving high frequency pulse output. can.

〔Effect of the invention〕

As described above, according to the present invention, ensuring the minimum pulse width associated with the power synchronization process of the converter can be implemented in software, and therefore has the advantage that an external circuit can be omitted.

[Brief explanation of the drawing]

FIG. 1 is an overall configuration diagram showing an embodiment of the power conversion device of the present invention, FIG. 2 is a flowchart showing an embodiment of the schematic processing of the synchronization device of FIG. 4 is a flowchart showing an example of the schematic processing of the pattern generator shown in FIG. 1, FIG. 5 is a diagram showing an example of the relationship between pattern generation processing and zero-cross pulse input, and FIG.
The figure is an explanatory diagram showing a state in which a phase command PHt umbrella is created,
FIG. 7 is a flowchart showing a detailed example of the comprehensive phase creation process shown in FIG. 4, and FIG. 8 is a flowchart showing a detailed example of the area determination process shown in FIG. 4. Figure 9 shows the conduction rate vs. ignition time table, and Figure 10 shows the 4th table.
FIG. 11 is a flowchart showing an example of details of the process 143 of FIG. 10. FIG. 2... Converter, 7... Voltage detector, 8... Waveform shaping circuit, 9... Synchronization device, 10... Pattern generator. 110...Function generation means, 120...Comprehensive phase creation means, 130...Area determination means, 140...Distribution device. /Man 7-Emu Matasutaku 6th Ward 8th Figure 11

Claims (1)

[Claims] 1. A converter that converts AC power into DC, and a control one-chip microcomputer that outputs an on signal or an off signal to each control element of the converter, and outputs the on signal or off signal. is performed from a schedule port of the control one-chip microcomputer, wherein the control one-chip microcomputer schedules the on-signal or off-signal that has already been set according to a power synchronization input signal. A power conversion device characterized by having a function of performing power synchronization processing by canceling a schedule and setting a new schedule. 2. The power conversion device according to claim 1, wherein the new schedule is set after ensuring a minimum pulse width time of the control element of the converter.