JPS6364793B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in flat panel display devices, and particularly to improvements in flat panel display devices having a configuration in which active elements for selective driving corresponding to pixels are integrated and integrally combined with a display medium. It is related to.

Recently, a display unit has been proposed in which an integrated drive circuit is integrally combined with a flat matrix display device using electroluminescence (EL) or liquid crystal. The drive circuit is
It has active elements corresponding to pixels and is integrated on a single silicon wafer, and is designed to partially and selectively control the optical function of a display medium stacked above the silicon wafer. In addition, from the perspective of configuring a display unit with as large an area as possible, attempts have been made to integrate active elements corresponding to the above pixels using SOS (Silicon On Saphire) technology or thin film transistor (TFT) technology instead of silicon wafers. .

However, it is extremely difficult to increase the size of a flat matrix display device that combines the above-mentioned active elements using conventional techniques. In other words, in a configuration in which active elements corresponding to pixels are integrated using a silicon wafer, the size of the display screen is limited by the size of the wafer. From the viewpoint of yield, it is extremely difficult to form a large number of individual active elements and light emitting points without defects. Also SOS configuration and TFT
Even if a new configuration is adopted, it is difficult to form driving active elements and light emitting points in a number corresponding to the required number of pixels with a high yield, and in the end, the most important goal for this type of display device is to economically obtain a large display screen. This has become a difficult point.

In view of the above-mentioned circumstances, the present invention targets a display device having a structure in which an IC chip that integrates active elements corresponding to pixels is integrally combined with a display medium.
The purpose of this invention is to provide a new device structure that can be manufactured at high yield and at low cost. A further object of the present invention is to provide a display device with a modular structure that can easily be configured to have a large screen and is easy to maintain.

Briefly stated, the present invention consists of configuring a small-scale display module containing a plurality of pixels as a basic unit, and combining one or more of these display modules to obtain a display screen with a required area. That is. The scale of the display module is determined so that the circuit functional elements to be integrated can be easily manufactured without defects, and is preferably set to a size of, for example, about 16 x 16 pixels, which is necessary for displaying a dot matrix for one character. . In addition, the display module according to the present invention includes pixel electrodes that face the display medium and define pixels in a matrix arrangement, active elements for selective driving that individually correspond to each pixel electrode, and information that corresponds to the pattern to be displayed. It includes an IC chip that also integrates an address circuit for inputting signals in time series and distributing them to the active elements, and the connection wiring is complicated when a plurality of display modules are combined and mounted. Consideration has been taken to avoid this.

Preferred embodiments of the present invention will now be described in more detail with reference to the accompanying drawings.

FIGS. 1a and 1b are an external perspective view and a cross-sectional view schematically showing one example of the configuration of a display module that is a basic unit of a flat panel display device according to the present invention. The display module, generally designated 10, includes:
An insulating substrate 15 provided with connection pins 11, 12, 13, and 14, an IC chip 16 that integrates the necessary driving circuits, and a display medium 1 such as a liquid crystal.
7 and a cover glass 19 having a transparent electrode 18 on the lower surface. Although such a laminated structure itself is not particularly different from conventional display devices incorporating active elements of this type, the feature of the present invention is that the laminated structure is configured as a small-scale display module and has an internal address function. It has a built-in function.

As an example, the above-mentioned IC chip 16 has a size of about 5.3 mm square, which is obtained by dividing a 3-inch diameter silicon wafer 20 into 10 pieces vertically and horizontally as shown in FIG. Contains the circuit functions necessary to control the minute display. The character font in dot matrix format is 5× for alphanumeric characters.
7 dots or 7 x 9 dots are common, and 16 x 16 dots are sufficient even for kanji display, so 24 x 24 pixels are selected per chip, including the cursor display area and space between characters. It is sufficient to integrate the driving functions, and this degree of integration is relatively easy. Furthermore, according to this element configuration, instead of using one wafer as a whole, it is possible to sort out finely divided chips and use only good products, so even if there are defective chips, for example, waste can be minimized. It can be suppressed.

FIG. 3 is a diagram schematically showing an example of the configuration of a drive circuit integrated in the IC chip 16, and shows a case of a 5×7 pixel configuration. In Figure 3,
P ₁₁ , P ₁₂ . . . P ₇₅ are pixel electrodes formed insulated from each other on the above-mentioned small section silicon substrate in correspondence with a 5×7 matrix pixel arrangement, and each has an electric field as an active element for selective driving. It is connected to each drain electrode of effect transistors (FET) Q ₁₁ , Q ₁₂ ...Q ₇₅ . Each source electrode of these FETs is led out to a common source electrode terminal Vss, and each gate electrode is connected to the output of each stage of the address shift register SR via a common control gate electrode CG. In this case, the shift register SR as a register circuit has a configuration of a series of static shift registers arranged in a meandering manner between each row of pixel electrodes, and has an input terminal In for an information signal (data) on the first stage side. In addition to having an end terminal En on the final stage side, it also has a clock signal input terminal C _L.

IC chip 1 with built-in circuit functions as described above
6 can be easily manufactured using current semiconductor technology, especially MOS process technology. Then, with the parts other than the pixel electrodes P ₁₁ ...P ₇₅ covered with an insulating film, a cover glass 19 is hermetically sealed thereon via, for example, a liquid crystal layer as the display medium 17.
The display module 10 as shown in FIGS. 1a and 1b is completed. In this case, the above IC
Since only a few lead-out terminals are required from the chip 16, including the information signal input terminal, the connection work with the pins 11 to 14 is easy when mounting on the support substrate 15 for mounting.

Thus, the transparent electrode 18 on the inner surface of the cover glass 19
Then, 5×7 dot pixels using liquid crystal as a display medium are defined in the area facing each pixel electrode P ₁₁ to P ₇₅ on the IC chip 16. Therefore, the transparent electrode 18
After inputting an information signal corresponding to the character pattern to be displayed from the input terminal In of the shift register SR to the series with a predetermined driving voltage applied between the input terminal and the common source electrode terminal Vss of the IC chip 16,
If a transfer signal is given to the control gate electrode CG and the information signal set in each stage of the shift register SR is applied to each gate electrode of the corresponding FET: _Q11 to _Q75 ,
The selected FET is turned on and the corresponding pixel electrode is driven, resulting in the display of the desired character pattern.

The above has described an example of the structure of the display module that forms the main subject of the present invention, and by combining a plurality of display modules, a large-screen flat panel display device can be easily manufactured.

FIG. 4 is a perspective view schematically showing an example of the configuration of such a large-scale display device.
Display modules DM ₁₁ , DM ₁₂ ... DM ₅₆ are mounted on a common mounting board 20 to form a single module.
The display area is 30 times larger. Each display module may include, but is not limited to, one
As an example, it has the configuration as described above with reference to FIG. 1, and has a matrix pixel array that can be selected in units of one character or one block. On the mounting board 20 are connection pins 11 to 1 of each display module.
A connection hole or socket (not shown) is provided for receiving the display module DM ₁₁ to _{DM 65, and wiring for connecting and distributing the necessary signals and power is provided on the board in accordance with the mounting position of each display module DM 11 to DM 65} . The conductors are arranged in a matrix using well-known multilayer printed wiring techniques. Also, this mounting board 20
A chip select circuit, a decoder circuit (not shown), etc., for selectively driving each medium module may be mounted on the top. The connection configuration when mounting each display module on the board 20 is as follows.
Various other connection configurations other than using the connection pins described above are possible.

When using the above-mentioned module combination configuration, the mounting circuit can be simplified if the address circuit stored on the IC chip of each module is a shift register with a meandering one-line configuration as illustrated in FIG. It is convenient for In other words, by connecting the input/output terminals In and En of each shift register included in the adjacent display module in series, it becomes possible to introduce the display data signal for the entire screen from a single input terminal, and it is possible to input the display data signal for the entire screen from a single input terminal. distribution of data becomes extremely easy. However, when the display screen becomes larger and the number of display modules to be mounted increases, it is also possible to divide and connect the display data input unit line by line or block (multiple modules). In any case, since each display module has a built-in address circuit in a time-series input format, the connection work involved in mounting a large screen configuration is easy.

Thus, according to the combination of display modules as shown in FIG. 4, a display panel of any size can be obtained depending on the number of modules to be combined. Even if a partial display defect or functional deterioration occurs, the overall quality and function can be maintained by replacing only the relevant display module, making maintenance easy and economical.

The main embodiments of this invention have been described above.
However, the present invention is not limited only to these embodiments, and various other modifications and extensions are possible.

For example, the IC chips of each display module are not limited to those with the necessary circuit function elements integrated on a silicon substrate as described above, but also those with an SOS configuration using a sapphire substrate, or those using other insulating substrates. It can also be configured as a TFT configuration. Furthermore, various configurations other than the example shown in FIG. 3 are possible for the address circuit integrated with the driving active element corresponding to the pixel.

FIGS. 5a and 5b are block diagrams showing a modification of such an address circuit. In FIG. 5a, the gate electrodes of the active elements Q arranged corresponding to the pixel electrodes are connected in the row (horizontal) direction, and the source electrodes are connected in the column (vertical) direction, each forming a shift register for data input on the row side. SR1 and a shift register SR2 for column side scanning are provided. FIG. 5b also includes a shift register SR1 for serial-to-parallel conversion, and branch registers SR2 to SRn connected in parallel to each stage of the shift register SR1 and extending vertically so as to address active elements corresponding to pixel electrodes column by column. This figure shows an example of the configuration of an address circuit.

Although the specific circuit configuration of each shift register is not illustrated, it can be configured as a well-known one-phase static shift register or two-phase dynamic shift register. It is also possible to integrate it as a shift register having a charge transfer type CCD, BBD, or PCD configuration. If the shift register as an address circuit occupies a large area on an IC chip, and the size and placement space of pixel electrodes are limited, multilayer wiring technology can be used to increase the area above the circuit functional element arrangement surface. The pixel electrodes may be arranged through an insulating film.

The display medium that is laminated on top of the IC chip and sealed is
In addition to the liquid crystal shown above, EL or ECD may also be used. Further, by simple modification, a gas discharge type or fluorescent display type display device can be constructed. When constructing a fluorescent display tube type display module, each pixel electrode may be used as an anode, a phosphor coated thereon, and vacuum sealed together with a common electron-emitting filament.

Furthermore, although the display module according to the present invention functions satisfactorily as a single element, it exhibits even greater effects when a large display device is constructed by combining a plurality of modules as described above.
The implementation structure of the display module in this case is as follows:
In addition to mounting all the required number of modules on a single mounting board 20 as shown in FIG.
A configuration method is used in which a predetermined number of modules are mounted on a support board in advance to form a subunit using a similar method, and then multiple subunits are mounted on another parent board to sequentially enlarge the screen. It's good to wear. When such an intermediate unit is configured, it is convenient to configure only the IC chip in units of characters or blocks, and to assemble the display medium and cover glass structure on top of each other by laminating them in common for each subunit. be.

FIG. 6 is a partially cutaway perspective view schematically showing a display device having the above subunit structure, in which pixel electrodes, corresponding active elements, and address circuits are integrated on the subunit substrate 21 as described above. A plurality of IC chips 22 are attached, and a common display medium layer 23 and a cover glass 24 are further attached thereon.
An example is shown in which the subunit Su is configured by sealing the subunit Su. The connection wiring for each IC chip is collected on the subunit board 21, led out to a connection pin 25, and further connected to a bus bar on a parent board 26 together with a plurality of subunits. Of course, display modules and subunits can be of any size and shape, and display modules of different shapes and dimensions can be combined to form a desired display.

As can be understood from the above description, the present invention is intended to provide a large-scale flat panel display device at low cost using small-scale display modules that can be easily manufactured without any failure defects as constituent units. This, combined with the ease of mounting work achieved by incorporating an address circuit function in each display module, greatly contributes to the practical application of this type of display device.

[Brief explanation of drawings]

1A and 1B are an external perspective view and a cross-sectional view schematically showing one example of the configuration of a display module that forms the main subject of this invention, FIG. 2 is a diagram for explaining the method of configuring an IC chip, and FIG. is one of the drive circuits to be integrated.
FIG. 4 is a schematic diagram showing an example configuration; FIG. 4 is an external perspective view schematically showing an example configuration of a large-scale display device; FIGS. FIG. 6 is a partially cutaway perspective view showing another example of the configuration of the large-scale display device. 10: Display module, 11-14: Connection pin, 15: Substrate, 16: IC chip, 17: Display medium, 18: Transparent electrode, 19: Cover glass, 2
0: Silicon wafer, P ₁₁ to P ₇₅ : Pixel electrode, Q ₁₁
~Q ₇₅ : Active element for driving, SR: Shift register,
CG: control gate electrode, 21: subunit substrate,
22: IC chip, 23: display medium, 24: cover glass, 25: connection pin, 26: parent board.

Claims (1)

[Scope of Claims] 1. A flat panel display device in which a plurality of display modules 10 each having a plurality of display pixels regularly arranged vertically and horizontally are arranged in a plane to form a display screen having a required area. The display module 10 has pixel electrodes P 11 to P 75 corresponding to the display pixels arranged vertically and horizontally on a common substrate 15 facing a common display medium 17, and also has pixel electrodes P ₁₁ to _{P 75} corresponding to each pixel electrode arranged vertically and horizontally. Semiconductor active element Q ₁₁ to selectively drive those electrodes
Q ₇₅ and further includes an IC chip 16 configured to integrally integrate an address circuit SR for inputting a display signal and distributing it to each of the active elements, and comprising a plurality of display modules 10. 1. A flat panel display device comprising a mounting board 20 having a mounting surface disposed on an individual plane and having conductors formed on the mounting surface for connecting display modules adjacent to each other in series. 2 Included in the plurality of display modules 10
Each address circuit SR of the IC chip 16 consists of a shift register in which a semiconductor active element corresponding to a pixel electrode is connected to the output of each stage, and the input and output terminals of each shift register SR are arranged in series for a plurality of display modules 10. The flat panel display device according to claim 1, wherein the display device is connected. 3. The above-mentioned IC each having a plurality of pixel electrodes
A common subunit board 21 for multiple chips 22
A common display medium 23 is arranged on the IC unit and a common display medium 23 is stacked on top of the IC unit to form a subunit SU in which a plurality of display modules are integrated, and a plurality of the subunits are mounted on individual substrates 26. A flat panel display device according to claim 1, characterized in that the flat panel display device is configured as follows.