JPS6362329A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6362329A
JPS6362329A JP20818486A JP20818486A JPS6362329A JP S6362329 A JPS6362329 A JP S6362329A JP 20818486 A JP20818486 A JP 20818486A JP 20818486 A JP20818486 A JP 20818486A JP S6362329 A JPS6362329 A JP S6362329A
Authority
JP
Japan
Prior art keywords
polysilicon
oxide film
vacuumized
fluoric acid
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20818486A
Other languages
Japanese (ja)
Inventor
Tatsuro Sakai
達郎 酒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP20818486A priority Critical patent/JPS6362329A/en
Publication of JPS6362329A publication Critical patent/JPS6362329A/en
Pending legal-status Critical Current

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  • Cleaning Or Drying Semiconductors (AREA)

Abstract

PURPOSE:To prevent any defective characteristics from occuring by a method wherein semiconductor elements are cleaned up by alkali and diluted fluoric acid cleaning process and then vacuumized lamp anneal baking process is additionally performed. CONSTITUTION:Semiconductor elements are cleaned up by alkali cleaning process using mixed solution of ammonia, hydrogen peroxide and pure water to be etched using diluted fluoric acid for removing a natural oxide film and heavy metal. Furtheremore, any attached dirt is removed using diluted fluoric acid to be incinerated by anneal baking process in a vacuumized in-tube annealing device not to form an oxide film. Through these procedures, after resetting to room temperature to release the vacuumized atmosphere, an Si substrate is not oxidized enabling polysilicon to be grown later.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法に係シ、特にSiH4ガ
スを使用したポリシリコンCVD技術を用いたポリシリ
コン成長前の洗浄方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of cleaning before growing polysilicon using polysilicon CVD technology using SiH4 gas.

〔従来の技術〕[Conventional technology]

従来のポリシリコン成長前処理方法としては、アンモニ
ア・過酸化水素・純水の調合液等によるアルカリ洗浄、
硫酸過酸化水素の調合液等による酸洗浄、自然酸化膜除
去を目的とした弗酸・純水の希釈酸洗浄がある。
Conventional polysilicon growth pretreatment methods include alkaline cleaning with a mixture of ammonia, hydrogen peroxide, and pure water;
There is acid cleaning using a mixture of sulfuric acid and hydrogen peroxide, and diluted acid cleaning with hydrofluoric acid and pure water for the purpose of removing natural oxide films.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前述した従来の洗浄技術は一長一短があシ、酸洗浄の場
合、重金属汚染を除去しやすいが、液の調合比、疲労度
等の管理が必要で、更に量産的な洗浄装置として維持す
るのが難しい。アルカリ洗浄法は量産的である反面、重
金属の除去が難しく、半導体装置のシリコン(Si)基
板とポリシリコンとの界面に残シ、その後の熱処理等に
より、リーク不良等の特性不良が発生する。酸洗浄、ア
ルカリ洗浄後は、自然酸化膜が残るためにポリシリコン
成長後、不純物を拡散してもSi基板中に拡散されにく
くなる。自然酸化膜除去を目的に、弗酸と純水の希釈弗
酸にてエツチングすると、重金属が除去される反面、液
中に含まれるゴミがSi基板自体が活性化しているため
付着しやすい。ゴミが残ると、ポリシリコンの膜厚、膜
質をかえ、その後の不純物拡散にて特性不良の発生要因
となっている。
The conventional cleaning techniques mentioned above have both advantages and disadvantages. In the case of acid cleaning, it is easy to remove heavy metal contamination, but it is necessary to control the mixing ratio of the liquid, the degree of fatigue, etc., and it is difficult to maintain as a mass-produced cleaning device. difficult. Although the alkaline cleaning method is suitable for mass production, it is difficult to remove heavy metals, leaving residue at the interface between the silicon (Si) substrate and polysilicon of the semiconductor device, and subsequent heat treatment causes characteristic defects such as leakage defects. After acid cleaning and alkali cleaning, a natural oxide film remains, so that even if impurities are diffused after polysilicon growth, they are difficult to diffuse into the Si substrate. When etching is performed using hydrofluoric acid and diluted hydrofluoric acid in pure water for the purpose of removing the natural oxide film, heavy metals are removed, but dust contained in the solution tends to adhere to the Si substrate itself because it is activated. If dust remains, it changes the film thickness and quality of the polysilicon film, and becomes a factor in the occurrence of characteristic defects due to subsequent impurity diffusion.

本発明の目的は、前記問題点を解決し、良好な洗浄がで
き、特性不良が発生しないようKした半導体装置の製造
方法に関する。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems, and to relate to a method for manufacturing a semiconductor device, which allows for good cleaning and prevents the occurrence of characteristic defects.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の構成は、半導体素子上のポリシリコンの成長前
処理工程において、アンモニア・過酸化水素・純水の調
合液であるアルカリ洗浄により半導体素子を洗浄した後
、自然酸化膜の除去及び重金属除去のため純水に希釈し
た希釈弗酸忙てエツチングし、更に希釈弗酸にて付着し
たゴミを除去し、酸化膜が形成されないようにチューブ
内を真空引きしたランプアニール装置内でアニールベー
クし、ゴミを焼きとばすことを特徴とする。
The structure of the present invention is that in the pre-growth treatment process for polysilicon on a semiconductor element, after the semiconductor element is cleaned by alkaline cleaning, which is a mixture of ammonia, hydrogen peroxide, and pure water, natural oxide films are removed and heavy metals are removed. Therefore, the tube was etched using diluted hydrofluoric acid diluted with pure water, and then the attached dust was removed using diluted hydrofluoric acid, and annealing was performed in a lamp annealing device that evacuated the inside of the tube to prevent the formation of an oxide film. It is characterized by burning away garbage.

〔作用〕[Effect]

上述した従来のポリシリ成長前処理方法に対し、本発明
はポリシリコン成長前に1半導体装置の特性等に影響を
与えず、重金属汚染を少なくシ、自然酸化膜を極力おさ
え、量産性に富んだ洗浄方法を提供するものであシ、さ
らにSi基板に付着したゴミを焼きとばし、この時の熱
処理によシSi基板が酸化されることがない。
In contrast to the above-mentioned conventional polysilicon growth pretreatment method, the present invention does not affect the characteristics of semiconductor devices before polysilicon growth, reduces heavy metal contamination, minimizes natural oxide film, and is highly suitable for mass production. The present invention provides a cleaning method that burns off dust attached to the Si substrate and prevents the Si substrate from being oxidized by the heat treatment at this time.

〔実施例〕〔Example〕

次に本発明について図面を参照しながら詳細に説明する
Next, the present invention will be explained in detail with reference to the drawings.

第1図は本発明の一実施例の半導体装置の製造方法を順
に示す工程線図である。同図において、ポリシリコン前
処理は、それ以前の工程で付着した重金属及び有機的な
汚れを除去するために1アンモニア・温酸化水素・純水
の調合液によるアルカリ洗浄1を行なう。しかし、この
工程では、汚れの除去は可能なものの、重金属の除去効
果は少なく、かえってアルミニウム等の付着効果がある
FIG. 1 is a process diagram sequentially showing a method for manufacturing a semiconductor device according to an embodiment of the present invention. In the figure, polysilicon pretreatment involves performing alkaline cleaning 1 using a mixture of ammonia, warm hydrogen oxide, and pure water in order to remove heavy metals and organic dirt deposited in previous steps. However, although this process can remove dirt, it is less effective in removing heavy metals and has the effect of adhering aluminum and the like.

したがって、次の工程に重金属を除去する工程が必要で
あシ、更に自然酸化膜が20X程度形成されているため
、製品特性に影響を及ぼす。そのため、弗酸と純水との
比が1対30のように希釈弗酸にてエツチング2をする
。しかし、重金属・自然酸化膜が除去できるがSi基板
が活性化するため、エツチング・水洗中に、ゴミがSi
基板に付着してしまう。このゴミをそのまま残し、ポリ
シリコン成長すると、ポリシリコンの膜厚ムラが生じ、
更に膜質かかわって、製品特性に影響を及ぼす。し ・
たがって、ポリシリコン成長前にゴミを除去する工程が
必要とされ、自然酸化膜が形成されず、ゴミが除去でき
る工程としては、ランプアニールによるゴミの焼き飛ば
しがある。ランプアニール装置内の8i基板を入れるチ
ューブ内を真空引きし、常温から700℃程度の加熱を
し、ベーク3を行う。
Therefore, a step for removing heavy metals is required in the next step, and furthermore, a natural oxide film of about 20X is formed, which affects product characteristics. Therefore, etching 2 is performed using diluted hydrofluoric acid such that the ratio of hydrofluoric acid to pure water is 1:30. However, although heavy metals and natural oxide films can be removed, the Si substrate is activated, so dust is removed from the Si substrate during etching and water washing.
It will stick to the board. If this dust is left as it is and polysilicon is grown, unevenness in the polysilicon film thickness will occur.
Furthermore, film quality is involved, which affects product characteristics. death ·
Therefore, a process for removing dust is required before polysilicon growth, and a process that can remove dust without forming a natural oxide film is burning off dust by lamp annealing. The inside of the tube into which the 8i substrate is placed in the lamp annealing device is evacuated, heated from room temperature to about 700° C., and Bake 3 is performed.

常温に戻して、真空を解除すれば、Si基板は酸化され
ない。その後、ポリシリ成長4を行う。
If the temperature is returned to room temperature and the vacuum is released, the Si substrate will not be oxidized. After that, polysilicon growth 4 is performed.

〔発明の効果〕〔Effect of the invention〕

以上説明したように1本発明によれば、アルカリ洗浄、
希釈弗酸洗浄の後、真空によるランプアニールベークを
付加することにより、量産性に優れ、製品特性向上問題
を生じないという効果が得られる。
As explained above, according to the present invention, alkaline cleaning,
By adding a vacuum lamp annealing bake after cleaning with diluted hydrofluoric acid, it is possible to achieve excellent mass productivity and avoid problems in improving product characteristics.

前記実施例では、ポリシリコンと限定したが、この他に
不純物をドープしたポリシリコンにも適用でき、更に8
i基板上に成長する酸化膜成長、窒化膜成長等にも同様
に適用できる。
In the above embodiments, polysilicon is used, but it can also be applied to polysilicon doped with impurities.
The present invention can be similarly applied to oxide film growth, nitride film growth, etc. grown on an i-substrate.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の半導体装置の製造方法を示
す工程線図である。 1・・・・・・アルカリ洗浄工程、2・・・・・・希釈
弗酸エツチング工程、3・・・・・・ベーク工程、4・
・・・・・ポリシリコン成長工程。 ゝ;fう′
FIG. 1 is a process diagram showing a method for manufacturing a semiconductor device according to an embodiment of the present invention. 1... Alkaline cleaning step, 2... Diluted hydrofluoric acid etching step, 3... Baking step, 4.
...Polysilicon growth process.ゝ;fー′

Claims (1)

【特許請求の範囲】[Claims] 半導体素子上のポリシリコンの成長前処理を行う半導体
の製造方法において、前記半導体素子をアンモニア・過
酸化水素・純水の調合液のアルカリ洗浄後、希釈弗酸に
よって自然酸化膜を除去し、更に真空引きしたチューブ
内でランプアニールを用いたベークをすることを特徴と
する半導体装置の製造方法。
In a semiconductor manufacturing method that performs a pre-growth treatment for polysilicon on a semiconductor element, the semiconductor element is washed with an alkali solution of ammonia, hydrogen peroxide, and pure water, and then the native oxide film is removed with diluted hydrofluoric acid, and A method for manufacturing a semiconductor device, characterized by baking using lamp annealing in a vacuumed tube.
JP20818486A 1986-09-03 1986-09-03 Manufacture of semiconductor device Pending JPS6362329A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20818486A JPS6362329A (en) 1986-09-03 1986-09-03 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20818486A JPS6362329A (en) 1986-09-03 1986-09-03 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6362329A true JPS6362329A (en) 1988-03-18

Family

ID=16552052

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20818486A Pending JPS6362329A (en) 1986-09-03 1986-09-03 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6362329A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5098866A (en) * 1988-12-27 1992-03-24 Texas Instruments Incorporated Method for reducing hot-electron-induced degradation of device characteristics
US5281544A (en) * 1990-07-23 1994-01-25 Seiko Epson Corporation Method of manufacturing planar type polar transistors and combination bipolar/MIS type transistors
US5404043A (en) * 1990-07-23 1995-04-04 Seiko Epson Corporation Semiconductor devices of the planar type bipolar transistors and combination bipolar/MIS type transistors

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5098866A (en) * 1988-12-27 1992-03-24 Texas Instruments Incorporated Method for reducing hot-electron-induced degradation of device characteristics
US5281544A (en) * 1990-07-23 1994-01-25 Seiko Epson Corporation Method of manufacturing planar type polar transistors and combination bipolar/MIS type transistors
US5404043A (en) * 1990-07-23 1995-04-04 Seiko Epson Corporation Semiconductor devices of the planar type bipolar transistors and combination bipolar/MIS type transistors

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