JPS6359276A - Shadow circuit - Google Patents

Shadow circuit

Info

Publication number
JPS6359276A
JPS6359276A JP20305386A JP20305386A JPS6359276A JP S6359276 A JPS6359276 A JP S6359276A JP 20305386 A JP20305386 A JP 20305386A JP 20305386 A JP20305386 A JP 20305386A JP S6359276 A JPS6359276 A JP S6359276A
Authority
JP
Japan
Prior art keywords
signal
shadow
control signal
video
signal generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20305386A
Other languages
Japanese (ja)
Inventor
Toshiharu Yamashita
山下　敏治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP20305386A priority Critical patent/JPS6359276A/en
Publication of JPS6359276A publication Critical patent/JPS6359276A/en
Pending legal-status Critical Current

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  • Studio Circuits (AREA)

Abstract

PURPOSE:To make a shadow signal generator unnecessary, and to simplify a circuit, by obtaining a control signal by using a signal generated by a video key signal generator, and the signal in which the above signal is delayed. CONSTITUTION:A selector (a) selects either one out of three signals, a video signal V, a background signal BG, and a shadow signal SH. A selecting control signal has two bits, and the video key signal generated from the video key signal generator (b) is inputted to a control signal generator (d) as it is, as the signal delayed by a delay line (c), and the control signal of two bits is outputted. The selector (a) is controlled by the control signal, and the delay line (c) performs the delaying of a video in a horizontal and a vertical directions. By varying a delayed quantity, it is possible to change the position of a shadow, and to realize the control signal generator (d) with a simplified logic circuit.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はスタジオ装置に関し、特にディジタルビデオ効
実装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to studio equipment, and more particularly to digital video effects equipment.

〔従来の技術〕[Conventional technology]

従来、この種のディジタルビデオ効実装置におけるシャ
ドー回路はビデオのキー信号とシャドーのキー信号とを
個別に発生させて、信号を選択することにより、シャド
ー（影）を得ていた。第２図に従来のシャドー回路を示
す、ａはビデオ信号Ｖとバックグラウンド信号ＢＧとを
選択する選択器であり、選択信号としてビデオキー信号
発生器すにより発生したキー信号を用いる。このキー信
号はビデオ信号の位置に対応しており、第３図に示すよ
うにビデオ信号Ｍ以外の領域にバックグラウンド信号Ｂ
Ｃが組合される。この信号はさらに選択器Ｃに入り、シ
ャドー信号ＳＨが選択される。Conventionally, the shadow circuit in this type of digital video effect device generates a video key signal and a shadow key signal separately, and selects the signal to obtain a shadow. FIG. 2 shows a conventional shadow circuit. A is a selector that selects between a video signal V and a background signal BG, and uses a key signal generated by a video key signal generator as a selection signal. This key signal corresponds to the position of the video signal, and as shown in FIG.
C is combined. This signal further enters the selector C, and the shadow signal SH is selected.

この選択にはシャドー信号発生器ｄからの信号が使われ
る。シャドー信号はビデオ信号に付けるシャドーの位置
に対応しており、第４図に示すように、シャドー信号Ｓ
Ｈが組合される。A signal from the shadow signal generator d is used for this selection. The shadow signal corresponds to the position of the shadow added to the video signal, and as shown in Figure 4, the shadow signal S
H is combined.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来のシャドー回路はビデオキー信号発生器と
シャドー信号発生器との双方を備える構成になっている
ので、回路が複雑になる欠点がある。Since the conventional shadow circuit described above has a configuration including both a video key signal generator and a shadow signal generator, it has the disadvantage that the circuit becomes complicated.

本発明の目的は回路構成を簡素化したシャドー回路を提
供することにある。An object of the present invention is to provide a shadow circuit with a simplified circuit configuration.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は少なくとも２ビットのコントロール信号により
少なくとも３つの異なる信号から１つの信号を選択する
選択器と、１ビットコントロール信号と該コントロール
信号をディレーラインにより遅延させた信号とを入力と
し、前記選択器をコントロールする２ビットの信号を出
力する回路とを有することを特徴とするシャドー回路で
ある。The present invention includes a selector that selects one signal from at least three different signals using at least a 2-bit control signal; a 1-bit control signal and a signal obtained by delaying the control signal by a delay line; This is a shadow circuit characterized in that it has a circuit that outputs a 2-bit signal for controlling.

［実施例〕 次に本発明の一実施例について図面を参照して説明する
。[Example] Next, an example of the present invention will be described with reference to the drawings.

第１図は本発明の一実施例を示すものであり、第１図に
おいて、ａはビデオ信号Ｖ、バックグラウンド信号ＢＧ
、シャドー信号ＳＨの３つの信号のうちから１つの信号
を選択する選択器である。FIG. 1 shows an embodiment of the present invention. In FIG. 1, a represents a video signal V and a background signal BG.
, a selector that selects one signal from among the three signals of the shadow signal SH.

選択用コントロール信号は２ビットある。ビデオキー信
号発生器すから発生したビデオキー信号はそのままの信
号とディレーラインＣにより遅延された信号としてコン
トロール信号発生器ｄに入力され、２ビットのコントロ
ール信号が出力される。The selection control signal has 2 bits. The video key signal generated by the video key signal generator 1 is input to the control signal generator d as an intact signal and a signal delayed by the delay line C, and a 2-bit control signal is output.

このコントロール信号により選択器ａがコントロールさ
れる。ディレーラインＣはビデオの水平方向及び垂直方
向の遅延を行う。遅延量を変化させることにより、シャ
ドーの位置を変えることができる。コントロール信号発
生器ｄは簡単な論理回路で実現することができる。This control signal controls selector a. Delay line C provides horizontal and vertical video delay. By changing the amount of delay, the position of the shadow can be changed. The control signal generator d can be realized with a simple logic circuit.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明はビデオキー信号発生器によ
って発生した信号とこの信号を遅延させた信号を用いて
コントロール信号を得ることによりシャドー信号発生器
が不要になり、回路を簡単にすることができるという効
果がある。As explained above, the present invention obviates the need for a shadow signal generator and simplifies the circuit by obtaining a control signal using a signal generated by a video key signal generator and a signal obtained by delaying this signal. There is an effect that it can be done.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の一実施例を示す構成図、第２図は従来
例を示す構成図、第３図は従来例のビデオとバックグラ
ウンドの関係を示す図、第４図は従来例のビデオとシャ
ドーとバックグラウンドの関係を示す図である。 ａは選択器、ｂはビデオキー信号発生器、Ｃは水平及び
垂直方向のディレーライン、ｄはコントロール信号発生
器である。 第　　１　　図 第　　２　　図Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a block diagram showing a conventional example, Fig. 3 is a diagram showing the relationship between video and background in the conventional example, and Fig. 4 is a block diagram showing the conventional example. FIG. 3 is a diagram showing the relationship between a video, a shadow, and a background. a is a selector, b is a video key signal generator, C is a horizontal and vertical delay line, and d is a control signal generator. Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] （１）少なくとも２ビットのコントロール信号により少
なくとも３つの異なる信号から１つの信号を選択する選
択器と、１ビットコントロール信号と該コントロール信
号をディレーラインにより遅延させた信号とを入力とし
、前記選択器をコントロールする２ビットの信号を出力
する回路とを有することを特徴とするシャドー回路。(1) A selector that selects one signal from at least three different signals using at least a 2-bit control signal, and a 1-bit control signal and a signal obtained by delaying the control signal by a delay line as input, and the selector A shadow circuit characterized by having a circuit that outputs a 2-bit signal for controlling.
JP20305386A 1986-08-29 1986-08-29 Shadow circuit Pending JPS6359276A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20305386A JPS6359276A (en) 1986-08-29 1986-08-29 Shadow circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20305386A JPS6359276A (en) 1986-08-29 1986-08-29 Shadow circuit

Publications (1)

Publication Number Publication Date
JPS6359276A true JPS6359276A (en) 1988-03-15

Family

ID=16467562

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20305386A Pending JPS6359276A (en) 1986-08-29 1986-08-29 Shadow circuit

Country Status (1)

Country Link
JP (1) JPS6359276A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998046011A1 (en) * 1997-04-10 1998-10-15 Sony Corporation Special effect apparatus and special effect method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998046011A1 (en) * 1997-04-10 1998-10-15 Sony Corporation Special effect apparatus and special effect method
GB2329312A (en) * 1997-04-10 1999-03-17 Sony Corp Special effect apparatus and special effect method

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