JPS635778U - - Google Patents

Info

Publication number
JPS635778U
JPS635778U JP9916586U JP9916586U JPS635778U JP S635778 U JPS635778 U JP S635778U JP 9916586 U JP9916586 U JP 9916586U JP 9916586 U JP9916586 U JP 9916586U JP S635778 U JPS635778 U JP S635778U
Authority
JP
Japan
Prior art keywords
signal
screen display
circuit
horizontal synchronization
synchronization signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9916586U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9916586U priority Critical patent/JPS635778U/ja
Publication of JPS635778U publication Critical patent/JPS635778U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の画面表示回路の一実施例を示
すブロツク図、第2図は第1図の水平同期信号の
振分け回路の一例を示す回路図、第3図は第1図
の回路動作を説明するためのタイミングチヤート
、第4図は第3図のタイミングチヤートに対応し
た画面表示例を示す説明図、第5図は従来の画面
表示回路のブロツク図、第6図は第5図の回路動
作を説明するタイミングチヤート、第7図は第6
図のタイミングチヤートに対応した画面表示例を
示す説明図、第8図は第5図の回路で31.5K
Hzの水平同期信号を使用してノンインターレー
ス表示したときのタイミングチヤート、第9図は
第8図のタイミングチヤートに対応した画面表示
例を示す説明図である。 11……水平同期信号の振分け回路、12,1
3……文字発生回路、14……クロツク発生回路
、15……制御回路、16……ミキシング回路、
17……文字重畳回路、18……CRT。
Fig. 1 is a block diagram showing one embodiment of the screen display circuit of the present invention, Fig. 2 is a circuit diagram showing an example of the horizontal synchronization signal distribution circuit of Fig. 1, and Fig. 3 is the circuit operation of Fig. 1. 4 is an explanatory diagram showing a screen display example corresponding to the timing chart in FIG. 3, FIG. 5 is a block diagram of a conventional screen display circuit, and FIG. 6 is a diagram showing a screen display example corresponding to the timing chart in FIG. Timing chart explaining circuit operation, Fig. 7 is Fig. 6
An explanatory diagram showing an example of a screen display corresponding to the timing chart in the figure.
FIG. 9 is an explanatory diagram showing an example of a screen display corresponding to the timing chart of FIG. 8, which is a timing chart when non-interlaced display is performed using a horizontal synchronizing signal of Hz. 11...Horizontal synchronization signal distribution circuit, 12,1
3...Character generation circuit, 14...Clock generation circuit, 15...Control circuit, 16...Mixing circuit,
17...Character superimposition circuit, 18...CRT.

Claims (1)

【実用新案登録請求の範囲】 水平走査周波数が31.5KHzのテレビジヨ
ン信号が供給されて陰極線管上に画像表示を行な
う画面表示回路であつて、 前記テレビジヨン信号に含まれる31.5KH
zの水平同期信号を1周期毎に交互に振り分けて
15.74KHzの第1、第2の水平同期信号を
出力するための水平同期信号の振分け回路と、 この振分け回路からの第1の水平同期信号と前
記テレビジヨン信号に含まれる垂直同期信号を基
準にし、文字、図形の画面表示用信号を発生する
第1の画面表示信号発生回路と、 前記振分け回路からの第2の水平同期信号と前
記垂直同期信号を基準にし、文字、図形の画面表
示用信号を発生する第2の画面表示用信号発生回
路と、 前記第1、第2の画面表示用信号発生回路から
の画面表示用信号を前記テレビジヨン信号に含ま
れる画像信号に加えて陰極線管に出力するための
回路とを具備したことを特徴とする画面表示回路
[Claims for Utility Model Registration] A screen display circuit that displays an image on a cathode ray tube by being supplied with a television signal having a horizontal scanning frequency of 31.5 KHz, comprising: 31.5 KHz included in the television signal;
A horizontal synchronization signal distribution circuit for alternately distributing the horizontal synchronization signal of z every cycle and outputting the first and second horizontal synchronization signals of 15.74 KHz, and the first horizontal synchronization signal from this distribution circuit. a first screen display signal generation circuit that generates a screen display signal for characters and graphics based on the vertical synchronization signal included in the television signal and the television signal; a second horizontal synchronization signal from the distribution circuit; a second screen display signal generation circuit that generates screen display signals for characters and graphics based on the vertical synchronization signal; and a screen display signal generation circuit that generates screen display signals from the first and second screen display signal generation circuits. A screen display circuit comprising a circuit for outputting an image signal included in a television signal to a cathode ray tube in addition to an image signal included in a television signal.
JP9916586U 1986-06-30 1986-06-30 Pending JPS635778U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9916586U JPS635778U (en) 1986-06-30 1986-06-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9916586U JPS635778U (en) 1986-06-30 1986-06-30

Publications (1)

Publication Number Publication Date
JPS635778U true JPS635778U (en) 1988-01-14

Family

ID=30967794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9916586U Pending JPS635778U (en) 1986-06-30 1986-06-30

Country Status (1)

Country Link
JP (1) JPS635778U (en)

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