JPS635652U - - Google Patents

Info

Publication number
JPS635652U
JPS635652U JP1986098757U JP9875786U JPS635652U JP S635652 U JPS635652 U JP S635652U JP 1986098757 U JP1986098757 U JP 1986098757U JP 9875786 U JP9875786 U JP 9875786U JP S635652 U JPS635652 U JP S635652U
Authority
JP
Japan
Prior art keywords
solid
insulating base
image sensor
state image
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986098757U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986098757U priority Critical patent/JPS635652U/ja
Publication of JPS635652U publication Critical patent/JPS635652U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
JP1986098757U 1986-06-26 1986-06-26 Pending JPS635652U (enFirst)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986098757U JPS635652U (enFirst) 1986-06-26 1986-06-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986098757U JPS635652U (enFirst) 1986-06-26 1986-06-26

Publications (1)

Publication Number Publication Date
JPS635652U true JPS635652U (enFirst) 1988-01-14

Family

ID=30967011

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986098757U Pending JPS635652U (enFirst) 1986-06-26 1986-06-26

Country Status (1)

Country Link
JP (1) JPS635652U (enFirst)

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