JPS635653U - - Google Patents

Info

Publication number
JPS635653U
JPS635653U JP1986099401U JP9940186U JPS635653U JP S635653 U JPS635653 U JP S635653U JP 1986099401 U JP1986099401 U JP 1986099401U JP 9940186 U JP9940186 U JP 9940186U JP S635653 U JPS635653 U JP S635653U
Authority
JP
Japan
Prior art keywords
solid
imaging device
state imaging
insulating base
attached
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986099401U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986099401U priority Critical patent/JPS635653U/ja
Publication of JPS635653U publication Critical patent/JPS635653U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
JP1986099401U 1986-06-27 1986-06-27 Pending JPS635653U (enFirst)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986099401U JPS635653U (enFirst) 1986-06-27 1986-06-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986099401U JPS635653U (enFirst) 1986-06-27 1986-06-27

Publications (1)

Publication Number Publication Date
JPS635653U true JPS635653U (enFirst) 1988-01-14

Family

ID=30968245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986099401U Pending JPS635653U (enFirst) 1986-06-27 1986-06-27

Country Status (1)

Country Link
JP (1) JPS635653U (enFirst)

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