JPS6355231B2 - - Google Patents

Info

Publication number
JPS6355231B2
JPS6355231B2 JP17097983A JP17097983A JPS6355231B2 JP S6355231 B2 JPS6355231 B2 JP S6355231B2 JP 17097983 A JP17097983 A JP 17097983A JP 17097983 A JP17097983 A JP 17097983A JP S6355231 B2 JPS6355231 B2 JP S6355231B2
Authority
JP
Japan
Prior art keywords
layer
grown
groove
plane
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP17097983A
Other languages
Japanese (ja)
Other versions
JPS6062181A (en
Inventor
Koichi Imanaka
Hideaki Horikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP17097983A priority Critical patent/JPS6062181A/en
Publication of JPS6062181A publication Critical patent/JPS6062181A/en
Publication of JPS6355231B2 publication Critical patent/JPS6355231B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/2205Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/223Buried stripe structure
    • H01S5/2232Buried stripe structure with inner confining structure between the active layer and the lower electrode
    • H01S5/2234Buried stripe structure with inner confining structure between the active layer and the lower electrode having a structured substrate surface

Landscapes

  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】 (発明の技術分野) 本発明は基本横モード発振する半導体発光素子
の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a method for manufacturing a semiconductor light emitting device that oscillates in a fundamental transverse mode.

(従来技術の説明) 先ず、本発明に説明に入る前に、従来の半導体
発光素子の一例である電流狭窄層を有し基本横モ
ード発振する半導体レーザの製造方法につき第1
図A及びBを参照して説明する。
(Description of the Prior Art) First, before entering into the description of the present invention, we will first explain the first method of manufacturing a semiconductor laser that has a current confinement layer and oscillates in a fundamental transverse mode, which is an example of a conventional semiconductor light emitting device.
This will be explained with reference to Figures A and B.

従来においては、第1図Aに示すように、基板
表面が(100)面であるn−InP基板1を用意し、
この基板1を液相エピタキシヤル成長炉に入れ、
この基板1の上側表面1a上に電流狭窄層となる
べきp−InP層2を液相エピタキシヤル成長させ
る。次ぎに、一旦この基板1を成長炉から取り出
して、この層2上に、エツチングマスク用の、例
えば、SiO2などの被着して通常のフオトリソグ
ラフイ方法により、<011>方向に延在するストラ
イプ窓を開け、この層2から基板1に達する断面
ほぼV字状のストライプ状の溝3をエツチング形
成する。次ぎに、再度、電流狭窄層2を有するこ
の溝付き基板1を成長炉に入れて、第1図Bに示
すように、この基板1の溝3が形成されている側
に第一クラツド層であるn−InP層4を成長さ
せ、続いて活性層であるInGaAsP層5を溝に対
応する部分においては溝方向に下方に湾曲させ
て、成長させ、次に第二クラツド層であるp−
InP層6を成長させる。次いで、最終的に基板1
の下側面1b及び第二クラツド層6上に夫々電極
7及び8を形成するように成している。
Conventionally, as shown in FIG. 1A, an n-InP substrate 1 having a (100) surface is prepared,
This substrate 1 is placed in a liquid phase epitaxial growth furnace,
A p-InP layer 2 to become a current confinement layer is grown on the upper surface 1a of this substrate 1 by liquid phase epitaxial growth. Next, the substrate 1 is temporarily taken out of the growth furnace, and a layer 2 for an etching mask, such as SiO 2 , is deposited and extended in the <011> direction by a normal photolithography method. A stripe window is opened, and a stripe-shaped groove 3 having a substantially V-shaped cross section is formed by etching from this layer 2 to the substrate 1. Next, this grooved substrate 1 having the current confinement layer 2 is placed in the growth furnace again, and as shown in FIG. A certain n-InP layer 4 is grown, then an active layer InGaAsP layer 5 is grown with the portion corresponding to the groove being curved downward in the direction of the groove, and then a second cladding layer 5 is grown.
Grow InP layer 6. Then, finally the substrate 1
Electrodes 7 and 8 are formed on the lower surface 1b and the second cladding layer 6, respectively.

しかしながら、この従来の製造方法によれば、
活性層の湾曲形状が基本横モード発振のための重
要な因子となるが、この活性層の形状の制御が困
難であつた。
However, according to this conventional manufacturing method,
Although the curved shape of the active layer is an important factor for fundamental transverse mode oscillation, it has been difficult to control the shape of the active layer.

さらに、この方法では、基板1を成長炉に入れ
て電流狭窄層2を成長させ、然る後、この基板を
溝形成のために一旦成長炉から取り出し、その後
再び溝付き基板を成長炉に入れて第一クラツド層
4以下の液相エピタキシヤル成長を行うため、独
立した二回のエピタキシヤル成長工程が必要と成
り、従つて、製造工程が複雑で、時間が掛り、原
料の損失が多く、しかも、製造歩留が悪いという
欠点があつた。
Further, in this method, the substrate 1 is placed in a growth furnace to grow the current confinement layer 2, and then this substrate is temporarily taken out of the growth furnace to form grooves, and then the grooved substrate is placed in the growth furnace again. In order to carry out liquid phase epitaxial growth of the first cladding layer 4 and below, two independent epitaxial growth steps are required, and therefore the manufacturing process is complicated and time consuming, and there is a lot of loss of raw materials. Moreover, there was a drawback that the manufacturing yield was low.

さらに、素子部材を成長炉に出し入れするた
め、基板表面をはじめ各層の界面が熱ダメージを
受けクリーンな状態に保持することが出来なかつ
た。
Furthermore, since element members are taken in and out of the growth furnace, the surfaces of the substrates and the interfaces between the various layers are thermally damaged and cannot be maintained in a clean state.

(発明の目的) 本発明の目的は、このような従来の欠点を除去
するため、一回の連続した液相エピタキシヤル成
長を用いて、低しきい値電流でかつ特に活性層を
湾曲させる必要なくして基本横モード発振し得る
半導体発光素子を製造出来るようにした半導体発
光素子の製造方法を提供するにある。
OBJECTS OF THE INVENTION It is an object of the present invention to eliminate these conventional drawbacks by using a single continuous liquid phase epitaxial growth process with a low threshold current and in particular the need to curve the active layer. It is an object of the present invention to provide a method for manufacturing a semiconductor light emitting device, which can manufacture a semiconductor light emitting device capable of oscillating in a fundamental transverse mode without the use of a semiconductor light emitting device.

(発明の構成) この目的の達成を図るため、本発明によれば、
InP基板の(100)面から(111)A面を側面とす
る溝を形成する工程と、この(100)面と(111)
A面とに対するInPの結晶成長速度の面方位依存
性を利用して溝外の基板表面上に電流狭窄層を成
長させ、さらに、InGaAsPの光吸収層をこの電
流狭窄層上に成長させると共に、溝内では凹状に
下方に湾曲した層として成長させ、さらに、第一
クラツド層を溝の部分の光吸収層上では厚つくか
つ溝外の光吸収層上では薄く成長させ、さらに第
一クラツド層上にInGaAsPの活性層を成長させ、
さらに、この活性層上に第二クラツド層を成長さ
せるという一回の液相エピタキシヤル成長工程と
を含むことを特徴とする。
(Structure of the Invention) In order to achieve this object, according to the present invention,
The process of forming a groove from the (100) plane of the InP substrate with the (111) A plane as the side surface, and the process of forming a groove between the (100) plane and the (111)
A current confinement layer is grown on the surface of the substrate outside the trench by utilizing the plane orientation dependence of the crystal growth rate of InP with respect to the A-plane, and a light absorption layer of InGaAsP is grown on this current confinement layer. The first cladding layer is grown as a concave downwardly curved layer within the groove, and the first cladding layer is grown thicker on the light absorption layer in the groove portion and thinner on the light absorption layer outside the groove. Grow an active layer of InGaAsP on top,
Furthermore, it is characterized in that it includes a single liquid phase epitaxial growth step of growing a second cladding layer on this active layer.

(実施例の説明) 以下第2図A〜J及び第3図に従つて本発明の
半導体発光素子の製造方法の一実施例を半導体レ
ーザにつき説明する。
(Description of Embodiments) An embodiment of the method for manufacturing a semiconductor light emitting device of the present invention will be described below with reference to FIGS. 2A to 3.

第2図A〜Jは半導体レーザの製造段階での状
態をレーザ素子の劈開面またはこの劈開面と平行
な面での断面で夫々示す製造工程図であり、各構
成成分の寸法、形状などは本発明の構成が解る程
度に概略的に示してあるにすぎない。また、図
中、断面を表わすハツチングを省略して示してあ
る。
Figures 2A to 2J are manufacturing process diagrams showing the state of the semiconductor laser at the manufacturing stage, respectively, as a cross section taken at the cleavage plane of the laser element or a plane parallel to the cleavage plane, and the dimensions, shapes, etc. of each component are shown. The drawings are merely shown schematically to the extent that the structure of the present invention can be understood. In addition, hatching representing a cross section is omitted in the drawings.

先ず、第2図Aに示すように、n−InP基板1
1を用意する。この基板11の上側表面11aを
(100)面とする。次ぎに、第2図Bに示すよう
に、基板表面11a上に、エツチングマスク層と
して供する、例えば、SiO2等のような層12を
形成する。次いで、第2図Cに示すように、この
エツチングマスク層12に通常のフオトリソグラ
フイ手法によつて、ストライプ窓13を<011>
方向に延在するように開ける。この窓13を介し
て、基板11の露出した表面11aをエツチング
する。このエツチングによつて、第2図D及び第
3図の斜視図に示すように、凹型の溝14を形成
する。この溝の幅wは基本横モードで発振させる
ことを考慮して、約2μm以下とする。この溝の傾
斜側面14aは(111)A面と成り、この溝14
の断面形状は図示のようなほぼ底面14bが平で
あつてもよいし、また、やや盛上つた状態となつ
ていてもよいし、他の形をしていても良い。いず
れにしても、この底面14bの幅はInPが成長し
ない程度の幅に押えておく必要がある。
First, as shown in FIG. 2A, an n-InP substrate 1 is
Prepare 1. The upper surface 11a of this substrate 11 is a (100) plane. Next, as shown in FIG. 2B, a layer 12 of, for example, SiO 2 is formed on the substrate surface 11a to serve as an etching mask layer. Next, as shown in FIG. 2C, a stripe window 13 is formed on the etching mask layer 12 using a conventional photolithography method.
Open it so that it extends in the direction. The exposed surface 11a of the substrate 11 is etched through this window 13. By this etching, a concave groove 14 is formed, as shown in the perspective views of FIGS. 2D and 3. The width w of this groove is set to approximately 2 μm or less in consideration of oscillation in the fundamental transverse mode. The inclined side surface 14a of this groove becomes a (111)A surface, and this groove 14
The cross-sectional shape of the bottom surface 14b may be flat as shown in the figure, or may be slightly raised, or may have other shapes. In any case, the width of the bottom surface 14b must be kept to a width that will not allow InP to grow.

次ぎに、この溝14が形成された基板11を液
相エピタキシヤル成長炉に入れ、第2図E〜Iに
示すように、電流狭窄層となるべきp−InP層1
5(第2図E)、光吸収層であるn−InGaAsP層
16(第2図F)、第一クラツド層であるn−
InP層17(第2図G)、活性層であるInGaAsP
層18(第2図H)及び第二クラツド層であるp
−InP層19(第2図I)を一回の液相エピタキ
シヤル成長で順次に連続成長させる。
Next, the substrate 11 with the groove 14 formed thereon is placed in a liquid phase epitaxial growth furnace, and as shown in FIGS.
5 (FIG. 2E), an n-InGaAsP layer 16 (FIG. 2F) that is a light absorption layer, and an n-InGaAsP layer 16 that is a first cladding layer.
InP layer 17 (Figure 2G), InGaAsP active layer
layer 18 (FIG. 2H) and the second cladding layer p
- The InP layer 19 (FIG. 2I) is successively grown in one liquid phase epitaxial growth.

この連続エピタキシヤル成長の際、p−InP層
15は結晶成長速度の面方向依存性により基板1
1の表面である(100)面上での成長速度が速く、
溝14内、すなわち、(111)A面の側面14a上
での成長速度が著しく遅いので、成長時間を選定
することにより、第2図Eに示すように、実質的
に基板11の溝14外の平担な表面11a上にの
みp−InPを成長させることができる。この電流
狭窄層15の厚さd1を1μm以上とする。続いてこ
のp−InP層15及び溝14上に成長させるn−
InGaAsPの光吸収層16はInPのような強い面方
位依存性は無く、むしろ凹凸を無くすように、す
なわち、溝14を埋めるように成長する。従つ
て、長時間成長させると、成長表面は平担となる
が、そうならない程度で成長を停止させて、第2
図Fに示すように、溝14の部分では、この層1
6の表面が溝内に向けて下方に湾曲して凹所を形
成しかつ溝外では平担となるように、この層16
を成長させる。この光吸収層16の溝外の厚さ
d2は0.3μm程度あれば充分である。ここで、この
InGaAsPのエネルギーギヤツプは活性層のエネ
ルギーギヤツプよりも小さく取る。
During this continuous epitaxial growth, the p-InP layer 15 grows on the substrate 1 due to the in-plane direction dependence of the crystal growth rate.
The growth rate on the (100) plane, which is the surface of 1, is fast;
Since the growth rate inside the groove 14, that is, on the side surface 14a of the (111) A plane, is extremely slow, by selecting the growth time, as shown in FIG. p-InP can be grown only on the flat surface 11a. The thickness d1 of this current confinement layer 15 is set to 1 μm or more. Subsequently, n- is grown on this p-InP layer 15 and groove 14.
The light absorption layer 16 of InGaAsP does not have strong surface orientation dependence like InP, but rather grows to eliminate unevenness, that is, to fill the grooves 14. Therefore, when grown for a long time, the growth surface becomes flat, but the growth is stopped to the extent that this does not occur, and the second layer is grown.
As shown in FIG.
This layer 16 is formed such that the surface of layer 16 curves downward into the groove to form a recess and is flat outside the groove.
grow. Thickness of this light absorption layer 16 outside the groove
It is sufficient for d2 to be about 0.3 μm. Here, this
The energy gap of InGaAsP should be smaller than that of the active layer.

この溝14内に成長した光吸収層16の傾斜し
た面は最早(111)A面でなく、これがため、続
いて、このn−InGaAsP光吸収層16上にn−
InP第一クラツド層17を成長させると、第2図
Gに示すように、このクラツド層17は溝14の
内部にも良好に成長する。この場合、このクラツ
ド層17の溝の中心付近での厚さd3を1μm以上と
し、溝外の平担部では厚さd4を例えば0.5μm以下
のように充分薄く成長させる。このような成長は
基板11に掘る溝14の深さ、電流狭窄層15の
厚み、光吸収層16の厚み等を調整することで容
易に制御出来る。
The inclined plane of the light absorption layer 16 grown in this groove 14 is no longer a (111)A plane, so that the n-InGaAsP light absorption layer 16 is subsequently grown on the n-
When the InP first cladding layer 17 is grown, this cladding layer 17 also grows well inside the groove 14, as shown in FIG. 2G. In this case, the thickness d3 of the cladding layer 17 near the center of the groove is set to be 1 μm or more, and the thickness d4 of the flat portion outside the groove is made sufficiently thin, for example, 0.5 μm or less. Such growth can be easily controlled by adjusting the depth of the groove 14 dug in the substrate 11, the thickness of the current confinement layer 15, the thickness of the light absorption layer 16, etc.

続いて、第2図Hに示すように、InGaAsP活
性層18を成長させる。この活性層18の厚さを
0.2μm以下とする。この活性層18の幾何学的形
状は、第一クラツド層17を成長させた時点で、
この層17が溝14の中央部分で凹状となつてい
れば、レンズ状となり、また、この層17が平担
状となつていれば、平担となる。いずれの場合で
も、溝14の中央部分に対応する活性層18の部
分の厚みd5が0.2μm以下となつているならば活性
層の形状は問わない。尚、この活性層18の上側
の面は平担にするのが好適である。
Subsequently, as shown in FIG. 2H, an InGaAsP active layer 18 is grown. The thickness of this active layer 18 is
It should be 0.2μm or less. The geometry of this active layer 18 is such that when the first cladding layer 17 is grown,
If this layer 17 has a concave shape at the center of the groove 14, it will have a lens shape, and if this layer 17 has a flat shape, it will have a flat shape. In any case, the shape of the active layer does not matter as long as the thickness d5 of the portion of the active layer 18 corresponding to the central portion of the groove 14 is 0.2 μm or less. Note that it is preferable that the upper surface of the active layer 18 be flat.

然る後、第2図Iに示すように、活性層18上
にp−InPの第二クラツド層19を2μm以上の厚
みをもつて成長させ、液相エピタキシヤル成長工
程を終了する。
Thereafter, as shown in FIG. 2I, a second cladding layer 19 of p-InP is grown on the active layer 18 to a thickness of 2 .mu.m or more, thereby completing the liquid phase epitaxial growth process.

このようにして、各液相エピタキシヤル成長層
を基板11上に形成した後、これら層を有する基
板を成長炉から取り出し、第二クラツド層19の
表面19a上に及び基板11の下側面11b上に
夫々電極20及び21を被着形成する。
After each liquid phase epitaxial growth layer is formed on the substrate 11 in this way, the substrate having these layers is taken out of the growth furnace, and the layers are deposited on the surface 19a of the second cladding layer 19 and on the lower surface 11b of the substrate 11. Electrodes 20 and 21 are deposited on the electrodes 20 and 21, respectively.

このようにして得られた半導体レーザの両電極
20及び21間に適切な電圧を印加して注入電流
を流すと、電流は層18→17→16→15→1
1へと流れ、この場合、この電子とホールとが活
性層18において再結合発光し、発光した光が劈
開面で共振しフアブリペローモードでレーザ発振
する。この時、電流狭窄層15は逆バイアスにな
るため、溝14の外部では電流が流れず、溝14
の内側のみに電流経路が形成される。従つて、低
電流でも電流注入効率が高まり、レーザ発振が起
る。
When an appropriate voltage is applied between both electrodes 20 and 21 of the semiconductor laser obtained in this way to cause an injection current to flow, the current flows through the layers 18→17→16→15→1.
In this case, the electrons and holes recombine in the active layer 18 to emit light, and the emitted light resonates at the cleavage plane to cause laser oscillation in the Fabry-Perot mode. At this time, since the current confinement layer 15 is reverse biased, no current flows outside the groove 14 and
A current path is formed only inside. Therefore, current injection efficiency increases even at low currents, and laser oscillation occurs.

また、再結合により得られた光は、溝14の中
央付近では下部の第一クラツド層17が充分厚い
ため活性層18とこの層17との屈折率差で閉込
められるが、溝14の中央部分から左右にずれた
位置の部分(溝近傍の溝外の平担部を含む)では
第一クラツド層17が薄いため、活性層18より
この層17に入つた光はその下側の光吸収層16
にまで達する。この光吸収層16は活性層18よ
りもエネルギーギヤツプを小さくしてあるから、
この層16に達する光は全てこの層で吸収されて
しまい、レーザ発振に寄与しない。この効果によ
り、レーザ発振するのは活性層18のうち、溝の
中央部付近の上部に位置する領域部分のみとな
り、基本横モードで発振することとなる。
In addition, the light obtained by recombination is confined near the center of the groove 14 due to the difference in refractive index between the active layer 18 and this layer 17 because the lower first cladding layer 17 is sufficiently thick; Since the first cladding layer 17 is thin in the portions located left and right away from the active layer 18 (including the flat portion outside the groove near the groove), the light that enters this layer 17 from the active layer 18 is absorbed by the light below. layer 16
reach up to. Since this light absorption layer 16 has a smaller energy gap than the active layer 18,
All light reaching this layer 16 is absorbed by this layer and does not contribute to laser oscillation. Due to this effect, only the region of the active layer 18 located at the upper part near the center of the groove oscillates in the fundamental transverse mode.

(発明の効果) 上述した本発明の半導体発光素子の製造方法に
よれば、一回の液相エピタキシヤル成長によつ
て、電流狭窄層や、光吸収層や、活性層等を含む
各層を順次に連続的に形成出来、また、その際、
活性層を特に湾曲させて成長させるような特別の
制御を必要とせずに、基本横モード発振する構造
の半導体発光素子を容易に製造し得る利点を有す
る。
(Effects of the Invention) According to the method for manufacturing a semiconductor light emitting device of the present invention described above, each layer including the current confinement layer, light absorption layer, active layer, etc. is sequentially formed by one liquid phase epitaxial growth. can be formed continuously, and at that time,
This method has the advantage that a semiconductor light emitting device having a structure that oscillates in a fundamental transverse mode can be easily manufactured without requiring special control such as growing the active layer in a curved manner.

また、本発明方法によれば、液相エピタキシヤ
ル成長中に基板を成長炉外に取出すことがないの
で、基板表面等に熱ダメージを与えることなく、
この製造方法は簡単で、時間が掛らず、原料を節
約出来、製造歩留りがよいという利点がある。
Furthermore, according to the method of the present invention, the substrate is not taken out of the growth furnace during liquid phase epitaxial growth, so no thermal damage is caused to the substrate surface, etc.
This manufacturing method has the advantages of being simple, time-consuming, saving raw materials, and having a high manufacturing yield.

尚、上述した実施例では半導体レーザにつき説
明したが、製造された発光素子の端面を劈開面と
しない場合には半導体発光ダイオードとなる。上
述した実施例では、基板としてn−InP基板を用
いたが、p−InP基板を使用してもよいこと勿論
であり、その場合には各エピタキシヤル層の導電
型をこれに対応させて反転させることが必要であ
る。
Incidentally, in the above-mentioned embodiment, a semiconductor laser was explained, but if the end face of the manufactured light emitting element is not used as a cleavage plane, it becomes a semiconductor light emitting diode. In the above embodiment, an n-InP substrate was used as the substrate, but it goes without saying that a p-InP substrate may also be used, in which case the conductivity type of each epitaxial layer is reversed accordingly. It is necessary to do so.

本発明の方法で製造された半導体発光素子は低
しきい値でしかも基本横モードで発振するので、
この素子は光通信、情報処理装置等の光源として
利用して好適である。
Since the semiconductor light emitting device manufactured by the method of the present invention has a low threshold value and oscillates in the fundamental transverse mode,
This element is suitable for use as a light source for optical communications, information processing equipment, etc.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図A及びBは従来の電流狭窄層を有する構
造の半導体発光素子の製造方法を説明するための
製造工程図、第2図A〜Jは本発明の半導体発光
素子の製造方法の一実施例を説明するための製造
工程図、第3図は第2図の一工程段階での基板の
状態を示す斜視図である。 1,11……基板、1a,11a……基板の上
側表面、1b,11b……基板の下側面、2,1
5……電流狭窄層、3,14……溝、4,17…
…第一クラツド層、5,18……活性層、6,1
9……第二クラツド層、7,8,20,21……
電極、12……エツチングマスク層、13……ス
トライプ窓、14a……溝の側面、14b……溝
の底面、16……光吸収層、19a……第二クラ
ツド層の上側表面。
1A and 1B are manufacturing process diagrams for explaining a conventional method for manufacturing a semiconductor light emitting device having a structure having a current confinement layer, and FIGS. 2A to 2J are one implementation of the method for manufacturing a semiconductor light emitting device according to the present invention. FIG. 3 is a manufacturing process diagram for explaining an example, and is a perspective view showing the state of the substrate at one step of the process shown in FIG. 1, 11... Substrate, 1a, 11a... Upper surface of substrate, 1b, 11b... Lower surface of substrate, 2, 1
5... Current confinement layer, 3, 14... Groove, 4, 17...
...First clad layer, 5,18...Active layer, 6,1
9...Second cladding layer, 7, 8, 20, 21...
Electrode, 12... Etching mask layer, 13... Stripe window, 14a... Side surface of groove, 14b... Bottom surface of groove, 16... Light absorption layer, 19a... Upper surface of second cladding layer.

Claims (1)

【特許請求の範囲】 1 InGaAsP/InP半導体発光素子を液相エピタ
キシヤル成長法を用いて製造するに当り、 InP基板の(100)面から(111)A面を傾斜側
面とする溝を形成する工程と、 該(100)面と(111)A面とに対するInPの結
晶成長速度の面方位依存性を利用して前記溝外の
基板表面上に電流狭窄層を成長させ、さらに、
InGaAsPの光吸収層を該電流狭窄層上に成長さ
せると共に、溝内では凹状に下方に向けて湾曲し
た層として成長させ、さらに、第一クラツド層を
該溝の部分の光吸収層上では厚つくかつ溝外の光
吸収層上では薄く成長させ、さらに、該第一クラ
ツド層上にInGaAsPの活性層を成長させ、さら
に、該活性層上に第二クラツド層を成長させる一
回の液相エピタキシヤル成長工程とを含むことを
特徴とする半導体発光素子の製造方法。
[Claims] 1. When manufacturing an InGaAsP/InP semiconductor light emitting device using a liquid phase epitaxial growth method, a groove is formed whose side surfaces are inclined from the (100) plane to the (111)A plane of the InP substrate. A current confinement layer is grown on the substrate surface outside the groove by using the plane orientation dependence of the crystal growth rate of InP with respect to the (100) plane and the (111) A plane, and further,
A light-absorbing layer of InGaAsP is grown on the current confinement layer, and is also grown as a layer concavely curved downward in the trench, and the first cladding layer is formed to have a thick layer on the light-absorbing layer in the trench. InGaAsP is grown thinly on the light absorbing layer outside the grooves, and then an active layer of InGaAsP is grown on the first cladding layer, and then a second cladding layer is grown on the active layer in a single liquid phase process. 1. A method for manufacturing a semiconductor light emitting device, comprising: an epitaxial growth step.
JP17097983A 1983-09-16 1983-09-16 Manufacture of semiconductor light emitting element Granted JPS6062181A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17097983A JPS6062181A (en) 1983-09-16 1983-09-16 Manufacture of semiconductor light emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17097983A JPS6062181A (en) 1983-09-16 1983-09-16 Manufacture of semiconductor light emitting element

Publications (2)

Publication Number Publication Date
JPS6062181A JPS6062181A (en) 1985-04-10
JPS6355231B2 true JPS6355231B2 (en) 1988-11-01

Family

ID=15914886

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17097983A Granted JPS6062181A (en) 1983-09-16 1983-09-16 Manufacture of semiconductor light emitting element

Country Status (1)

Country Link
JP (1) JPS6062181A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010212664A (en) * 2009-02-10 2010-09-24 Renesas Electronics Corp Semiconductor laser, and method of manufacturing the same

Also Published As

Publication number Publication date
JPS6062181A (en) 1985-04-10

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