JPS6355088B2 - - Google Patents

Info

Publication number
JPS6355088B2
JPS6355088B2 JP58109874A JP10987483A JPS6355088B2 JP S6355088 B2 JPS6355088 B2 JP S6355088B2 JP 58109874 A JP58109874 A JP 58109874A JP 10987483 A JP10987483 A JP 10987483A JP S6355088 B2 JPS6355088 B2 JP S6355088B2
Authority
JP
Japan
Prior art keywords
flag
value
address
storage device
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58109874A
Other languages
English (en)
Japanese (ja)
Other versions
JPS603029A (ja
Inventor
Kazuo Azegami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58109874A priority Critical patent/JPS603029A/ja
Publication of JPS603029A publication Critical patent/JPS603029A/ja
Publication of JPS6355088B2 publication Critical patent/JPS6355088B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
JP58109874A 1983-06-17 1983-06-17 フラグのエラ−修正方法 Granted JPS603029A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58109874A JPS603029A (ja) 1983-06-17 1983-06-17 フラグのエラ−修正方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58109874A JPS603029A (ja) 1983-06-17 1983-06-17 フラグのエラ−修正方法

Publications (2)

Publication Number Publication Date
JPS603029A JPS603029A (ja) 1985-01-09
JPS6355088B2 true JPS6355088B2 (xx) 1988-11-01

Family

ID=14521371

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58109874A Granted JPS603029A (ja) 1983-06-17 1983-06-17 フラグのエラ−修正方法

Country Status (1)

Country Link
JP (1) JPS603029A (xx)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6598135B1 (en) * 2000-05-03 2003-07-22 Plasmon Ide System and method for defining rewriteable data storage media as write once data storage media

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5370635A (en) * 1976-12-06 1978-06-23 Casio Comput Co Ltd Information memory processor
JPS5682953A (en) * 1979-12-10 1981-07-07 Nec Corp Fault detecting circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5370635A (en) * 1976-12-06 1978-06-23 Casio Comput Co Ltd Information memory processor
JPS5682953A (en) * 1979-12-10 1981-07-07 Nec Corp Fault detecting circuit

Also Published As

Publication number Publication date
JPS603029A (ja) 1985-01-09

Similar Documents

Publication Publication Date Title
US4112502A (en) Conditional bypass of error correction for dual memory access time selection
JP4071940B2 (ja) メモリ設計のための共有式誤り訂正
US7526709B2 (en) Error detection and correction in a CAM
EP0034188A1 (en) Error correction system
EP0186719B1 (en) Device for correcting errors in memories
US4103823A (en) Parity checking scheme for detecting word line failure in multiple byte arrays
JPH0122649B2 (xx)
EP0138078A2 (en) Decoder of cyclic perfect binary code
JPH0476681A (ja) マイクロコンピュータ
JPS6355088B2 (xx)
JPS59214952A (ja) 障害処理方式
JPS6129024B2 (xx)
JPS60181851A (ja) 部分書込み制御方式
CN113808642B (zh) 数据存取系统和操作数据存取系统的方法
JP2818659B2 (ja) 誤り訂正方式
JPH09116442A (ja) 積符号の誤り訂正復号装置及び積符号の誤り訂正復号方法
JPH0527989A (ja) コンピユータシステムの例外処理装置
JPS60214043A (ja) パイプライン制御回路
JPH02207355A (ja) メモリ読出し方式
JPH0136137B2 (xx)
JPH04251354A (ja) 制御記憶の複数ビットエラー訂正方式
JPH06324894A (ja) 計算機の誤り訂正回路
JPS63216150A (ja) 記憶装置
JPH01140359A (ja) 主記憶装置
JPH05158810A (ja) 誤り検出回路