JPS6352362U - - Google Patents

Info

Publication number
JPS6352362U
JPS6352362U JP14503286U JP14503286U JPS6352362U JP S6352362 U JPS6352362 U JP S6352362U JP 14503286 U JP14503286 U JP 14503286U JP 14503286 U JP14503286 U JP 14503286U JP S6352362 U JPS6352362 U JP S6352362U
Authority
JP
Japan
Prior art keywords
signal
vertical sync
phase
bimorph
synchronization signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14503286U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14503286U priority Critical patent/JPS6352362U/ja
Publication of JPS6352362U publication Critical patent/JPS6352362U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Adjustment Of The Magnetic Head Position Track Following On Tapes (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案のオートトラツキング装置の
ブロツク図、第2図および第3図はバイモルフヘ
ツド動作点引きもどし回路の実施例のブロツク図
、第4図〜第6図は本考案を説明するためのテー
プ記録パターン及びバイモルフヘツド走査軌跡と
、基準垂直同期信号、再生垂直同期信号の位相関
係を示す図、第7図はバイモルフヘツド動作点引
きもどし回路の実施例を示す回路図、第8図は第
7図の動作を説明するためのタイミングチヤート
である。 1:トラツキングエラー検出回路、2:デイザ
信号発生回路、3:加算器、4:バイモルフ、5
:再生ヘツド、6:センサ、7:バイモルフヘツ
ド動作点引きもどし回路、8:位相比較器、9:
基準垂直同期信号、10:再生垂直同期信号、1
1:駆動アンプ回路、12:トラツク方向検出回
路、21:テープ、22:ホームトラツク、23
:記録トラツク、24:バイモルフヘツド再生走
査軌跡、25,26:ワンシヨツトマルチバイブ
レータ、27:基準同期信号のパルス幅と1トラ
ツク分未満の時間との和の時間、28:基準同期
信号(パルス幅…基準同期信号よりも短い周期)
、29:ワンシヨツト出力後の基準同期信号のパ
ルス幅(基準同期信号の周期―1トラツク―α)
Fig. 1 is a block diagram of an auto-tracking device of this invention, Figs. 2 and 3 are block diagrams of an embodiment of a bimorph head operating point pullback circuit, and Figs. 4 to 6 explain the invention. Fig. 7 is a circuit diagram showing an embodiment of the bimorph head operating point pullback circuit; is a timing chart for explaining the operation of FIG. 1: Tracking error detection circuit, 2: Dither signal generation circuit, 3: Adder, 4: Bimorph, 5
: Reproduction head, 6: Sensor, 7: Bimorph head operating point pullback circuit, 8: Phase comparator, 9:
Reference vertical synchronization signal, 10: Reproduction vertical synchronization signal, 1
1: Drive amplifier circuit, 12: Track direction detection circuit, 21: Tape, 22: Home track, 23
: recording track, 24: bimorph head reproduction scanning trajectory, 25, 26: one-shot multivibrator, 27: sum of the pulse width of the reference synchronization signal and the time less than one track, 28: reference synchronization signal (pulse width …Shorter period than the reference synchronization signal)
, 29: Pulse width of reference synchronization signal after one shot output (period of reference synchronization signal - 1 track - α)
.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] バイモルフに搭載した磁気ヘツドとセンサーと
からそれぞれ再生RF信号と磁気ヘツドの変位信
号とをとり出し、前記両信号からトラツキングエ
ラー電圧を検出し、デイザ信号を加えてバイモル
フに供給するヘリカルスキヤンVTRのオートト
ラツキング装置において、記録時と同等の速度で
の再生時、基準垂直同期信号と再生垂直同期信号
の位相を比較し基準垂直同期信号に対する再生垂
直同期信号の位相の進み又は遅れに対応した信号
を発生させ、この信号にもとづいて前記トラツキ
ングエラー電圧を制御する回路を備え、再生垂直
同期信号の位相を基準垂直同期信号の位相に一致
させるようにしたことを特徴とするオートトラツ
キング装置。
A helical scan VTR extracts a reproduction RF signal and a displacement signal of the magnetic head from the magnetic head and sensor mounted on the bimorph, detects a tracking error voltage from both signals, adds a dither signal, and supplies the signal to the bimorph. In an auto-tracking device, when reproducing at the same speed as recording, the phases of the reference vertical sync signal and the reproduced vertical sync signal are compared, and a signal corresponding to the lead or lag in the phase of the reproduced vertical sync signal with respect to the reference vertical sync signal. An auto-tracking device comprising: a circuit that generates a voltage and controls the tracking error voltage based on this signal, so that the phase of a reproduced vertical synchronization signal matches the phase of a reference vertical synchronization signal.
JP14503286U 1986-09-24 1986-09-24 Pending JPS6352362U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14503286U JPS6352362U (en) 1986-09-24 1986-09-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14503286U JPS6352362U (en) 1986-09-24 1986-09-24

Publications (1)

Publication Number Publication Date
JPS6352362U true JPS6352362U (en) 1988-04-08

Family

ID=31056193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14503286U Pending JPS6352362U (en) 1986-09-24 1986-09-24

Country Status (1)

Country Link
JP (1) JPS6352362U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5661027A (en) * 1979-10-23 1981-05-26 Matsushita Electric Ind Co Ltd Tracking device
JPS5683835A (en) * 1979-12-07 1981-07-08 Matsushita Electric Ind Co Ltd Tracking device
JPS5746318A (en) * 1980-09-01 1982-03-16 Matsushita Electric Ind Co Ltd Tracking device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5661027A (en) * 1979-10-23 1981-05-26 Matsushita Electric Ind Co Ltd Tracking device
JPS5683835A (en) * 1979-12-07 1981-07-08 Matsushita Electric Ind Co Ltd Tracking device
JPS5746318A (en) * 1980-09-01 1982-03-16 Matsushita Electric Ind Co Ltd Tracking device

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