JPS6350090A - Electronic circuit board - Google Patents

Electronic circuit board

Info

Publication number
JPS6350090A
JPS6350090A JP19425486A JP19425486A JPS6350090A JP S6350090 A JPS6350090 A JP S6350090A JP 19425486 A JP19425486 A JP 19425486A JP 19425486 A JP19425486 A JP 19425486A JP S6350090 A JPS6350090 A JP S6350090A
Authority
JP
Japan
Prior art keywords
semiconductor element
electronic circuit
circuit board
solder
substrate body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19425486A
Other languages
Japanese (ja)
Inventor
哲也 上田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP19425486A priority Critical patent/JPS6350090A/en
Publication of JPS6350090A publication Critical patent/JPS6350090A/en
Pending legal-status Critical Current

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  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、例えばハイブリッドIC,表面実装型IC
,LSI等の半導体素子を実装する電子回路基板に関す
るものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention is applicable to hybrid ICs, surface-mounted ICs, etc.
, and relates to an electronic circuit board on which semiconductor elements such as LSI are mounted.

〔従来の技術〕[Conventional technology]

第8図は従来の電子回路基板を示す斜視図である。同図
において、1は基板本体、2は基板本体1の表面に形成
された導体配線である。3は例えばハイブリッドIC,
表面実装型IC,LSI等の半導体素子、4はそのリー
ド端子である。
FIG. 8 is a perspective view showing a conventional electronic circuit board. In the figure, 1 is a substrate body, and 2 is a conductor wiring formed on the surface of the substrate body 1. 3 is, for example, a hybrid IC,
A semiconductor element such as a surface-mounted IC or LSI, and 4 are lead terminals thereof.

この半導体素子3は、そのリード端子4の先端部が図に
示すように下方向に向けて折れ曲っておル、このリード
端子4の折れ曲っている先端部を基板本体1の導体配線
2上に向けて装着し、例えば半田などによシ接着させて
実装される。
In this semiconductor element 3, the tip of the lead terminal 4 is bent downward as shown in the figure, and the bent tip of the lead terminal 4 is placed on the conductor wiring 2 of the substrate body 1. It is mounted by attaching it with solder, for example.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の電子回路基板は、以上のように構成されているの
で、基板本体1上に半導体素子3を実装した場合、半導
体素子3の厚さだけ基板本体1の厚さよシも厚くなる。
Since the conventional electronic circuit board is configured as described above, when the semiconductor element 3 is mounted on the substrate body 1, the thickness of the substrate body 1 becomes thicker by the thickness of the semiconductor element 3.

また、実装後の半導体素子3と基板本体1との間が狭い
ために半導体素子3から放出される熱がその部分から放
熱され難い。
Further, since the space between the semiconductor element 3 and the substrate body 1 after mounting is narrow, it is difficult for the heat emitted from the semiconductor element 3 to be radiated from that part.

さらに実装後、半田で接着する場合、半田に含まれる松
やに等の7ラツクスが半導体素子3と基板本体1との間
の隙間に残シ、後で不具合が生じる等の問題があった。
Further, when bonding with solder after mounting, there is a problem that pine resin and the like contained in the solder remain in the gap between the semiconductor element 3 and the substrate body 1, causing problems later.

この発明は上記のような問題点を解消するためになされ
たもので、半導体素子を含めた電子回路基板の厚さを減
少させるとともに、半導体素子の放熱性を高め、さらに
半導体素子と基板本体との間の広さを大きくすることに
よって、半田に含まれるフラックスの洗浄性を向上させ
ることができる電子回路基板を提供することを目的とし
ている。
This invention was made to solve the above-mentioned problems, and it reduces the thickness of the electronic circuit board including the semiconductor element, improves the heat dissipation of the semiconductor element, and further improves the connection between the semiconductor element and the board body. It is an object of the present invention to provide an electronic circuit board that can improve the cleanability of flux contained in solder by increasing the space between the solder and the solder.

〔問題点を解決するための手段〕[Means for solving problems]

との発明に係る電子回路基板は、基板本体1に半導体素
子を装着する挿入部を設けたものである。
In the electronic circuit board according to the invention, a board body 1 is provided with an insertion portion into which a semiconductor element is mounted.

〔作用〕[Effect]

この発明における基板本体に設けた挿入部は、半導体素
子の少なくとも一部を挿入することにより、半導体素子
を実装した後の電子回路基板組立体全体の厚さを薄くす
るとともに放熱性および半田フラックスの洗浄性が向上
される。
By inserting at least a part of the semiconductor element, the insertion part provided in the board main body of the present invention reduces the thickness of the entire electronic circuit board assembly after mounting the semiconductor element, and improves heat dissipation and solder flux. Cleanability is improved.

〔実施例〕〔Example〕

以下、図面を用いてこの発明の実施例を詳細に説明する
Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図はこの発明による電子回路基板の一実施例を示す
斜視図であシ、前述の図と同一部分には同一符号を付し
である。同図において、表面に導体配線2が形成された
基板本体1′の中央部、すなわち半導体素子3の実装部
分には底部5mを有する凹部5が形成されておシ、との
凹部5の深さは半導体素子3の厚さとほぼ同等の寸法を
有している。
FIG. 1 is a perspective view showing one embodiment of an electronic circuit board according to the present invention, and the same parts as in the previous figures are given the same reference numerals. In the same figure, a recess 5 having a bottom 5m is formed in the central part of the substrate body 1' on which the conductor wiring 2 is formed, that is, in the mounting part of the semiconductor element 3. has a dimension substantially equivalent to the thickness of the semiconductor element 3.

このように構成された基板本体1′は、第2図に示すよ
うに凹部5内に半導体素子3を、そのリード端子4の折
れ曲シを下に向けて挿入し、導体配線2とリード端子4
とを半田6で接続して装着することができるので、実装
後の基板組立体全体の厚さを薄くすることができる。
As shown in FIG. 2, the substrate main body 1' configured in this way is constructed by inserting the semiconductor element 3 into the recess 5 with the bent edges of the lead terminals 4 facing downward, and connecting the conductor wiring 2 and the lead terminals. 4
Since these can be connected and mounted using solder 6, the thickness of the entire board assembly after mounting can be reduced.

第3図および第4図にこの発明の他の実施例を示す。第
3図は、基板本体1′に底面のない開口部7を設けた場
合の他の実施例を示す。この場合、基板本体1の放熱性
および半田フラックスの洗浄性を大幅に向上させること
ができる。第4図の実施例は、基板本体1′に開口部7
を設けるとともにその裏面に放熱板8を設けたものであ
る。この場合、放熱性をさらに大幅に向上させることが
できる。第4図では、基板本体1の裏面のみに放熱板8
を設けた場合を示したが、この放熱板8は、半導体素子
3の上部に設けても良く、その形態は限定されない。ま
た、放熱板8の代シに、冷媒を通す管等を配設しても良
く、その種類も問わない。
Other embodiments of the invention are shown in FIGS. 3 and 4. FIG. 3 shows another embodiment in which the substrate body 1' is provided with an opening 7 without a bottom surface. In this case, the heat dissipation of the substrate body 1 and the cleanability of the solder flux can be greatly improved. The embodiment of FIG. 4 has an opening 7 in the substrate body 1'.
A heat dissipation plate 8 is provided on the back surface of the heat sink. In this case, heat dissipation can be further improved significantly. In FIG. 4, a heat sink 8 is provided only on the back side of the board body 1.
Although the case where the heat sink 8 is provided is shown, the heat sink 8 may be provided above the semiconductor element 3, and its form is not limited. Further, instead of the heat dissipation plate 8, a pipe or the like for passing the refrigerant may be provided, and the type thereof is not limited.

また、放熱板8は基板本体1′の裏面でなくても良く、
基板本体1/の内部、すなわち凹部5の底部5aに設け
ても良い。
Furthermore, the heat sink 8 does not have to be on the back side of the board body 1',
It may be provided inside the substrate body 1/, that is, at the bottom 5a of the recess 5.

また、本発明を適用できる半導体素子3は、第1図に示
すようなリード端子4の折れ曲シタイブでなくても良い
。すなわち第6図、第7図はJリード型の半導体素子3
tを本発明に係わる基板本体1/に実装した場合の他の
実施例を示したもので、特に第7図においては、基板本
体11に設けた凹部5を利用して基板本体1/内に導体
配線2′を設けこの導体配線2′と、表面の導体配線2
とをJ IJ−ド型半導体素子3/を介して接続するこ
とができるので、基板本体1′の設計を容易にすること
ができる。
Further, the semiconductor element 3 to which the present invention can be applied does not have to have lead terminals 4 bent as shown in FIG. That is, FIGS. 6 and 7 show a J-lead type semiconductor element 3.
7 shows another embodiment in which the t is mounted on the board main body 1/ according to the present invention. In particular, in FIG. A conductor wiring 2' is provided, and this conductor wiring 2' and the conductor wiring 2 on the surface
Since these can be connected to each other via the JIJ-type semiconductor element 3/, the design of the substrate body 1' can be facilitated.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば、基板本体の一部に半
導体素子を実装する部位に挿入部を設けたので、実装後
の電子回路基板組立体の厚さを薄くするとともに、放熱
性および半田に含まれるフラックスの洗浄性を向上させ
、かつ基板本体の機能を向上させることもできる等の極
めて優れた効果が得られる。
As described above, according to the present invention, since the insertion portion is provided in a part of the board body where the semiconductor element is mounted, the thickness of the electronic circuit board assembly after mounting can be reduced, and the heat dissipation and heat dissipation properties can be improved. Extremely excellent effects such as improving the cleanability of the flux contained in the solder and improving the functionality of the board body can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はとの発明の一実施例による電子回路基板を示す
斜視図、第2図はその実装後の断面図、第3図〜第7図
はこの発明の他の実施例の断面図、第8図は従来の電子
回路基板を示す斜視図である。 1′・・・・基板本体、2,2′・・・・導体配線、3
′・・・・半導体素子、4・・・・リード端子、5・會
・愉凹部、5aφ拳φ・底部、6・・・・半田、T・・
・・開口部、8・・・・放熱板。
Fig. 1 is a perspective view showing an electronic circuit board according to one embodiment of the invention, Fig. 2 is a sectional view after its mounting, and Figs. 3 to 7 are sectional views of other embodiments of the invention. FIG. 8 is a perspective view showing a conventional electronic circuit board. 1'... Board body, 2, 2'... Conductor wiring, 3
′... Semiconductor element, 4... Lead terminal, 5... Recessed part, 5aφ fist φ, bottom, 6... Solder, T...
...opening, 8...heat sink.

Claims (3)

【特許請求の範囲】[Claims] (1)基板本体に半導体素子を実装する電子回路基板に
おいて、前記基板本体に半導体素子を装着する挿入部を
設けたことを特徴とする電子回路基板。
(1) An electronic circuit board on which a semiconductor element is mounted on a board body, characterized in that the board body is provided with an insertion section for mounting the semiconductor element.
(2)前記挿入部を凹部としたととを特徴とする特許請
求の範囲第1項記載の電子回路基板。
(2) The electronic circuit board according to claim 1, wherein the insertion portion is a recess.
(3)前記挿入部を開口部としたことを特徴とする特許
請求の範囲第1項記載の電子回路基板。
(3) The electronic circuit board according to claim 1, wherein the insertion portion is an opening.
JP19425486A 1986-08-19 1986-08-19 Electronic circuit board Pending JPS6350090A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19425486A JPS6350090A (en) 1986-08-19 1986-08-19 Electronic circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19425486A JPS6350090A (en) 1986-08-19 1986-08-19 Electronic circuit board

Publications (1)

Publication Number Publication Date
JPS6350090A true JPS6350090A (en) 1988-03-02

Family

ID=16321557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19425486A Pending JPS6350090A (en) 1986-08-19 1986-08-19 Electronic circuit board

Country Status (1)

Country Link
JP (1) JPS6350090A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0621275U (en) * 1992-08-12 1994-03-18 日本電子機器株式会社 Mounting structure of flat package parts
JP2006254600A (en) * 2005-03-10 2006-09-21 Asmo Co Ltd Circuit component

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0621275U (en) * 1992-08-12 1994-03-18 日本電子機器株式会社 Mounting structure of flat package parts
JP2006254600A (en) * 2005-03-10 2006-09-21 Asmo Co Ltd Circuit component

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