JPS6345547B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a rectangular wave control circuit that creates pulse output timing based on values set in a program and further measures the input timing of externally input pulses.

In systems controlled by pulse signals, the input/output timing of pulse signals, the width or number of pulses are usually used for system control.
For example, when controlling a car, the vehicle speed, motor,
Automatic control of fuel, etc. is required. The vehicle speed is determined by detecting the rotational speed of the tires by a sensor, and the rotational speed is calculated based on the pulse output from this sensor. On the other hand, in controlling the fuel and motor, fuel supply (flow rate control) and drive current to the motor are controlled during the active level period of pulses generated based on count values. Therefore, it is necessary to accurately measure and control pulse signals input from the outside (signals indicating the rotational speed) and pulse signals output to the outside.
In controlling such a pulse signal, a special basic clock serving as a reference clock is counted to measure the cycle of the input pulse signal and control the active level period of the output pulse signal.

A conventionally used reference clock counting circuit will be explained with reference to the block diagram of FIG. 1 and the timing charts of FIGS. 2 to 4.

In the block diagram of Figure 1, incrementer 1
-0 increments the contents of counter 1-1 by +1 each time the reference clock is input. Comparison data corresponding to the output timing of the pulse signal is stored in the comparison register 1-2 via the internal data bus 1-3. Comparators 1-4 are up counters 1
The out value within -1 is constantly compared with the comparison data in the comparison register 1-2, and when the two match, a match signal is output to the pulse circuit 1-5. The pulse output circuit 1-5 outputs the output terminal 1- every time a coincidence signal is input.
At the same time as changing the output state of counter 6, clearing of counter 1-1 is controlled. Transfer gate 1
When an external pulse signal is input to input terminal 1-9 of -8, the contents of counter 1-1 are transferred to input register 1-7, and input register 1-7 holds the timing at which this external pulse signal is input. Data in input registers 1-7 is transferred to internal data bus 1-
It can be read out via 3.

Figures 2, 3, and 4 each show input terminal 1.
When measuring the period of the rectangular wave input from −9,
This is a timing chart when both processes are performed simultaneously when a control pulse is output from the output terminal 1-6.

In the period measurement, in the timing chart shown in Fig. 2, when the first rising edge of the rectangular wave is input to the input terminal 1-9 at the timing _t1 , the transfer gate 1-8 opens and the counter 1-1 starts at the timing _t1. The first count value at is transferred to input register 1-7. Similarly, at the next timing t ₂ , the second
When the rising edge of is input, the second count value at _t2 of counter 1-1 is transferred to input register 1-7. The period T ₁ of the square wave is
It is obtained by calculating the difference between the first and second count values. In the pulse output, in the block diagram of FIG. 1 and the timing chart of _FIG .
is stored in. The contents of the counter latch 1-1 and the comparison register 1-2 are compared by the comparator 1-4, and when a first match is detected at timing _t3 , a match signal is outputted to the pulse output circuit 1-5. When the pulse output circuit 1-5 changes the output level to the output terminal 1-6 in synchronization with this coincidence signal, it also clears the counter latch 1-1. Counter 1-1 again increases from 0 each time the reference clock is input. Next, when the comparator 1-4 detects the second match at timing _t4 , the pulse output circuit 1-4 detects the second match at timing t4.
5 changes the output level to output terminals 1-6,
At the same time, clear counter 1-1. The above operation is repeated and a rectangular wave whose level changes every time a match is detected is output from the output terminal 1-6.

Generally, the above-mentioned period measurement of the input pulse signal and control of the pulse width of the output pulse signal are always carried out, for example, when controlling the above-mentioned automobile.
It must be able to be controlled at the same time. That is, the control of the output pulse signal cannot be interrupted while the cycle of the input pulse signal is being measured.

The operation of simultaneously performing the above-mentioned period measurement and pulse output using a conventional reference clock counting circuit will be described with reference to the timing chart shown in FIG.

The method of measuring the period is exactly the same as the method explained in the timing chart of FIG. The pulse output method is to clear the counter 1-1 in synchronization with the coincidence signal output from the comparator 1-4, since the counter 1-1 counts up the reference clock and measures the period. Since this is not possible, pulse output is performed using a different method as shown below. When the comparator 1-4 detects the first match between the counter touch 1-1 and the comparison register 1-2 at timing _t6 , the pulse output circuit 1-5 changes the output level of the output terminal 1-6 at this timing. change. However, counter 1-1 is not cleared. At this time, the timing t stored in the comparison register _1-2 is used to obtain comparison data corresponding to the timing t7 at which the second match should occur, using an interrupt that occurs in synchronization with _t6 . ₆ and data corresponding to 1/2 of the synchronization T ₂ are added, and the result of this addition is newly set in the comparison register 1-2 as comparison data for the second coincidence. When the second match signal is detected in synchronization with the next timing _t7 , comparison data corresponding to the timing _t8 is calculated and the comparison registers 1-2 are loaded again.
, and then repeat the same operation.

Although period measurement has been described as an example of measurement, pulse width measurement and pulse input timing measurement are similarly obtained by processing data held in the input registers 1-7.

As explained above, when a conventional reference clock counting circuit simultaneously performs various measurements on external pulses and outputs control pulse signals, preparations for the next coincidence are made every time a coincidence signal indicating the change timing of the rectangular wave output is generated. The first disadvantage is that new comparison data must be set, and the method of generating square wave output timing is control based on the count value of a free-running up counter, so the comparison data set in the comparison register is The second drawback is that the data does not simply correspond to the period of the rectangular wave, but a value that is added to the previous comparison data must be set, and weighting is applied to the count value of the up counter. In addition to the counter and the comparison register, a comparator is required to detect a match between the two, resulting in an increase in hardware, which is a third drawback.

An object of the present invention is to provide a rectangular wave control circuit that can control a plurality of rectangular wave signals with a small amount of hardware.

The present invention provides a rectangular wave control circuit that controls period measurement of a first rectangular wave and change timing of a second rectangular wave, including first and second counters;
a single increment/decrement unit commonly connected to the first and second counters for time-divisionally varying the contents of the first and second counters based on a reference clock; The contents of the first counter touch are read out to the period measuring section at every change point of the square wave, and the second square wave is changed every time the second counter touch overflows or underflows. This method is characterized by setting a predetermined value in the counter.

An embodiment of the present invention will be described in detail using FIGS. 5 to 7.

In the block diagram of FIG. 5, a first counter latch 1-1, an internal bus 1-3, a pulse output circuit 1-5, an output terminal 1-6, an input register 1-7,
The first transfer gate 1-8, the input terminal 1-9 is the first
This is the same as that explained in the block diagram of the figure. The increase/decrease device 2-0 operates in a time-division manner under the control of the control circuit 2-1, and when the reference clock is input, it increments the contents of the first counter 1-1 by 1 and further increases the contents of the second counter 2-2. Decrement the content by 1. Data corresponding to the width of the pulse signal is stored in the counter register 2-3 via the internal data bus 1-3. The pulse output circuit changes the output state of the output terminal 1-6 by decrementing the contents of the second counter 2-2, and simultaneously changes the output state of the output terminal 1-6 when a borrow is output. At the same time, the second transfer gate 2-
4 and read the contents of count registers 2-3 to the second
transfer to the counter clutch.

Next, the operation of the reference clock counting circuit according to the present invention will be explained with reference to the timing chart of FIG. The increase/decrease device 2-0 is used in a time-division manner according to the control signal output from the control circuit 2-1, and when the reference clock is input at timing _t6 , the first counter 1 is activated during the period when the control signal is at a high level.
-1 is incremented by 1, and the content of the second counter 2-2 is decreased by 1 during the subsequent low level period. When the reference clock is input again at the next timing _t7 , the above operation is repeated again.

The operation of simultaneously performing period measurement and pulse output using the reference clock counting circuit according to the present invention will be described with reference to the timing chart shown in FIG. The method of measuring the period is exactly the same as the method explained in the timing chart of _FIG . It is obtained by calculating the difference between the count value and the second count value held at timing _t2 . The following operations are performed during pulse output. Count register 2
-3 stores data corresponding to 1/2 of the output pulse period _T2 . The incrementer/decrementer 2-0 decrements the content of the second counter 2-2 by one each time the reference clock is input. As a result of the decrease, when a first borrow is output at timing _t6 , this borrow signal is output to the pulse output circuit 1-5. The pulse output circuit 1-5 changes the output level of the output terminal 1-6 in synchronization with this borrow signal, and at the same time opens the second transfer gate 2-4 and outputs the count register 2.
-3 is transferred to the second counter 2-2. Again, the second counter is decremented by one every reference clock. Increase/decrease 2-0 is next
When the second borrow is output at timing _t7 , the same operation as above is repeated again, and a rectangular wave whose level changes for each borrow signal is output from the output terminal 1-6.

As described above, the reference clock counting circuit according to the present invention can simultaneously and easily process various measurements for external pulses and the output of control pulse signals. In particular, in the output of the control pulse signal, the data set in the count register is based on down-counting of the reference clock, so there is no need to weight up-counting as in the prior art. Furthermore, there is no need to update the settings each time the output level changes, and the software effort can be significantly reduced. In addition, in terms of hardware, there is no need for a comparator to detect the match between the counter and the comparison register, making it possible to significantly reduce the amount of hardware compared to conventional products, allowing for complex pulse signal processing functions. The practical effect is very large for a 1-chip microcomputer.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional rectangular wave control circuit, FIGS. 2, 3, and 4 are timing diagrams showing the operation of FIG. 1, and FIG. 5 is a block diagram showing an embodiment of the present invention. , FIG. 6, and FIG. 7 are timing diagrams showing the operation of FIG. 5. 1-0...Incrementer, 1-1...First counter launch, 1-2...Comparison register, 1-
3...Data bus, 1-4...Comparator, 1-5...
...Pulse output circuit, 1-6...Output terminal, 1-7
...Input register, 1-8...First transfer gate, 1-9...Input terminal, 2-0...Increase/decrease, 2
-1...Control circuit, 2-2...Second counter touch, 2-3...Count register, 2-4...
Second transfer gate.

Claims (1)

[Claims] 1. In a rectangular wave control circuit that controls period measurement of the first rectangular wave and change timing of the second rectangular wave, the first and second counters and the first and second counters have a single increment/decrement device connected to the clock for changing the contents of the first and second counters in a time-division manner based on a reference clock; The contents of the counter touch are read to a period measuring section, and the second rectangular wave is changed every time the second counter touch overflows or underflows, and a predetermined value is set in the second counter touch. A square wave control circuit.