JPS6345049Y2 - - Google Patents
Info
- Publication number
- JPS6345049Y2 JPS6345049Y2 JP3171280U JP3171280U JPS6345049Y2 JP S6345049 Y2 JPS6345049 Y2 JP S6345049Y2 JP 3171280 U JP3171280 U JP 3171280U JP 3171280 U JP3171280 U JP 3171280U JP S6345049 Y2 JPS6345049 Y2 JP S6345049Y2
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- ground terminal
- power supply
- supply circuit
- load
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000009499 grossing Methods 0.000 description 3
Landscapes
- Amplifiers (AREA)
Description
【考案の詳細な説明】
本考案は増幅器のアース回路装置の改良に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a grounding circuit device for an amplifier.
従来の増幅器は第１図に示すように、増幅器１
の入力アース端子１ａ、負荷たとえばスピーカー
２のアース端子２ａおよび電源回路３のアース端
子３ａを共通に接続してシヤーシ５に接地した一
点接地構造を有する。このような一点接地構造
は、実際には各アース端子１ａ，２ａ，３ａが或
る値の接地インピーダンスをもつてシヤーシ５に
接地されているために、電源回路３のリツプル電
流や平滑コンデンサの充電電流、負荷２を流れる
負荷電流によつて、接地インピーダンスの両端に
不要な電圧を生じ、この不要な電圧の影響が増幅
器１の入力アース端子１ａに現われる。つまり、
増幅器１の入力アース端子１が電源回路３や負荷
２からの干渉を受けて、歪み、ノイズ等の原因に
なつていた。 A conventional amplifier is an amplifier 1 as shown in FIG.
It has a single-point grounding structure in which the input ground terminal 1a of the speaker 2, the ground terminal 2a of the speaker 2, and the ground terminal 3a of the power supply circuit 3 are commonly connected and grounded to the chassis 5. In this single-point grounding structure, each of the grounding terminals 1a, 2a, and 3a is actually grounded to the chassis 5 with a certain value of grounding impedance, so that ripple current in the power supply circuit 3 and charging of the smoothing capacitor The load current flowing through the load 2 generates an unnecessary voltage across the ground impedance, and the influence of this unnecessary voltage appears at the input ground terminal 1a of the amplifier 1. In other words,
The input ground terminal 1 of the amplifier 1 receives interference from the power supply circuit 3 and the load 2, causing distortion, noise, and the like.
本考案はこのような従来欠点を改良したもの
で、以下図において説明する。 The present invention improves on these conventional drawbacks, and will be explained in the following figures.
第２図において説明すると、４は環状のブスア
ース板で、増幅器１の入力アース端子１ａを上記
ブスアース板４の所定位置P1に接続するととも
に、上記入力アース端子１ａをシヤーシ５に接地
し、負荷２および電源回路３のアース端子２ａ，
３ａを共通に接続して上記ブスアース板４の所定
位置P1と異なる位置P2に接続した構造である。 Referring to FIG. 2, reference numeral 4 designates a ring-shaped bus ground plate, which connects the input ground terminal 1a of the amplifier 1 to a predetermined position P1 of the bus ground plate 4, and also grounds the input ground terminal 1a to the chassis 5, and 2 and the ground terminal 2a of the power supply circuit 3,
3a are commonly connected and connected to a position P2 different from the predetermined position P1 of the bus earth plate 4.
以上の構造は、増幅器１の入力アース端子１ａ
がブスアース板４の負荷２および電源回路３のア
ース端子２ａ，３ａの接続位置P2と異なる位置
P1に接続されているので、すなわち、増幅器１
の入力アース端子１ａが負荷電流やリツプル電
流、平滑コンデンサの充電電流の流れるループ内
に位置しないので、電源回路３のリツプル電流や
平滑コンデンサの充電電流、負荷電流による影響
が増幅器１の入力アース端子１ａに現われないの
で、上記した従来欠点が改良されて、歪みやノイ
ズの少ない増幅器が実現できる。 The above structure is based on the input ground terminal 1a of the amplifier 1.
is a position different from the connection position P 2 of the load 2 of the bus earth plate 4 and the earth terminals 2a, 3a of the power supply circuit 3.
Since it is connected to P 1 , i.e. amplifier 1
Since the input ground terminal 1a of the amplifier 1 is not located in the loop through which the load current, ripple current, and charging current of the smoothing capacitor flow, the input ground terminal of the amplifier 1 is affected by the ripple current of the power supply circuit 3, the charging current of the smoothing capacitor, and the load current. 1a, the above-described conventional drawbacks can be improved and an amplifier with less distortion and noise can be realized.
第３図は他の実施例で、増幅器１、負荷２、電
源回路３の各アース端子１ａ，２ａ，３ａをブス
アース板４の各々異なる位置P1，P2，P3に接続
した構造を有し、本実施例によれば各アース端子
１ａ，２ａ，３ａ間の相互干渉が抑圧できる効果
がある。 FIG. 3 shows another embodiment, which has a structure in which the ground terminals 1a, 2a, 3a of the amplifier 1, load 2, and power supply circuit 3 are connected to different positions P 1 , P 2 , and P 3 of the bus ground plate 4, respectively. However, this embodiment has the effect of suppressing mutual interference between the ground terminals 1a, 2a, and 3a.
以上のように、本考案は増幅器の入力アース端
子を環状のブスアース板の負荷、電源回路のアー
ス端子の接続位置と異なる位置に接続したので、
負荷、電源回路から増幅器の入力アース端子への
干渉が抑圧され、歪みやノイズ等の点で優れた特
性の増幅器が実現できる利点を有する。 As described above, in the present invention, the input ground terminal of the amplifier is connected to a position different from that of the load of the annular bus ground plate and the ground terminal of the power supply circuit.
This has the advantage that interference from the load and power supply circuit to the input ground terminal of the amplifier is suppressed, and an amplifier with excellent characteristics in terms of distortion and noise can be realized.
第１図は従来の増幅器の構成を示す図、第２図
は本考案の増幅器の構成を示す図、第３図は同、
他の実施例の構成を示す図である。
１は増幅器、２は負荷、３は電源回路、１ａ，
２ａ，３ａはアース端子、４はブスアース板であ
る。
Fig. 1 is a diagram showing the configuration of a conventional amplifier, Fig. 2 is a diagram showing the configuration of the amplifier of the present invention, and Fig. 3 is a diagram showing the configuration of the amplifier of the present invention.
It is a figure which shows the structure of another Example. 1 is an amplifier, 2 is a load, 3 is a power supply circuit, 1a,
2a and 3a are ground terminals, and 4 is a bus ground plate.
Claims (1)
アース端子２ａ，３ａを接続するとともに当該ア
ース端子２ａ，３ａの接続位置と異なる位置に増
幅器１の入力アース端子１ａを接続し、かつ、当
該入力アース端子１ａをシヤーシ５に接地してな
ることを特徴とする増幅器。 The load 2 and the ground terminals 2a and 3a of the power supply circuit 3 are connected to the annular bus ground plate 4, and the input ground terminal 1a of the amplifier 1 is connected to a position different from the connection position of the ground terminals 2a and 3a, and An amplifier characterized in that a ground terminal 1a is grounded to a chassis 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3171280U JPS6345049Y2 (en) | 1980-03-10 | 1980-03-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3171280U JPS6345049Y2 (en) | 1980-03-10 | 1980-03-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56132809U JPS56132809U (en) | 1981-10-08 |
| JPS6345049Y2 true JPS6345049Y2 (en) | 1988-11-22 |
Family
ID=29627557
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3171280U Expired JPS6345049Y2 (en) | 1980-03-10 | 1980-03-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6345049Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002314355A (en) * | 2001-04-16 | 2002-10-25 | Niigata Seimitsu Kk | Multistage amplifier circuit |
-
1980
- 1980-03-10 JP JP3171280U patent/JPS6345049Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56132809U (en) | 1981-10-08 |
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