JPS6342562Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switching control circuit for a ferrite switch that reliably operates a ferrite switch that is switched by a single pulse current drive.

Generally, as an example of a microwave changeover switch used for switching between active and standby wireless communication systems, there is a latch type ferrite switch that is normally driven by a single pulse. In this single pulse drive,
For example, if a monitor circuit is provided that detects the direction of the flowing current and displays the selected state of the ferrite switch, the selected state of the ferrite switch itself may differ from the displayed state of the monitor circuit due to some disturbance. Such switching between active and standby is performed every long period of about one year, but the status may change during such a long period of time. Normally, even if a more dominant switching control signal is input to the selected side of the ferrite switch, the pulse drive current is not allowed to flow.
Even if the selection state of the ferrite switch itself and the display state of the monitor circuit are different, the same state will be maintained. Therefore, it is necessary to supply the selected side of the ferrite switch with a manual switching (control) signal or the like that has priority over the automatic switching signal to re-drive the ferrite switch and the monitor circuit so that their states match. .

Based on the above considerations, the purpose of this invention is to more reliably check the switching state of the ferrite switch itself and the display state of the monitor, even in a simple monitor circuit that detects the direction of a single pulse current and displays the state. It is an object of the present invention to provide a switching control circuit for a ferrite switch that allows matching.

The switching control circuit of the ferrite switch of the present invention includes a first switching circuit that outputs on/off and mutually inverted signals as first and second switching signals corresponding to the switching operation; second and third switching signals that are independently controlled and turned on;
a logic circuit that turns off the first and second switching signals when either one of the third and fourth switching signals turns on;
first and second delay circuits that give a predetermined delay to each of the third and fourth switching signals and output them as first and second delayed signals, respectively; and a first switching signal output from the logic circuit. a first operation signal that is turned on by the first delay signal and a second operation signal that turns on a second switching signal of the output of the logic circuit by the second delay signal, respectively. first and second gate circuits that output;
First and second pulse circuits each output a pulse of a predetermined width in response to the first and second operation signals of these gate circuits, and each output of these pulse circuits is connected to one end and the other end of a ferrite switch, respectively. The ferrite switch includes first and second drive circuits that are connected to the ferrite switch and drive switching of the ferrite switch.

The present invention will be explained in detail below with reference to the drawings.

FIG. 1 is a circuit diagram of a ferrite switch control system including an embodiment of the present invention, and FIGS. 2a to 2e are operational waveform diagrams of FIG. 1. In the figure, the external connection switch
S ₁ generates _an automatic switching signal for selecting one of _the switches, as shown in FIG _.
The manual switching signal is controlled independently of the automatic switching signal and has priority over the automatic switching signal. These switching signals are
It is a pulse or an on/off signal consisting of 1 and 0, and is in a state of "0" when a switching command is selected, and "1" when a switching command is not selected. In addition, 1, 2, 13, 15, 16, and 18 are inverting amplifiers, 3, 4, 5, and 6 are NAND gate circuits, and 7 and 8 are retrigger multipliers that convert the outputs of gate circuits 5 and 6 into a single pulse. vibrator, 9,
10 is a drive circuit that switches and drives the ferrite switch 11 with pulses; 12 is an AND gate circuit;
14 and 17 are delay circuits.

First, the switch _S1 is set so that the drive circuit 10 side is selected and the No. 1 side of the ferrite switch 11 is selected by an automatic switching control signal as shown in FIG. 2B. Now, if a more dominant manual switching control signal S ₃ (Fig. 2c) comes in,
At this time, the output of the gate circuit 12 becomes "0", the outputs of the gate circuits 3 and 4 become "1", and the output of the gate circuit 5,
The output of 6 is held at "0" (Fig. 2d).

Next, the switching control signal passed through the delay circuit 17 is
In order to give "0" to the input of the gate circuit 6, the output of the gate circuit 6 changes state from "0" to "1" (Fig. 2d), and the rise of these signals activates the retrigger multivibrator 8. (Figure 2e),
The pulse drive circuit 10 is operated to drive the ferrite switch 11. Therefore, with this circuit, it is possible to generate a signal for reselecting the ferrite switch and the monitor circuit, and it is possible to match the states of the ferrite switch and the monitor circuit.

Note that the retrigger multivibrators 7 and 8 may be of conventional pulse width as long as they form a pulse signal with a width that can drive the ferrite switch 11, and the delay circuits 14 and 17 may be of the type shown in FIG. 2d. Any delay amount may be used as long as the waveform has a delay amount τ that can drive the retrigger multivibrators 7 and 8, and such a delay circuit can be easily constructed with a time constant circuit consisting of a resistor and a capacitor.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of an embodiment of the present invention, Figure 2 a~
e is an operating waveform diagram of FIG. 1. In the figure, 1, 2, 13, 15, 16, 18
...Inverting amplifier, 9,10...Drive circuit, 11...
...Ferrite switch, 12...AND circuit, 1
4, 17...Delay circuit.

Claims (1)

[Scope of utility model registration request] a first switching circuit that outputs on/off signals that are mutually inverted as first and second switching signals corresponding to the switching operation; and a third switching circuit that is turned on under control independently of the first switching circuit. and the fourth
second and third switching circuits that respectively output switching signals; and when one of the third and fourth switching signals is turned on, the first and second switching circuits
a logic circuit that turns off each of the switching signals; and first and second delay circuits that apply a predetermined delay to each of the third and fourth switching signals and output them as first and second delayed signals, respectively; A first operation signal that turns on a first switching signal output from the logic circuit by the first delay signal and a second switching signal output from the logic circuit by the second delay signal. first and second gate circuits that respectively output a second operation signal that turns on when the gate is turned on; 1
and a second pulse circuit, and first and second drive circuits that connect the outputs of these pulse circuits to one end and the other end of the ferrite switch, respectively, and drive switching of the ferrite switch. circuit.