JPS6340072B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a facsimile transmitter that adjusts the amplitude of an image signal according to changes in the light amount and density in order to eliminate the influence of changes in the light amount of a light source and the density of the background of a document. This invention relates to an automatic contrast correction circuit that automatically corrects the contrast.

Generally, in a facsimile transmitter, in order to eliminate the effects of light intensity changes due to the rise characteristics and aging of a light source such as a fluorescent light that illuminates the original, and changes in the density of the background of the original, the above-mentioned light intensity changes and density It is necessary to correct the amplitude of the image signal according to the change.

FIG. 1 shows a conventional automatic contrast correction circuit that performs such correction. To explain this, 1 is a variable amplifier that amplifies the analog image signal a obtained by reading and scanning a document, and 2 is a variable amplifier 1.
This is a peak hold circuit that holds the peak value (i.e., background level) in one line of the output b. Then, the amplification degree of the variable amplifier 1 is controlled according to the peak value c held in the peak hold circuit 2, so that the output b of the variable amplifier 1 is adjusted according to changes in light amount and density of the background of the document. An image signal whose amplitude has been corrected is obtained.

However, since such conventional contrast correction circuits have an analog circuit configuration, they have a drawback of low reliability against component variations.

Furthermore, when reproducing halftones, it is necessary to fix the amplification degree for the image signal to be corrected in one page to an appropriate value, but the conventional contrast correction circuits described above have the drawback of being difficult to do this. .

The present invention has been made in order to eliminate the above-mentioned drawbacks of the conventional art, and by performing digital control, it is less susceptible to the effects of component variations, and when reproducing halftones, it adjusts the amplification degree to the image signal to be corrected to an appropriate level. It is an object of the present invention to provide an automatic contrast correction circuit that can easily fix a value and has a fast convergence operation.

The automatic contrast correction circuit according to the present invention amplifies an analog image signal to be corrected by an amplification means, converts it into a digital image signal by an A/D conversion means, and calculates the peak value of each M line of this digital image signal. is detected, and the amplification degree of the amplification means for each M line (including cases of 1 or less) is determined by comparing the peak value of the digital image signal in the previous M line and the amplification degree of the amplification means for the previous M line. The contrast is automatically corrected by controlling based on both the amplification degree and the amplification degree.

The present invention will be explained in more detail below based on embodiments shown in the drawings.

FIG. 2 shows an automatic contrast correction circuit according to an embodiment of the present invention, and FIG. 3 shows a signal waveform diagram in the same circuit.

In FIG. 2, reference numeral 3 denotes an analog image signal input terminal, into which an analog image signal a obtained by reading and scanning a document is input. 4 is an attenuator that inputs the analog image signal a from the analog image signal input terminal 3, and this attenuator 4 attenuates the analog image signal a by the output (digital value) of the latch 5 input to its control input terminal. rate controlled. Reference numeral 6 denotes an amplifier that amplifies the output of the attenuator 4 at a constant amplification degree, and in this embodiment, this amplifier 6 and the attenuator 4 constitute an amplifying means. 7 is an N-bit A/R which inputs the output e of the amplifier 6 through the level shift circuit 8.
The level shift circuit 8 is a D converter, and the level shift circuit 8 is used to match the output level of the amplifier 6 to the input condition of the A/D converter 7.

A comparator 9 compares the N-bit digital image signal f output from the A/D converter 7 with the N-bit output g of the counter 10 for each pixel. 1
Reference numeral 1 denotes a sampling period control gate which receives the output of the comparator 9 and the document period signal h, and the output of this gate 11 is inputted to the counter 10.
Note that the document section signal h is at a high level (hereinafter abbreviated as H) only in the document section.
i is a one-line section signal, and the counter 10
is reset to a certain value at the beginning of one line by this one line section signal i.

12 is a ROM, which uses the output g of the counter 10 and the output d of the latch 5 as address inputs;
Outputs a digital value corresponding to the same address input. The latch 5 holds the output of the ROM 12 during one line.

In this automatic contrast correction circuit, the analog image signal a is attenuated by an attenuator 4 at an attenuation rate corresponding to the output d of the latch 5, then amplified by an amplifier 6 at a constant amplification degree, and further amplified by a level shift circuit. After being level shifted by 8, A/
Each pixel is quantized into N bits by the D converter 7, and is made into a digital image signal f.

The comparator 9 compares the digital image signal f with the output g of the counter 10, and outputs the digital image signal f.
Only when is larger, signal j is output. This signal j passes through the gate 11 and is input as a clock to the counter 10 only while the document section signal h is at "H". And this counter 10 is the gate 1
Count up the signal j input through 1. As mentioned above, the counter 10 is reset for each line by the 1-line section signal i, so the counter 10 is reset by the count-up.
The output g eventually comes to indicate the peak value (that is, the background level) for each line of the digital image signal f.

The ROM 12 inputs the peak value indicated by the output g of the counter 10 and the attenuation rate of the attenuator 4 for the previous line indicated by the output d of the latch 5 (hereinafter simply referred to as the attenuation rate) as addresses, and stores both values. Based on this, the attenuation factor for the next line is output. Then, the latch 5 receives the 1-line section signal i of the previous line.
At the rising edge of , the attenuation rate for the next line is newly latched, and the attenuator 4 attenuates the analog image signal a of the next line using the newly latched attenuation rate.

Therefore, in this embodiment, the attenuation rate for each line is determined based on both the peak value of the digital image signal f of the previous line and the attenuation rate for the previous line.

If the attenuation rate for each line is determined based only on the peak value of the digital image signal f of the previous line, the attenuation rate for each line will be optimal if the fluctuation of the peak value for each line is large. There may be cases where the value does not converge. However, as in this embodiment, if the attenuation rate for each line is determined based on both the peak value of the previous line and the attenuation rate for the previous line, the above-mentioned disadvantage can be solved.

Note that the attenuation rate for each line output from the ROM 12 is specifically set as follows. That is, assuming that the reference value of the peak value of the analog image signal a is 4 [V] and that the appropriate attenuation rate when the peak value is the reference value is A1, the following equation holds true.

4 [V] (peak value of a) x A1 x Z =4 [V] (peak value of e) (1) However, Z is the amplification degree of the amplifier 6.

If the attenuation rate for a certain line is A1, and the peak value of the output e of the amplifier 6 on that line is V _p1 , then the attenuation rate A2 for the next line is such that the value of the analog image signal a is V _p1 . Sometimes it is necessary to set the output e of the amplifier 6 to 4V. Therefore, V _p1 ×A2 × Z = 4 [V] (2) From equations (1) and (2), A2 = 4 [V] × A1 / V _p1 (3). If the peak value of the digital image signal f corresponding to V _p1 is V' _p1 , then A2=K×A1/V' _p1 (4). However, K is a constant.

Therefore, in this example, formula (4) is generalized to
The attenuation rate Ai for each line is determined by the following formula.

Ai=K×Ai-1/V' _pi-1 (5) Here, Ai and Ai-1 are i and (i-1) respectively
The attenuation rate of the line, _V'p1 , is the peak value of the digital image signal f of the (i-1)th line.

Note that in the embodiments shown in FIGS. 2 and 3, the counter 1
Since the output g of 0 follows the peak value of one line one level at a time, it is possible to detect an average peak value with the effects of fine white signals and noise removed.

FIG. 4 shows 1
2 shows an automatic contrast correction circuit according to another embodiment of the invention for detecting the peak value of a line, in which the same parts as in the previous embodiment are designated with the same reference numerals.

13 is a latch which receives the digital image signal f output from the A/D converter 7; The digital comparator 9 compares the output k of the latch 13 with the level of the digital picture signal f, and outputs the signal j only when the level of the digital picture signal f is higher.

The signal j passes through the gate 11 only while the amplification interval signal h is "H", and causes the latch 13 to newly latch the digital image signal f input at that time. Further, the latch 13 is reset for each line by the one line section signal i.

Therefore, the output k of the latch 13 quickly follows the peak value of the digital image signal f in one line. However, in the case of this embodiment, there may be cases where the signal is affected by a fine white signal or a raise.

In each of the above embodiments, the attenuation rate is changed for each line, but the peak value of the digital image signal is detected every M lines (M is a natural number of 2 or more), and the attenuation rate is changed every M lines. The degree of amplification for the analog image signal may be changed.

In addition, when scanning the same line repeatedly, as in the case of a facsimile machine with variable sub-scanning speed, the basic operation of the present invention is to scan the next line based on the peak value of the previous line and the degree of amplification with respect to the previous line. The amplification degree can be stabilized by extending the operation of determining the amplification degree for a line to the image signals obtained each time the same line is read.

That is, regarding the same line, the operation of determining the amplification degree for the next reading based on both the peak value of the digital image signal obtained in the previous reading and the amplification degree in the previous reading is performed an appropriate number of times. By this, the amplification degree can be stabilized by converging the amplification degree and actually using only the digital image signal obtained by the amplification degree in this converged state.

As described above, by performing digital control, the automatic contrast correction circuit according to the present invention is less susceptible to the effects of component variations, and when reproducing halftones, it is easy to adjust the amplification degree for the image signal to be corrected to an appropriate value. It can be fixed at

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional automatic contrast correction circuit, FIG. 2 is a block diagram showing an automatic contrast correction circuit according to an embodiment of the present invention, FIG. 3 is a signal waveform diagram in the same circuit, and FIG. 4 is a block diagram showing an automatic contrast correction circuit according to an embodiment of the present invention. FIG. 3 is a block diagram illustrating an automatic contrast correction circuit according to another embodiment of the present invention. 4...Attenuator, 5...Latch, 6...Amplifier, 7...
A/D converter, 9... Digital comparator, 10... Counter, 11... Sampling period control gate, 1
2...ROM, 13...latch, a...analog image signal, f...digital image signal.

Claims (1)

[Claims] 1. an amplification degree control means, an amplification means for amplifying an analog image signal obtained by reading a document with an amplification degree corresponding to a digital value outputted from the amplification degree control means, and A/D conversion means for converting the analog image signal into a digital image signal;
(where M is a natural number) peak value detection means for detecting the peak value for each line, and the amplification degree control means detects the digital value for each M line,
An automatic contrast correction circuit that determines the contrast based on both the peak value in the previous M line detected by the peak value detection means and the digital value for the previous M line.