JPS6339145B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image quality adjustment circuit in a video amplification circuit of a television receiver.

Conventionally, the image adjustment of a television receiver is adjusted by contrast, and when the image signal is small, the contrast is low, and when the image signal is large, the contrast is increased, and in order to further increase the apparent resolution, the image is output using a second-order differential circuit. The signal had a preshoot and an overshoot. However, the amount of peaking due to preshoot/overshoot has been determined at a constant rate regardless of the level of the video signal. However, from a blooming and visual point of view, when the contrast is large, it is desirable that the peaking amount ratio is lower than when the contrast is small. However, since the peaking amount is set at a fixed ratio, If the amount of peaking is set to the optimum level, when there is a lot of contrast, the amount of peaking at that time will be larger than necessary, resulting in blooming, in which the outline of white characters on the TV screen becomes blurred. Furthermore, if the peaking amount is set to the optimum level when the contrast is high, when the contrast is low, the amount of peaking ends up being less than necessary.

The purpose of the present invention is to reduce the peaking amount, whose increasing rate is inversely proportional to the level of the video signal, because the visual amount of resolution that humans feel when looking at a television screen, that is, the perceived amount, increases in proportion to the contrast. By providing an automatic setting circuit, that is, an image quality adjustment circuit, the present invention attempts to obtain good image quality by always obtaining the optimum amount of peaking.

The gist of the present invention is shown in FIG. 1 using a block diagram.

In the figure, 1 and 2 are differential amplifiers, 3,
4 is a current source, 5 is a load resistor, 6 is a high pass filter (hereinafter referred to as HPF), 7 is a low pass filter (hereinafter referred to as LPF), and 8 is a matrix.

Video signal A is transmitted through differential amplifier 1 and differential amplifier 2.
and a current source 3 having a variable resistor VR1 that supplies current to the differential amplifier 1 and controls image quality.
given to. The differential amplifier 2 has a current source 4 that supplies current, is differentially connected to the differential amplifier 1, and has a load resistor 5 common to each output stage, and the output signal from the load resistor 5 is The signal is input to the HPF 6 and subjected to second-order differentiation, allowing only high frequency components to pass and input to one side of the matrix 8. Also, the video signal from current source 3 is LPF7
is input into the matrix 8, and by integrating it, only the low frequency component is passed and input into the other matrix 8, and the output of the matrix 8 becomes a video output signal D having a peaking amount. The peaking amount of the video signal A generated via the current source 3 is controlled in inverse proportion to the level of the video signal applied to the differential amplifier 1 and the differential amplifier 2. The video signal components applied to each input terminal of the load resistor 5 cancel each other out and are not generated at the output terminal of the load resistor 5.

An embodiment of the present invention is shown in FIG. 2 below.

FIG. 2 is a detailed circuit diagram of an embodiment of the invention.

In the figure, TR1 to TR3, TR1' to TR3'
are transistors, E ₁ to _{E 4} are DC power supplies, R ₁ to R ₇ ,
R ₁ ′, R ₂ ′, and R ₄ ′ are fixed resistors, VR1 is a variable resistor, C ₁ to C ₄ are capacitors, and L ₁ and L ₂ are coils.

Differential amplifier 1 includes NPN transistor TR2,
The differential amplifier 2 consists of NPN transistors TR2' and _{TR3 '} , which are in a symmetrical relationship with each other. It is applied to the base of transistor TR2' via R ₂ ', and a positive bias is applied via resistor R ₃ by DC power supply E ₂ . The current source 3 consists of an NPN type transistor TR1,
The emitter of TR1 is grounded through resistor R4 and through a series connection with capacitor _C3 and variable resistor VR1. Current source 4 is
It consists of an NPN type transistor TR1', and the emitter of TR1' is grounded via a resistor _R4 '. TR1
A positive bias is applied to the base of TR1' by DC power supply _E1 through resistors _R1 and _R1 ', respectively, and the base of TR1 is further supplied with a video signal A.
is added through capacitor _C2 . The collector of TR1 is connected to the emitters of TR2 and TR3, respectively, and the collector of TR1' is connected to the emitters of TR2' and TR3, respectively.
Each is connected to the emitter of TR3'. TR2
The collectors of are connected to the collectors of TR3′, and a positive DC voltage E ₃ is applied to these collectors.
It is further connected to the collectors of TR3 and TR2' via resistor _R5 . These TR3 and TR
A series circuit of coil L ₂ and capacitor C ₄ , which are components of HPF 6, is connected to the collector of 2'.
A coil _L1 , which is a component of LPF7, is connected to the emitter of TR1, and the other end of the series circuit of the coil _L2 and capacitor _C4 is connected to the other end of the coil _L1 , and a resistor R is connected to the emitter of TR1. ₆ to ground, and the final output signal is taken from this connected point, ie the high potential point of resistor R ₆ .

Here, HPF6 is a second-order differentiating circuit, which is composed of resistor _R5 , coil _L2 , capacitor _C4 , and resistor _R6 , and is differentiated once by resistor _R5 and coil _L2 , and is differentiated once by resistor R5 and coil _L2 . The LPF ₇ is an integrating circuit, and the coil L ₁ and resistor R ₆ pass only the low frequency component signal. Note that the variable resistor VR1 is used for image quality control.

Next, the operation of this image quality adjustment circuit will be explained.

In addition, FIG. 3 is a main signal waveform diagram, where A is for the conventional case, B is for the embodiment of the present invention, the broken line is for the steady state where the level of the video signal _e0 is low, and the solid line is for the steady state. This is the case when the level of the video signal _e0 in the steady state is increased, where _e1 is the output level of LPF7, _e2 is the output level of HPF6, and _e3 is the LPF
7. Indicates the final output level to which the output of the HPF 6 has been added, that is, the level of the video output signal D having the amount of peaking.

Here, the sensing amount is expressed as a ratio of the output level e ₂ of the HPF 6 to the output level e ₁ of the LPF 7,
Regarding the sensing amount Nα in a steady state, that is, when the video signal level is e ₀ 〓, the conventional case and the case using the circuit of the present invention are considered in the same case.

In a steady state, if i ₁ is the current flowing between the collector and emitter of TR2, and i ₂ is the current flowing between the collector and emitter of TR3, the magnitudes of i ₁ and i ₂ are equal. Further, the gain G related to TR1 of the current source 3 to which the video signal e ₀ is input is supported by the following equation.

G = i ₂ · R ₅ / (i ₁ + i ₂ ) · VR1 ... (1) Next, when the level of the video signal e ₀ increases from the steady state and reaches e ₀ 〓, the current i ₁ increases and TR2 and
Since TR3 constitutes a differential amplification, current i ₂ decreases by the increase in current i ₁ , and as a result, according to equation (1),
The gain of TR1 decreases, the video signal generated across resistor R5 decreases, and the output level of HPF6 e ₂
becomes a low level e ₂ 〓 compared to e ₂ 〓 when the gain of TR1 does not change. Note that since the current flowing between the collector and emitter of transistor TR2' is increased by an amount corresponding to the decrease in current _i2 , HPF6
The signal outputted to the current source 3 is only the video signal component input to the current source 3, with the video signal e ₀ input to the bases of TR2 and TR2' and the alternating current component contained in that signal being mutually canceled. Also,
The output level e ₁ of LPF7 is determined from e ₁ 〓 in steady state.
e increases to ₁ 〓.

In other words, in the conventional circuit, the sensing amount in a steady state is N 〓, and the sensing amount when the video signal e ₀ increases is N 〓.
Then, e ₂ 〓 / e ₁ 〓 = e ₂ 〓 / e ₁ 〓 ⇒ N 〓 = N 〓 , and the sensing amount in the steady state in the circuit of the present invention is N ro α and the video signal e ₀ The sensing amount when increasing is N
If ro β, then e ₂ 〓/e ₁ 〓＞e ₂ 〓/e ₁ 〓⇒Nroα＞Nroβ……(2). In other words, according to equation (2), the sensing amount is inversely proportional to the increase in the video signal e ₀ .

As described above, in the image quality adjustment circuit of the present invention, the sensing amount, that is, the amount of peaking, changes in inverse proportion to the video signal level, so the amount of image quality compensation can be automatically controlled for screens with high contrast and screens with low contrast.
In addition, it is possible to compensate for image quality blooming and image quality deterioration at low contrast, so it is possible to obtain optimal image quality for any video signal level.

[Brief explanation of the drawing]

FIG. 1 is a block diagram schematically showing the circuit of the present invention;
FIG. 2 is a detailed circuit diagram of an embodiment of the present invention, and FIG. 3 is a main signal waveform diagram. 1, 2: Differential amplifier, 3, 4: Current source, 5: Load resistance, 6: High pass filter, 7: Low pass filter, A: Video signal,
B: low-pass filter output, C: high-pass filter output, D: video output signal with peaking amount.

Claims (1)

[Claims] 1 a pair of differential amplifiers 1 with a common load resistance 5
and 2 have respective current sources 3 and 4, a first input means for inputting the video signal A to the input terminals of the differentially operating amplifiers 1 and 2, respectively; second input means for inputting the video signal A to the source 3; and a high-pass filter for extracting high-frequency components from the output signal, the rate of increase obtained from the common load resistor 5 being inversely proportional to the strength of the video signal A. and a low-pass filter for extracting a low-frequency component of the video signal A from the output end of the current source 3, and an output means for adding the low-frequency component and the high-frequency component. circuit.