JPS6338234A - Manufacture of substrate for semiconductor element - Google Patents
Manufacture of substrate for semiconductor elementInfo
- Publication number
- JPS6338234A JPS6338234A JP18226186A JP18226186A JPS6338234A JP S6338234 A JPS6338234 A JP S6338234A JP 18226186 A JP18226186 A JP 18226186A JP 18226186 A JP18226186 A JP 18226186A JP S6338234 A JPS6338234 A JP S6338234A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- layer
- thin film
- etching
- oxygen ion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 78
- 239000004065 semiconductor Substances 0.000 title claims description 23
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000005530 etching Methods 0.000 claims abstract description 46
- 238000000034 method Methods 0.000 claims abstract description 46
- 239000010409 thin film Substances 0.000 claims abstract description 42
- 239000001301 oxygen Substances 0.000 claims abstract description 31
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 31
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 21
- 239000010408 film Substances 0.000 claims abstract description 19
- -1 oxygen atom ions Chemical class 0.000 claims abstract description 11
- 238000005498 polishing Methods 0.000 claims abstract description 11
- 239000000463 material Substances 0.000 claims abstract description 3
- 238000005468 ion implantation Methods 0.000 claims description 15
- 239000013078 crystal Substances 0.000 claims description 14
- 239000003795 chemical substances by application Substances 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 15
- 229910052681 coesite Inorganic materials 0.000 abstract description 8
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 8
- 239000012535 impurity Substances 0.000 abstract description 8
- 229910052682 stishovite Inorganic materials 0.000 abstract description 8
- 229910052905 tridymite Inorganic materials 0.000 abstract description 8
- 239000000377 silicon dioxide Substances 0.000 abstract description 7
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 7
- YCIMNLLNPGFGHC-UHFFFAOYSA-N catechol Chemical compound OC1=CC=CC=C1O YCIMNLLNPGFGHC-UHFFFAOYSA-N 0.000 abstract description 6
- 239000007789 gas Substances 0.000 abstract description 6
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract description 6
- PIICEJLVQHRZGT-UHFFFAOYSA-N Ethylenediamine Chemical compound NCCN PIICEJLVQHRZGT-UHFFFAOYSA-N 0.000 abstract description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract description 2
- 230000001590 oxidative effect Effects 0.000 abstract 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 20
- 229910052796 boron Inorganic materials 0.000 description 17
- 239000000243 solution Substances 0.000 description 11
- 125000004429 atom Chemical group 0.000 description 10
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 8
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 6
- 125000004430 oxygen atom Chemical group O* 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 239000005360 phosphosilicate glass Substances 0.000 description 3
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011259 mixed solution Substances 0.000 description 2
- 235000011118 potassium hydroxide Nutrition 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- AVPRDNCYNYWMNB-UHFFFAOYSA-N ethanamine;hydrate Chemical compound [OH-].CC[NH3+] AVPRDNCYNYWMNB-UHFFFAOYSA-N 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 210000004185 liver Anatomy 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
(+lI[要〕
半lり体幸子形成用基板となる5ilicon on
InsuIator(以下501 と称する)構造の
形成法の一種である単結晶薄膜転回法であって、
Sol構造を構成する該薄膜層に不純物原子の混入や、
薄膜表面に発41゛する凹凸現象を防止した方法である
。[Detailed description of the invention]
The single-crystal thin film rotation method is a type of method for forming the InsuIator (hereinafter referred to as 501) structure, which involves mixing impurity atoms into the thin film layer constituting the Sol structure,
This method prevents the unevenness phenomenon that occurs on the surface of a thin film.
即ち、シリ二17の薄膜層を形成したシリコン基板を転
写基板に接着した後、該シリコン基板を裏面側より除去
するためのエツチングの際のエツチングストッパーとし
て酸素イオン注入層を用いることで、シリコンの薄膜層
に不純物原子が導入されるのをを防1トするとともに、
酸素イオン注入層はエツチングするが、薄I―層はエツ
チングしないような酸素イオン注入層と薄Ili層との
間のエツチングの選択比の大きいエツチング液を用いた
メカノケミカルポリッシング法を用いて、酸素イオン注
入層を除去することで、高品質で平坦なシリコンの薄膜
層を有するSol構造を得るようにする。That is, after bonding a silicon substrate on which a thin film layer of silicon 2 17 is formed to a transfer substrate, an oxygen ion implantation layer is used as an etching stopper during etching to remove the silicon substrate from the back side. In addition to preventing impurity atoms from being introduced into the thin film layer,
Using a mechanochemical polishing method using an etching solution with a high etching selectivity between the oxygen ion implanted layer and the thin Ili layer, the oxygen ion implanted layer is etched but the thin I layer is not etched. Removal of the ion implantation layer results in a Sol structure with a high quality and flat thin layer of silicon.
本発明は501構造の形成方法の一種であるSiの単結
晶薄膜転回法に係り、特に該薄膜層に不純物原子が導入
されず、かつ該薄膜層が平坦に形成されるようにした半
導体素子形成用基板の製造方法に関する。The present invention relates to a Si single-crystal thin film rotation method, which is a type of method for forming a 501 structure, and particularly relates to the formation of a semiconductor element in which impurity atoms are not introduced into the thin film layer and the thin film layer is formed flat. The present invention relates to a method of manufacturing a substrate for use in a computer.
絶縁性基板上にSiの薄膜単結晶層を形成したSOI構
造に半導体素子を形成すると、従来のようにSiの結晶
に半導体素子を形成する場合のLOCO8法やP −N
接合形成法のように、高集積化や高速化を妨げるような
素子分離法を採用する必要がなく、またこれにCMO3
半導体装置を形成した場合にも、Si基板にCMO3半
導体装置を形成した場合に生し易いラッチアップ現象も
発生しない。When a semiconductor element is formed in an SOI structure in which a thin single crystal layer of Si is formed on an insulating substrate, it is difficult to form a semiconductor element using the conventional LOCO8 method or P-N method when forming a semiconductor element on a Si crystal.
Unlike the junction formation method, there is no need to use element isolation methods that impede higher integration and higher speeds, and CMO3
Even when a semiconductor device is formed, the latch-up phenomenon that tends to occur when a CMO3 semiconductor device is formed on a Si substrate does not occur.
また高集積化D RA MfcSi基板に形成した際に
η、しるα線等の放射線によるソフトエラー現象も防1
1−できる。It also prevents soft error phenomena caused by radiation such as η and alpha rays when formed on a highly integrated DRA MfcSi substrate.
1-I can.
このような501構造を実現するには絶縁性基板の−1
−に多結晶のSiの薄膜層を形成後、これをレーザアニ
ールしてSlの単結晶とするレーザアニール法や、S
i di結晶内部に部分的に酸化膜領域を形成し、表面
を能動領域とする方法等があるが、いずれも大面積のS
ol構造が形成されななかったり、結晶性が悪いといっ
た問題がある。To realize such a 501 structure, -1 of the insulating substrate
- a laser annealing method in which a thin film layer of polycrystalline Si is formed on the substrate and then laser annealed to form a single crystal of Si;
There are methods such as forming an oxide film region partially inside the i di crystal and using the surface as an active region, but all of these methods require a large area of S.
There are problems in that an ol structure is not formed and the crystallinity is poor.
そのためSi基板にエッチストッパーとなる層を形成し
た後、その十にSiの薄In結晶を形成し、これを絶縁
性基板に接着した後、Si基板を裏面側より除去する薄
膜転写法が、大面積のSol構造を得る方法として有望
視されている。Therefore, after forming a layer to serve as an etch stopper on a Si substrate, a thin In crystal of Si is formed on top of the layer, which is then bonded to an insulating substrate, and then the Si substrate is removed from the back side. This method is seen as a promising method for obtaining an area-wide Sol structure.
このような薄膜転写法を用いた従来の方法について第7
図より第12図迄を用いて説明する。Regarding the conventional method using such thin film transfer method, Part 7
This will be explained using the figures up to FIG. 12.
第7図に示すように、Siの単結晶基板Iの表面近傍に
111のエツチング液程の際のストッパーとなるための
ボロン(B)原子を高1度にイオン注入した高濃度ボロ
ン注入層2を形成する。As shown in FIG. 7, a high-concentration boron implanted layer 2 in which boron (B) atoms are ion-implanted at a high degree to serve as a stopper during the etching of 111 in the vicinity of the surface of a Si single-crystal substrate I. form.
次いで第8図に示すように、高1度ボロンt[入屓2上
に単結晶のSi薄膜層3を形成する。Next, as shown in FIG. 8, a single crystal Si thin film layer 3 is formed on the high 1 degree boron t film 2.
次いで第9図に示すように、このSi薄膜N3上に化学
的気相成長(CV D)法によりSiO2層4を形成す
る。Next, as shown in FIG. 9, a SiO2 layer 4 is formed on this Si thin film N3 by chemical vapor deposition (CVD).
次いで第10図に示すように、このSiO2層4」二に
接着剤5を塗布し、他の絶縁性の転写基板6に5i02
N4を対向させた状態で接着する。Next, as shown in FIG. 10, adhesive 5 is applied to this SiO2 layer 4''2, and 5i02
Glue with N4 facing each other.
この転写基板6に接着する方法は、このSi02層4」
二に燐珪酸ガラス(PSG)膜を形成後、このSiO2
層4と転写基板6とを対向するようにしで、psGI!
t+を溶融することでも接合できる。The method of adhering to this transfer substrate 6 is this Si02 layer 4.
After forming a phosphosilicate glass (PSG) film on the second layer, this SiO2
With the layer 4 and the transfer substrate 6 facing each other, psGI!
Bonding can also be achieved by melting t+.
次いで第11図に示すように、転写基板6に固定された
Si基板1を裏面側から研磨して薄膜状態にする。Next, as shown in FIG. 11, the Si substrate 1 fixed to the transfer substrate 6 is polished from the back side to form a thin film.
そして更にカセイカリ(KOH) とイソプロピルアル
:I−ルと水との混合液でエツチングすることで、工・
7チングストノパーの高濃度ボロン注入層2に到達した
段階でエツチングが停止する。Furthermore, by etching with a mixture of caustic potash (KOH), isopropyl alcohol, and water,
Etching is stopped when reaching the high concentration boron implanted layer 2 of 7-etching stonoper.
ここで、上記したエツチング液を用いた場合、O
ボロンの原子濃度が10/cm’以上の高濃度のボロン
注入層がエツチングされる速度は、ボロン濃度が10/
cm”以下のSi基板のエツチング速度の1750程度
である。Here, when the above-mentioned etching solution is used, the rate at which a boron implanted layer with a high concentration of O boron atomic concentration of 10/cm' or more is etched is as follows:
This is about 1750 times the etching rate of a Si substrate with a diameter of less than 1,750 cm.
つまり51基板と高濃度ボロン注入層との間の工シチン
グの選択比は50である。In other words, the etching selectivity between the 51 substrate and the high concentration boron implanted layer is 50.
次いで第12図に示すように、弗化水素酸(肝)と酢酸
(C83COO11) と硝酸(11NOa )の混合
液をエツチング液として用いて高濃度ボロン注入層2を
選択的にエツチングする。Next, as shown in FIG. 12, the high concentration boron injection layer 2 is selectively etched using a mixed solution of hydrofluoric acid (liver), acetic acid (C83COO11) and nitric acid (11NOa) as an etching solution.
ここでこのエツチング液を用いて高1度ボロン注入層が
エツチングされる速度は、Siの薄膜層がエツチングさ
れる速度の70倍位である。The rate at which the high-degree boron implanted layer is etched using this etching solution is about 70 times the rate at which the Si thin film layer is etched.
つまり高1度ボロン注入層とSiの薄膜層の間のエツチ
ングの選択比は70である。In other words, the etching selectivity between the high 1 degree boron implant layer and the Si thin film layer is 70.
然し、このような従来の方法では、ボロン原子を高1度
に添加した高1度ボロン層をエツチングのストッパーと
して用いており、このボロン原子は、高1度ボロン層を
形成後、単結晶Si薄H―層3を形成する際の気相成長
工程や、更にその上に5i02層4を形成する際のCV
D工程の加熱工程によってB原子がSi基板1や、或い
は形成されたSi薄膜層3に拡散する恐れがあり、高濃
度ボロン注入層2内に占めるB原子の濃度が低下してエ
ンチングストッパーの働きをしなくなったり、或いはこ
のB原子がSi薄欣層3内に拡散してその薄膜の特性を
変化さ・Uる問題がある。However, in such conventional methods, a high-degree boron layer doped with boron atoms at a high degree is used as an etching stopper, and after forming the high-degree boron layer, these boron atoms are added to single crystal Si. Vapor phase growth process when forming the thin H-layer 3 and CV when forming the 5i02 layer 4 on top of it
There is a possibility that B atoms will diffuse into the Si substrate 1 or the formed Si thin film layer 3 due to the heating process in step D, and the concentration of B atoms in the high concentration boron implanted layer 2 will decrease, causing the etching stopper to deteriorate. There is a problem that the B atoms may stop working, or the B atoms may diffuse into the Si thin layer 3, changing the properties of the thin film.
またこの方法では、Si基板と高濃度ボロン注入層、お
よび高1度ボロン注入層とSiM膜層の間のエツチング
の選択比が今一つ充分でなく、そのため、高1度ボロン
注入層2を除去した後のSi薄膜層30表面が荒れたり
、或いは凹凸が生したりして平坦な表面が得られない問
題がある。In addition, in this method, the etching selectivity between the Si substrate and the high-concentration boron implantation layer, and between the high-1 degree boron implantation layer and the SiM film layer is not sufficient, so the high-1 degree boron implantation layer 2 is removed. There is a problem that the surface of the subsequent Si thin film layer 30 becomes rough or uneven, making it impossible to obtain a flat surface.
そのため、この薄膜転写法によって形成されたるSol
構造を半導体装置形成のための基板として用いるは今一
つ実用性に乏しい。Therefore, the Sol formed by this thin film transfer method
Using the structure as a substrate for forming a semiconductor device is less practical.
本発明は上記した問題点を除去し、Si薄膜層に不純物
原子が導入されなくて、かつその薄膜層の表面が鏡面状
態のように平坦に得られるようなSOr構造の形成方法
の提供を目的とする。The present invention aims to eliminate the above-mentioned problems and provide a method for forming an SOr structure in which impurity atoms are not introduced into the Si thin film layer and the surface of the thin film layer can be obtained as flat as a mirror surface. shall be.
本発明の半導体装置の製造方法は、半導体基板に酸素イ
オンを注入する工程、
該酸素イオンを注入した半導体基板表面に該基板と同一
材料の薄膜層を形成する工程、上記薄膜層の表面を転写
基板に対向して接着する工程、
上記酸素イオン注入層をエツチングのストッパーとして
上記半導体基板の裏面側より基板をエツチングする工程
、
上記酸素イオン注入層はエツチングするが、薄膜層は工
・ジチングしないエツチング液を用いて、上記酸素イオ
ン注入層をメカノケミカルポリッシングにより除去する
工程を含む。The method for manufacturing a semiconductor device of the present invention includes a step of implanting oxygen ions into a semiconductor substrate, a step of forming a thin film layer of the same material as the substrate on the surface of the semiconductor substrate into which the oxygen ions have been implanted, and a step of transferring the surface of the thin film layer. A step of adhering the semiconductor substrate facing the substrate, a step of etching the substrate from the back side of the semiconductor substrate using the oxygen ion implanted layer as an etching stopper, an etching step in which the oxygen ion implanted layer is etched but the thin film layer is not etched or etched. The method includes a step of removing the oxygen ion-implanted layer by mechanochemical polishing using a liquid.
本発明の方法はエツチングのストッパーとして従来の高
1度ボロン注入層に代わって酸素原子がイオン注入され
たSiNを用いており、この酸素原子はSi基板に注入
した際、酸素原子がSiと化合物を作る形となって、そ
の後の熱処理工程に於いてもボロン原子のようにStの
薄膜層内に拡散することがな(、Siの薄膜層の特性を
tiなうことがない。The method of the present invention uses SiN ion-implanted with oxygen atoms as an etching stopper in place of the conventional high-degree boron implanted layer, and when these oxygen atoms are implanted into the Si substrate, the oxygen atoms form a compound with Si. As a result, during the subsequent heat treatment process, they do not diffuse into the St thin film layer like boron atoms (and do not change the characteristics of the Si thin film layer).
またSiの基板を裏面側よりエツチングする際、Si基
板と酸素イオン注入層の間のエツチングの選択比が25
00と高い値を示す、エチレンジアミンと水とパイロカ
テコールの混合液のエツチング液を用いて31基板をエ
ツチングする。Furthermore, when etching a Si substrate from the back side, the etching selectivity between the Si substrate and the oxygen ion implanted layer is 25.
The 31 substrate is etched using an etching solution of a mixed solution of ethylenediamine, water, and pyrocatechol, which exhibits a high value of 0.00.
またSiの薄膜層とエツチングストッパーとして形成さ
れたSiの酸素イオン注入層とをエツチングに依って分
離する際、弗化水素酸と水の混合液のエツチング液を用
いるとSiの酸素イオン注入層は素早くエツチングされ
るが、SiO薄映層は殆どエツチングされない、高選択
比を有するエツチング液が使用できるので、エツチング
の制御が容易でしかも表面が平坦なSiの薄膜層が得ら
れる。Furthermore, when separating the Si thin film layer and the Si oxygen ion-implanted layer formed as an etching stopper by etching, if an etching solution of a mixture of hydrofluoric acid and water is used, the Si oxygen ion-implanted layer can be separated. Since it is possible to use an etching solution with a high selectivity that is quickly etched but hardly etches the SiO thin film layer, etching can be easily controlled and a Si thin film layer with a flat surface can be obtained.
またメカノケミカルポリッシング法で、Siの薄膜層の
表面近傍の5inXiff(0<x <2)の領域も除
去できるので、最終的に得られるSol構造は非常に高
品質なものが得られる。Furthermore, since the mechanochemical polishing method can also remove the 5 in Xiff (0<x<2) region near the surface of the Si thin film layer, the final Sol structure obtained is of very high quality.
以下図面を用いて本発明の一実施例につき詳細に説明す
る。An embodiment of the present invention will be described in detail below with reference to the drawings.
第1図に示すように、半導体基板として的1¥が2イン
チのSiウェハを用い、このSi基板11の表面側より
200KeVの加速電圧で、ドーズ量が2 XIO”/
cI112の条件で酸素原子のイオン注入を行った。As shown in FIG. 1, a Si wafer with a 2-inch target is used as a semiconductor substrate, and an acceleration voltage of 200 KeV is applied from the surface side of this Si substrate 11, and a dose of 2 XIO''/
Ion implantation of oxygen atoms was performed under cI112 conditions.
この段階で酸素イオン注入層I2の1度は、表面から0
.5μm内部の箇所がピーク状態となり、その濃度分布
は略ガウシアン形の分布を呈している。At this stage, the oxygen ion implantation layer I2 has a degree of 0 from the surface.
.. The peak state occurs at a location within 5 μm, and the concentration distribution exhibits a substantially Gaussian distribution.
次いで950℃の温度で1時間の熱処理を施すことで酸
素原子が高濃度に添加され”でいる領域12^は5to
2層が形成されているが、酸素原子が低濃度に添加され
ている領域12BはSiO,(0<に〈2)、或いはS
i内に、SiO2が点在した状態に成っている。Next, by performing heat treatment at a temperature of 950°C for 1 hour, the region 12^ where oxygen atoms are added at a high concentration becomes 5to
Two layers are formed, but the region 12B where oxygen atoms are added at a low concentration is SiO, (0<2), or S
SiO2 is scattered within i.
次いで第2図に示すように、該基板」二に水素ガスで希
釈したモノシラン(Sill a )ガスを原料ガスと
して用い、反応温度を1050°Cとした気相成長方法
を用いて単結晶Si薄膜層13を1.2μ田の厚さに形
成する。Next, as shown in FIG. 2, a single crystal Si thin film was grown on the substrate using a vapor phase growth method using monosilane (Silla) gas diluted with hydrogen gas as a raw material gas and a reaction temperature of 1050°C. Layer 13 is formed to a thickness of 1.2 μm.
次いで第3図に示すように、単結晶Si薄膜層13の上
に基板の加熱温度を950℃としたウェノ1−酸化法に
よりSiO2股14全145μmの厚さに形成する。Next, as shown in FIG. 3, two SiO layers 14 are formed on the single-crystal Si thin film layer 13 to a total thickness of 145 .mu.m by the Weno 1-oxidation method in which the substrate is heated to 950.degree.
次いで第4図に示すように、表面に0.5μmの厚さの
5i02膜I5を有する2インチのSiウェハよりなる
転写基板16を用意し、単結晶Sr薄膜13−ヒのS宣
02膜14と転写基板16上の5i02Iil15とを
対向させて加圧し、ウェット酸化炉内で基板の温度を7
50℃として20分間保持した。Next, as shown in FIG. 4, a transfer substrate 16 made of a 2-inch Si wafer having a 5i02 film I5 with a thickness of 0.5 μm on its surface was prepared, and a single crystal Sr thin film 13 - an Sx02 film 14 of and 5i02Iil15 on the transfer substrate 16 are placed facing each other and pressurized, and the temperature of the substrate is raised to 7.
The temperature was kept at 50°C for 20 minutes.
このようにすることで、5102M’J114と5iO
2H’A15の間にシロキ酸結合が形成され、基板11
と転写用基板16間は固着される。By doing this, 5102M'J114 and 5iO
A siloxic acid bond is formed between 2H'A15 and the substrate 11
and the transfer substrate 16 are fixed.
次いで第5図に示すように、SI基板11を裏面側より
研磨し30μmの厚さまで薄層化する。Next, as shown in FIG. 5, the SI substrate 11 is polished from the back side to be thinned to a thickness of 30 μm.
更にエチレンジアミンと水とパイロカテコールのエツチ
ング液を用いて研磨工程で残留しているSi基板11を
総て除去する。Furthermore, all of the Si substrate 11 remaining in the polishing process is removed using an etching solution of ethylenediamine, water, and pyrocatechol.
この時、Siの酸素イオン注入層I2がエツチングのス
トッパーとなるわけであるが、このエツチング液を用い
るとSi基板の方が、Siの酸素イオン注入層より25
0倍のエツチング速度でエツチングされるため、酸素イ
オン注入層12の厚さが、仮に数μmの厚さである場合
でも完全にエツチングのストッパーの役目をする。At this time, the Si oxygen ion-implanted layer I2 acts as an etching stopper, but when this etching solution is used, the Si substrate is etched by 25% more than the Si oxygen ion-implanted layer.
Since etching is performed at an etching rate of 0 times, even if the thickness of the oxygen ion implanted layer 12 is several μm, it completely serves as an etching stopper.
次いで第6図に示すように、酸素イオン注入層12を弗
化水素酸と水との混合液を用い、かつtS械的に研磨す
る研磨剤を併用したたメカノケミカルエツチング法によ
り完全に除去する。Next, as shown in FIG. 6, the oxygen ion implantation layer 12 is completely removed by a mechanochemical etching method using a mixture of hydrofluoric acid and water and a tS mechanical polishing agent. .
化学量論的結合を満足したSiO2膜は、弗化水素酸と
水との混合液に容易に熔解するが、Siは全く溶解しな
い。また5iOX(0<に<2)の領域12Bは、微視
的に存在する5i02が溶解するため、機械的にポリッ
シングし易くなる。A SiO2 film that satisfies stoichiometric bonding easily dissolves in a mixture of hydrofluoric acid and water, but Si does not dissolve at all. Further, in the region 12B of 5iOX (0< to <2), the microscopically existing 5i02 is dissolved, so that mechanical polishing becomes easier.
また5iOy (0<x <2)の領域128が総て除
去されるとポリッシングの速度は著しく低下し、この段
階でメカノケミカルポリッシングを停+)−する。Furthermore, when the entire region 128 of 5iOy (0<x<2) is removed, the polishing speed is significantly reduced, and at this stage, the mechanochemical polishing is stopped.
そして最終的には、鏡面仕上げの、不純物混入のないS
iの単結晶薄膜が、5i02膜の上に形成されSOI構
造が形成される。Finally, the final product is S with a mirror finish and no impurities.
A single crystal thin film of i is formed on the 5i02 film to form an SOI structure.
尚、イオン注入や、単結晶Si薄膜形成等の条件は上記
した実施例のように限定されるものでない。Note that the conditions for ion implantation, single crystal Si thin film formation, etc. are not limited to those in the above embodiments.
またSol構造に於ける5i02膜の厚さが、厚いもの
が必要な時には、5I02膜I4を形成した後、CVD
法を用いて5i02膜を堆積する方法もある。In addition, if the thickness of the 5I02 film in the Sol structure needs to be thick, after forming the 5I02 film I4, CVD
There is also a method of depositing a 5i02 film using a method.
また転写基板に接着する方法も、上記の実施例の他に、
PSG膜の溶融接着法、アノ−デイックボンディング法
、5i02のコーティング剤を用いる方法も適用可能で
ある。In addition to the above-mentioned examples, there are also methods for bonding to the transfer substrate.
A PSG film melt adhesion method, an anodic bonding method, and a method using a 5i02 coating agent are also applicable.
またSi基板の除去のエツチング液も、」―記した他に
4メチルアンモニウムの水酸化物、または3メチル−2
水酸化エチルアンモニウム水酸化物(80〜90℃)等
も充分適用可能である。In addition, the etching solution for removing the Si substrate is 4-methyl ammonium hydroxide or 3-methyl-2
Ethyl ammonium hydroxide (80 to 90°C) and the like are also fully applicable.
また本発明に用いる基板としてはSi基板の他にGaA
s基板等、他の基板も通用可能である。In addition to the Si substrate, the substrate used in the present invention is GaA.
Other substrates such as s-substrates can also be used.
また転写用基板としては、本実施例のようなSr基板の
みならず、ガリウム−砒素(GaAs)等、他の半導体
基板、或いはサフィア基板のような絶縁性基板を用いて
も良い。Further, as the transfer substrate, not only the Sr substrate as in this embodiment, but also other semiconductor substrates such as gallium-arsenide (GaAs), or insulating substrates such as sapphire substrates may be used.
また酸素イオン注入層をエツチングするのに三弗化メタ
ンガスのようなフレオン系のエツチング用ガスを用いて
エツチングしても良い。Furthermore, a Freon-based etching gas such as trifluoromethane gas may be used to etch the oxygen ion-implanted layer.
以上述べたように、本発明の方法によれば、エツチング
のス]・ソバ一層としては、SrO薄股層に不純物原子
が拡散し鉗<、かつSi基板や、Siの薄IfiFfに
対してエツチングの選択比の大きい酸素イオン注入層を
用いており、また最終仕上げの際には、酸素注入層を熔
解するエツチング液を併用したメカノケミカルポリッシ
ング法を採用しているため、表面の平滑性が抜群で、不
純物混入のない高品質なSol構造が形成可能となる。As described above, according to the method of the present invention, the impurity atoms are diffused into the SrO thin layer as the etching layer, and the Si substrate and the thin Si film IfiFf are etched. An oxygen ion implantation layer with a high selectivity ratio is used, and in the final finishing, a mechanochemical polishing method is used in conjunction with an etching solution that dissolves the oxygen implantation layer, resulting in an extremely smooth surface. This makes it possible to form a high-quality Sol structure without contamination with impurities.
第1図より第6図迄は、本発明の方法の一実施例を工程
順に説明するための断面図、
第7図より第12図迄は、従来の方法を工程順に説明す
るための断面図である。
図に於いて、
11はSi基板、12.12A、 12Bは酸素イオン
注入層、13はSi薄膜層、14.15は5i02膜、
16は転回基板を示す。
ント発明−λンkにλ各す)〜奢靜f形を\:裡m第3
図
】 6
4−塔ツ用/1方はl:Yプ潰写靭へ帽T釦iTチま刀
第4図
41−mめ寿4にの工1チン7□ I 蛙図第5図
、1−矛り8月/+pt童イオ>j人ΔF7?勢天T買
図第6図
第7図
台のケチ1−.エナ3S、、−i=模形入1T第8図
従栗−がん、於+j3転鈎9妙轄11群図第10図
ゆらトゆ方駄にオ◇つSi基夜工、十ン7′°T利図第
11図Figures 1 to 6 are cross-sectional views for explaining an embodiment of the method of the present invention in the order of steps, and Figures 7 to 12 are cross-sectional views for explaining the conventional method in the order of steps. It is. In the figure, 11 is a Si substrate, 12.12A, 12B are oxygen ion implantation layers, 13 is a Si thin film layer, 14.15 is a 5i02 film,
16 indicates a rotating board. Invention of λ and λ
Figure] 6 4-Tower / 1 side is l: Y pu shu tsu he hat T button i T chima sword 4th figure 41-m 4th life work 1 chin 7 □ I frog figure 5, 1-August/+pt Dou Io>j person ΔF7? Seten T purchase map 6th figure 7th table stingy 1-. Ena 3S,, -i = model included 1T Fig. 8 Jukuri - Gan, + j 3 Turn hook 9 Myoju 11 group diagram Fig. 10 Yurato Yuhoda ni O ◇tsu Si Kiyoko, 17 '°T profit diagram Figure 11
Claims (5)
イオン注入層(12)を形成する工程、 該酸素イオン注入層(12)上に該基板(11)と同一
材料より成る単結晶薄膜層(13)を形成する工程、上
記単結晶薄膜層(13)の表面を転写基板(16)に対
向して接着する工程、 上記酸素イオン注入層(12)をエッチングのストッパ
ーとして、上記半導体基板(11)を裏面側よりエッチ
ング除去する工程、 上記酸素イオン注入層(12)を溶解し、かつ上記単結
晶薄膜層(13)は溶解しないエッチング剤を用いて、
上記酸素イオン注入層(12)を除去する工程を含むこ
とを特徴とする半導体素子形成用基板の製造方法。(1) A step of implanting oxygen ions into a semiconductor substrate (11) to form an oxygen ion implantation layer (12), a single crystal thin film made of the same material as the substrate (11) on the oxygen ion implantation layer (12). a step of forming a layer (13), a step of adhering the surface of the single crystal thin film layer (13) to the transfer substrate (16), using the oxygen ion implantation layer (12) as an etching stopper to form the semiconductor substrate; (11) from the back surface side, using an etching agent that dissolves the oxygen ion implantation layer (12) but does not dissolve the single crystal thin film layer (13),
A method for manufacturing a substrate for forming a semiconductor element, the method comprising the step of removing the oxygen ion implantation layer (12).
処理する工程を付与することを特徴とする特許請求の範
囲第(1)項記載の半導体素子形成用基板の製造方法。(2) The method for manufacturing a substrate for forming a semiconductor element according to claim (1), further comprising the step of heat-treating the substrate (11) after implanting the oxygen ions.
層(13)の表面に酸化膜(14)を形成する工程を付
与することを特徴とする特許請求の範囲第(1)項記載
の半導体素子形成用基板の製造方法。(3) After forming the single crystal thin film layer (13), a step of forming an oxide film (14) on the surface of the thin film layer (13) is provided. A method for manufacturing a substrate for forming a semiconductor element as described in 1.
注入層(12)近傍まで予め機械的に研磨する工程を付
与することを特徴とする特許請求の範囲第(1)項記載
の半導体素子形成用基板の製造方法。(4) The semiconductor element according to claim (1), characterized in that a step of mechanically polishing the semiconductor substrate (11) from the back side to the vicinity of the oxygen ion implantation layer (12) is applied in advance. A method for manufacturing a forming substrate.
記エッチング剤を用いてメカノケミカルポリツシング法
を用いてエッチングすることを特徴とする特許請求の範
囲第(1)項記載の半導体素子形成用基板の製造方法。(5) The semiconductor according to claim (1), characterized in that when removing the oxygen ion implantation layer (12), etching is performed using a mechanochemical polishing method using the etching agent. A method for manufacturing a substrate for forming an element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18226186A JPS6338234A (en) | 1986-08-01 | 1986-08-01 | Manufacture of substrate for semiconductor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18226186A JPS6338234A (en) | 1986-08-01 | 1986-08-01 | Manufacture of substrate for semiconductor element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6338234A true JPS6338234A (en) | 1988-02-18 |
Family
ID=16115157
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18226186A Pending JPS6338234A (en) | 1986-08-01 | 1986-08-01 | Manufacture of substrate for semiconductor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6338234A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004288780A (en) * | 2003-03-20 | 2004-10-14 | Sharp Corp | Semiconductor device and its manufacturing method |
JP2010278339A (en) * | 2009-05-29 | 2010-12-09 | Shin-Etsu Chemical Co Ltd | Method of manufacturing stuck soi substrate |
-
1986
- 1986-08-01 JP JP18226186A patent/JPS6338234A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004288780A (en) * | 2003-03-20 | 2004-10-14 | Sharp Corp | Semiconductor device and its manufacturing method |
US7919392B2 (en) | 2003-03-20 | 2011-04-05 | Sharp Kabushiki Kaisha | Semiconductor device and method of manufacturing the same |
JP2010278339A (en) * | 2009-05-29 | 2010-12-09 | Shin-Etsu Chemical Co Ltd | Method of manufacturing stuck soi substrate |
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