JPS6336628A - Time division multiplex transmission system - Google Patents
Time division multiplex transmission systemInfo
- Publication number
- JPS6336628A JPS6336628A JP18070386A JP18070386A JPS6336628A JP S6336628 A JPS6336628 A JP S6336628A JP 18070386 A JP18070386 A JP 18070386A JP 18070386 A JP18070386 A JP 18070386A JP S6336628 A JPS6336628 A JP S6336628A
- Authority
- JP
- Japan
- Prior art keywords
- time
- time slot
- time division
- station
- slot allocation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005540 biological transmission Effects 0.000 title claims description 6
- 238000000034 method Methods 0.000 claims abstract description 16
- 230000004308 accommodation Effects 0.000 description 9
- 238000007792 addition Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、時分割多重装置の回線収容変更手段に関する
。特に、タイムスロット入替用テーブルの切替制御手段
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a line accommodation changing means for a time division multiplexing device. In particular, the present invention relates to switching control means for a time slot switching table.
本発明は、収容回線の稼動中にタイムスロット割付けの
変更を行って収容変更を行う時分割多重伝送方式におい
て、
対局のタイムスロット割付変更を同期して行うことによ
り、
収容変更に伴う回線閉塞を回避することができるように
したものである。In a time division multiplex transmission system in which accommodation is changed by changing the time slot allocation while the accommodation line is in operation, the present invention prevents line blockage due to the accommodation change by synchronously changing the time slot allocation of the opposing station. This is so that it can be avoided.
従来、回線収容変更のタイムスロット割付変更手段を有
する時分割多重装置では、タイムスロット割付変更に伴
うタイムスロット入替テーブルの切替を各時分割多重装
置毎に非同期で実施していた。すなわち、各局毎に独自
に切替指示を手動で入力するか、または対局からの切替
指示で行っていた。Conventionally, in a time division multiplexing apparatus having a time slot allocation changing means for changing line accommodation, switching of the time slot switching table in accordance with the time slot allocation change was carried out asynchronously for each time division multiplexing apparatus. That is, switching instructions have been input manually for each station, or switching instructions have been issued from the opposing station.
このような従来の時分割多重装置では、収容回線の稼動
中にタイムスロット割付の変更を実施して収容変更を行
う場合に、各局毎のタイムスロット割付変更が非同期に
実施されるので、最初に変更を行った時分割多重装置の
変更開始時から最後に変更を行った時分割多重装置の変
更終了時点までの期間にわたり、各装置の送信側の多重
化タイムスロットと受信側の分離化タイムスロットの割
付が変更前と変更後で不一致となる。すなわち、受信側
のタイムスロット割付に従って分離化するので、送信側
の回線番号と異なる回線にデータおよび制御信号が出力
されることになり、誤データおよび制御信号異常になっ
て稼動中の回線が回線断になる欠点がある。In such conventional time division multiplexing equipment, when changing the time slot allocation for accommodation while the accommodation line is in operation, the time slot allocation for each station is changed asynchronously. The multiplexing time slot on the transmitting side and the demultiplexing time slot on the receiving side of each device over the period from the start of the change in the time division multiplexer that made the change to the end of the change in the time division multiplexer that made the last change. The assignment before and after the change is inconsistent. In other words, since separation is performed according to the time slot allocation on the receiving side, data and control signals will be output to a line different from the line number on the transmitting side, resulting in incorrect data and control signal errors, causing the operating line to become a line. There are certain drawbacks.
本発明はこのような欠点を除去するもので、収容回線の
稼動中でも収容変更が円滑に実行できる時分割多重伝送
方式を提供することを目的とする。SUMMARY OF THE INVENTION The present invention aims to eliminate such drawbacks and provides a time division multiplex transmission system that can smoothly change accommodation even when the accommodation line is in operation.
本発明は、高速データを伝送する高速回線の両端にそれ
ぞれに接続された第一および第二の局（Ａ局、Ｂ局）を
備え、この第一および第二の局のそれぞれは、異なる手
順を格納する記憶手段と、この記憶手段から読出された
手順に基づいて転送すべきデータをタイムスロットに割
付ける手段と、上記記憶手段から読出された手順に基づ
いて上記高速回線に到来するデータをタイムスロットか
ら抽出する手段とを備えた時分割多重伝送方式において
、上記記憶手段は上記第一および第二の局にそれぞれ複
数個あり、上記第一および第二の局は上記複数の記憶手
段のそれぞれに格納された手順のうち、同一内容の手順
を時計（２６，２７）に基づいて同じ時刻に選択する制
御手段（２５）を備えたことを特徴とする。The present invention includes first and second stations (A station, B station) connected to both ends of a high-speed line that transmits high-speed data, and each of the first and second stations performs different procedures. storage means for storing data, means for allocating data to be transferred to time slots based on a procedure read from the storage means, and means for allocating data arriving on the high-speed line based on the procedure read from the storage means. In the time division multiplex transmission system, each of the first and second stations has a plurality of the storage means, and the first and second stations each have a plurality of the storage means. It is characterized by comprising a control means (25) that selects procedures with the same contents at the same time based on clocks (26, 27) from among the procedures stored in each.
タイムスロット制御手順は現用中のもののほかに、追加
・変更内容に伴う予備用のものが記憶手段に蓄積されて
いる。制御手順により、対向する局は、同期して現用中
のものから予備用のものに切替えられる。したがって、
誤データおよび制御信号異常が発生せず、稼動中の回線
の回線断が起こらない。In addition to the time slot control procedures currently in use, backup procedures associated with additions and changes are stored in the storage means. According to the control procedure, the opposing stations are synchronously switched from active to backup. therefore,
Erroneous data and control signal abnormalities do not occur, and line disconnections in operating lines do not occur.
以下、本発明の実施例について図面を参照して説明する
。 −
図は本発明一実施例の構成を示すブロック構成図である
。時分割多重装置１は、Ａ局およびＢ局のそれぞれに設
置され、高速回線３１で対向接続される。低速回線接続
部１１．１２．１３は各々多重化分離部２１に接続され
、対向局の多重化分離部２１に高速口′！１Ａ３１を介
して接続される。多重化分離部２１は、切替回路２２を
介して現用タイムスロット割付テーブル２３および予備
用タイムスロット割付テーブル２４に接続される。制御
回路２５は、現用および予備用タイムスロット割付テー
ブル２３および２４の内容を制御するとともに、切替回
路２２の切替制御と時刻計時回路２７を制御する。制御
回路２５から時刻設定回路２６に切替の時刻を設定する
とともに、時刻計時回路２７で計時された時刻と設定さ
れた時刻と比較し、一致したとき制御回路２５に対し時
刻到達を示す信号を出力する。Embodiments of the present invention will be described below with reference to the drawings. - The figure is a block configuration diagram showing the configuration of an embodiment of the present invention. The time division multiplexing device 1 is installed in each of the A station and the B station, and is connected to each other via a high-speed line 31. The low-speed line connections 11, 12, and 13 are each connected to the multiplexing/demultiplexing unit 21, and the high-speed line connection units 11, 12, and 13 are connected to the multiplexing/demultiplexing unit 21 of the opposite station. Connected via 1A31. The multiplexing/demultiplexing unit 21 is connected to a working time slot allocation table 23 and a backup time slot allocation table 24 via a switching circuit 22 . The control circuit 25 controls the contents of the working and backup time slot allocation tables 23 and 24, as well as switching control of the switching circuit 22 and controlling the time clock circuit 27. The control circuit 25 sets the switching time in the time setting circuit 26, and also compares the time measured by the time clock circuit 27 with the set time, and when they match, outputs a signal to the control circuit 25 indicating that the time has arrived. do.
次に、この実施例装置を用いてタイムスロット割付の入
替を行う動作を説明する。時分割多重装置１がある回線
状態で多重化分離動作を行っている場合に、高速回線３
１の中のタイムスロット割付手順は、現用タイムスロッ
ト割付テーブル２３に蓄積されており、切替回路２２を
介して多重化分離部２１に加えられている。このとき、
追加・変更の必要が生じた場合に、追加・変更内容に伴
うタイムスロット割付手順が予備用タイムスロット割付
テーブル２４に蓄積される。時刻計時回路２７は各局で
時刻を計数している。追加・変更が必要となった時刻に
、タイムスロット割付テーブルの入替時刻を制御回路２
５から時刻設定回路２６に対して各々の局で同一に設定
を行う。時刻設定回路２６では、時刻計時回路２７の計
数結果と設定された時刻との比較を行っており、一致し
た時刻で制御回路２５に一致信号を出力する。制御回路
２５は一致信号を受けると、切替回路２２に対して切替
信号を出力し、現用タイムスロット割付テーブル２３を
予備用タイムスロット割付テーブル２４に切替える。Next, the operation of replacing the time slot allocation using this embodiment device will be explained. When time division multiplexer 1 performs demultiplexing operation in a certain line state, high-speed line 3
The time slot allocation procedure in No. 1 is stored in the current time slot allocation table 23 and is applied to the multiplexing/demultiplexing section 21 via the switching circuit 22. At this time,
When the need for addition or change arises, the time slot allocation procedure associated with the addition or change is stored in the backup time slot allocation table 24. A time clock circuit 27 counts the time at each station. At the time when an addition or change is required, the control circuit 2 sets the replacement time of the time slot allocation table.
5, the time setting circuit 26 is set identically at each station. The time setting circuit 26 compares the count result of the time clock circuit 27 with the set time, and outputs a coincidence signal to the control circuit 25 when the time coincides. When the control circuit 25 receives the coincidence signal, it outputs a switching signal to the switching circuit 22 and switches the working time slot allocation table 23 to the backup time slot allocation table 24.
このように各局で時刻設定が同一にされ時刻設定回路２
６からの時刻一致信号は各局とも同時に出力されて、各
局のタイムスロット割付テーブルの切替が同時に行われ
る。In this way, the time setting is made the same at each station, and the time setting circuit 2
The time coincidence signal from 6 is outputted to each station at the same time, and the time slot allocation tables of each station are switched at the same time.
本発明は、以上説明したように、時分割多重装置に時刻
計時手段と時刻設定手段を具備し、設定した時刻に時刻
一致信号を出力し、制御部でその信号をもとにタイムス
ロット割付テーブルを切替えて各局のタイムスロット割
付テーブルの変更を同時に行うので、回線を閉塞させな
い効果がある。As explained above, the present invention includes a time division multiplexing device equipped with a time clock means and a time setting means, outputs a time coincidence signal at the set time, and uses the control section to create a time slot allocation table based on the signal. Since the time slot allocation table of each station is changed simultaneously by switching the time slot allocation table, there is an effect that the line is not blocked.
図は本発明実施例方式の構成を示すプロ、り構成図。
１・・・時分割多重装置、１１〜１３・・・低速回線接
続部、２１・・・多重化分離部、２２・・・切替回路、
２３・・・現用タイムスロット割付テーブル、２４・・
・予備用タイムスロット割付テーブル、２５・・・制御
回路、２６・・・時刻設定回路、２７・・・時刻計時回
路、３１・・・高速回線。The figure is a professional configuration diagram showing the configuration of the system according to the embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Time division multiplexing device, 11-13... Low-speed line connection part, 21... Multiplexing separation part, 22... Switching circuit,
23... Current time slot allocation table, 24...
- Spare time slot allocation table, 25...control circuit, 26...time setting circuit, 27...time clock circuit, 31...high speed line.
Claims (1)
に接続された第一および第二の局（Ａ局、Ｂ局）を備え
、 この第一および第二の局のそれぞれは、 異なる手順を格納する記憶手段と、 この記憶手段から読出された手順に基づいて転送すべき
データをタイムスロットに割付ける手段と、 上記記憶手段から読出された手順に基づいて上記高速回
線に到来するデータをタイムスロットから抽出する手段
と を備えた時分割多重伝送方式において、 上記記憶手段は上記第一および第二の局にそれぞれ複数
個あり、 上記第一および第二の局は上記複数の記憶手段のそれぞ
れに格納された手順のうち、同一内容の手順を時計（２
６、２７）に基づいて同じ時刻に選択する制御手段（２
５） を備えたことを特徴とする時分割多重伝送方式。(1) A first and second station (station A, station B) are connected to both ends of a high-speed line that transmits high-speed data, and each of the first and second stations performs a different procedure. a storage means for storing data; a means for allocating data to be transferred to time slots based on a procedure read from the storage means; In the time division multiplex transmission system, each of the first and second stations has a plurality of the storage means, and each of the first and second stations has a plurality of storage means, each of which has a plurality of storage means. Among the procedures stored in the clock, the procedures with the same content are
6, 27) at the same time based on the control means (2
5) A time division multiplex transmission system comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18070386A JPH0714154B2 (en) | 1986-07-31 | 1986-07-31 | Time division multiplex transmission system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18070386A JPH0714154B2 (en) | 1986-07-31 | 1986-07-31 | Time division multiplex transmission system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6336628A true JPS6336628A (en) | 1988-02-17 |
| JPH0714154B2 JPH0714154B2 (en) | 1995-02-15 |
Family
ID=16087837
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18070386A Expired - Fee Related JPH0714154B2 (en) | 1986-07-31 | 1986-07-31 | Time division multiplex transmission system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0714154B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62122871A (en) * | 1985-11-22 | 1987-06-04 | Honda Motor Co Ltd | Method and device for phase matching/positioning detecting of wheel mounting bolt |
| EP1406420A2 (en) * | 2002-10-04 | 2004-04-07 | Zarlink Semiconductor V.N. Inc. | Method and Implementation for Context Switchover |
-
1986
- 1986-07-31 JP JP18070386A patent/JPH0714154B2/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62122871A (en) * | 1985-11-22 | 1987-06-04 | Honda Motor Co Ltd | Method and device for phase matching/positioning detecting of wheel mounting bolt |
| EP1406420A2 (en) * | 2002-10-04 | 2004-04-07 | Zarlink Semiconductor V.N. Inc. | Method and Implementation for Context Switchover |
| EP1406420A3 (en) * | 2002-10-04 | 2006-05-31 | Zarlink Semiconductor V.N. Inc. | Method and Implementation for Context Switchover |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0714154B2 (en) | 1995-02-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |