JPS6336565B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sound quality adjustment circuit, in which a sound quality adjustment circuit is capable of producing sound by adding non-flat signals of positive phase and negative phase having frequency characteristics at a predetermined ratio to a flat signal that is an audio signal. This is intended to provide a wide range of sound quality control.

One embodiment will be described below with reference to the accompanying drawings.

In FIG. 1, transistors Q ₁₇ , Q ₁₈ ,
Q ₁₉ and Q ₂₀ constitute a double balanced differential amplifier,
The emitters of transistors Q ₁₇ and Q ₁₈ and the emitters of transistors Q ₁₉ and Q ₂₀ are connected in common, and the emitters of transistors Q ₁₇ and Q ₁₈ are used as a signal current source of a positive phase non-flat signal with frequency characteristics.
In SG ₁ , the emitters of transistors Q ₁₉ and Q ₂₀ are each connected to a signal current source SG ₂ of an anti-phase non-flat signal. Here, the amplitudes of the signals from the signal sources SG ₁ and SG ₂ are the same A. Such a signal current source can be easily constructed using a differential amplifier.
Further, the collectors of the transistors Q ₁₇ and Q ₁₉ are connected in common and connected to a flat signal current source SG ₃ .
Positive phase and negative phase signals having frequency characteristics are added to this flat signal current. The amplitude of this flat signal is 1/2 that of the signals from the signal sources SG ₁ and SG ₂ described above.

Here, SG ₁ and SG ₂ will be explained as low-pass signal current sources after the audio signal passes through the low-pass waveformer. The relationship between these signals is shown in FIG.

Moreover, a vector diagram is shown in FIG. In FIG. 3, the signal sources SG ₁ and SG ₂ are represented by vectors L and -L, respectively, and the flat signal source SG ₃ is represented by N. The transistors Q ₁₇ , Q ₂₀ and the transistors Q ₁₈ ,
By controlling the voltage value applied to the base of _Q19 , it is possible to add L, -L, or -L' to the flat signal N. Now, if we control from a value lower than the base voltage of transistors Q ₁₈ and Q ₁₉ to a value higher than that, N+L, N-
The low range increases, decreases, and increases again from L' to NL. At this time, N
If the phase difference between and L is small, the transistor _Q17
This is when the combined collector output of _Q19 becomes -L/2, and the signal source is connected to the collector of transistor _Q17.
This is the case when a current of 1/4 of the current from SG ₁ and a current of 3/4 of the current from signal source SG ₂ are passed through the collector of transistor Q ₁₉ , respectively. Therefore, the bases of transistors Q ₁₇ , Q ₁₈ and transistors Q ₁₈ , Q ₁₉
from the voltage at which the collector of transistor Q ₁₇ carries all the current from signal source SG ₁ to the voltage at which 1/4 of the current from signal source SG ₁ flows, and the collector of transistor Q _{19 to the voltage at which all the current from signal source SG 1} flows from signal source SG _2. A wide range of sound quality adjustment can be obtained when performing differential control, from a voltage at which no current flows from signal source SG 2 to a voltage at which 3/4 of the current from signal source SG ₂ flows.

A circuit composed of transistors Q ₁ to Q ₁₆ is a control voltage generation circuit for providing such a control voltage. In addition to the above purpose, this control voltage generation circuit is designed to obtain flat characteristics without performing sound quality control when the movable piece of the sound quality adjustment variable resistor VR, which applies a DC voltage for sound quality adjustment, is near the center. We also take into account. This has the advantage of providing flat sound quality characteristics near the center even when a variable resistor without a center click is used or when the mechanical center position of the variable resistor is different from the electrical center position.

In this control voltage generation circuit, Q ₃ and Q ₄ are differential amplifiers that use transistor Q ₅ as a constant current source, and Q ₁₁ and Q ₁₂ are differential amplifiers that use transistor Q ₁₃ as a constant current source, and Q ₁ is a constant current source. The collectors of the transistors Q ₁ , Q ₃ , and Q ₁₁ are commonly connected to use the transistor Q ₉ as a load. The collectors of transistors Q ₄ and Q ₁₂ are also connected in common,
The load is transistor _Q10 . Resistance R ₂ ,
R ₃ , transistor Q ₂ , resistors R ₇ , R ₈ , and transistor Q ₇ are level shift circuits having the same configuration, and are connected to the bases of transistors Q ₃ and Q ₄ , respectively. Similarly, transistor Q ₈ , resistor R ₉ ,
_R10 , transistor _Q14 , and resistors _R15 and _R16 are also level shift circuits having the same configuration, and are connected to the bases of transistors _Q11 and _Q12 , respectively.
R ₁₈ , R ₁₉ , R ₂₀ , and R ₂₁ are resistors that constitute a voltage divider circuit, and a transistor is connected to the connection point of resistors R ₁₈ and R ₁₉ .
The base of Q ₁₄ and the base of transistor Q ₇ are connected to the connection point of resistors R ₂₀ and R ₂₁ , respectively. Then, connect the base of transistor Q ₁₅ to the emitter of transistor Q ₉ , and the base of transistor Q ₁₆ to the emitter of transistor Q ₁₀ , respectively.
The emitters of the transistors Q ₁₅ and Q ₁₆ are connected to the bases of the transistors 18 and 19 and the transistors Q ₁₇ and Q ₂₀ , respectively.

Therefore, the level-shifted voltage at point a is applied to the base of transistor _Q12 . On the other hand, the level-shifted voltage at point b is applied to the base of transistor _Q4 .

Now, if the voltage at point c becomes the same as the voltage at point b, the same voltage as the base of transistor Q ₄ is applied to the base of transistor Q ₃ , and the same voltage as the base of transistor Q 4 is applied to the collectors of transistors Q ₃ and Q ₄ .
A current equal to 1/2 of the collector current of Q ₅ flows.
At this time, since a higher voltage is applied to the base of transistor _Q12 than to the base of transistor _Q11 , more current flows to the collector of transistor _Q12 than to transistor _Q11 . Then, when the sound quality adjustment variable resistor VR is adjusted to change the voltage at point c, the currents of transistors Q ₃ , Q ₄ , Q ₁₁ , and Q ₁₂ are changed to resistors R ₄ and R ₅ with the voltage at points a and b as the boundary. , R ₁₁ ,
It changes with the slope determined by the value of _R12 .

FIG. 4 shows an example of the change. As mentioned above, the collectors of transistors Q ₁ , Q ₃ , and Q ₁₁ are connected in common and connected to the emitter of transistor Q ₉ .
In addition, since the collectors of transistors Q ₄ and Q ₁₂ are connected in common and connected to the emitter of transistor Q ₁₀ , the currents flowing through the emitters of transistors Q ₉ and Q ₁₀ are added. FIG. 4 shows changes in the added emitter currents of transistors Q ₉ and Q ₁₀ . When the emitter current of a transistor changes, the voltage between the base and emitter changes, and a change in the voltage between the base and emitter can cause the same amount of change in the emitter current for the same type of transistor, so this change in emitter current By adding this to a double-balanced differential amplifier via transistors Q ₁₅ and Q ₁₆ , the amount of signals flowing through transistors Q ₁₇ , Q ₁₈ , Q ₁₉ , and Q ₂₀ of the amplifier can be controlled for the purpose described above. . In Figure 5, the first
An example of the sound quality control characteristics of the circuit shown in the figure is shown. Here, a signal with a frequency of 100Hz was used.

In addition, in the above embodiment, an example was described in which the sound quality is adjusted by adding the signal after passing the audio signal through the low-pass wave generator to the original audio signal.
The present invention is also effective when the sound quality is adjusted using a signal passed through a high-pass wave filter.

As explained above, according to the present invention, two non-flat signals having frequency characteristics, the same magnitude A, positive phase and anti-phase, from two non-flat signal current sources are input to the double-balanced differential amplifier. A flat signal current source that supplies a positive-phase flat signal with a magnitude of 1/2 A/2 is connected to the load-side common collector of this double-balanced differential amplifier as an input, and a positive-phase non-flat signal is connected to the load side common collector of this double-balanced differential amplifier. A to A/
The double-balanced differential amplifier is differentially controlled so that non-flat signals with magnitudes up to 4A and opposite phase are added to flat signals with magnitudes from 0 to 3A/4. This makes it possible to provide a sound quality adjustment circuit with sufficient sound quality control range.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of a sound quality adjustment circuit according to an embodiment of the present invention, Fig. 2 is a diagram showing signals used in the circuit, and Fig. 3 is a diagram showing signals with normal phase or anti-phase frequency characteristics and flat signals. FIG. 4 is a vector diagram showing the addition state, FIG. 4 is a current composition diagram for generating control voltage of the control voltage generating circuit in the same circuit, and FIG. 5 is a diagram showing an example of control characteristics in the same circuit. SG ₁ ... Positive phase side signal source, SG ₂ ... Negative phase signal source,
SG ₃ ... Signal to be adjusted, Q ₁ , Q ₅ , Q ₁₃ ... Transistors forming the constant current source circuit, Q ₃ , Q ₄ , Q ₁₁ ,
Q ₁₂ ...Transistors that make up the differential amplifier,
Q ₂ , Q ₇ , Q ₈ , Q ₁₄ ... Transistors forming a level shift circuit, Q ₁₇ , Q ₁₈ , Q ₁₉ , Q ₂₀ ... Transistors forming a double-balanced differential amplifier.

Claims (1)

[Claims] 1 A double-balanced differential amplifier is provided that receives two non-flat signals from two non-flat signal current sources, each having frequency characteristics and the same size A, positive phase and anti-phase, as input to each current source side. , 1/1 of the non-flat signal is connected in parallel to the load-side common collector of this double-balanced differential amplifier.
A flat signal current source is connected which supplies a positive phase flat signal having a magnitude of A/2, and the positive phase non-flat signal has a magnitude from A to A/4 and the opposite phase non-flat signal is connected. Flat signal with magnitude from 0 to 3A/4,
A sound quality adjustment circuit comprising a control voltage generation circuit that differentially controls the double balanced differential amplifier so as to add both to the flat signal.