JPS6158048B2 - - Google Patents

Info

Publication number
JPS6158048B2
JPS6158048B2 JP54165877A JP16587779A JPS6158048B2 JP S6158048 B2 JPS6158048 B2 JP S6158048B2 JP 54165877 A JP54165877 A JP 54165877A JP 16587779 A JP16587779 A JP 16587779A JP S6158048 B2 JPS6158048 B2 JP S6158048B2
Authority
JP
Japan
Prior art keywords
low
resistor
signal
frequency
phase component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54165877A
Other languages
Japanese (ja)
Other versions
JPS5687907A (en
Inventor
Hiroyasu Shinho
Shizuo Inohara
Minoru Ueda
Hirosuke Yamamoto
Juichi Shiotani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16587779A priority Critical patent/JPS5687907A/en
Publication of JPS5687907A publication Critical patent/JPS5687907A/en
Publication of JPS6158048B2 publication Critical patent/JPS6158048B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G5/00Tone control or bandwidth control in amplifiers
    • H03G5/02Manually-operated control
    • H03G5/04Manually-operated control in untuned amplifiers
    • H03G5/10Manually-operated control in untuned amplifiers having semiconductor devices

Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)

Description

【発明の詳細な説明】 本発明は、テレビ受像機等の音響機器における
音質調整装置にするものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a sound quality adjustment device for audio equipment such as a television receiver.

従来、音質調整を行なうには、第1図のように
音質調整用可変抵抗器1,2に音声信号を通過さ
せる周知の調整回路を使用して行なつていた。と
ころが、一般にこのような調整用可変抵抗器はテ
レビセツトの前面に設けられているためにシヤー
シとの間で長い信号線に音声信号を通過させる必
要があり、そのようにするとテレビの水平・垂直
信号による誘導妨害を受けやすくて雑音が混入す
るという問題があつた。このため、直流電圧で音
質制御を行なう手段として、第2図の様に低域通
過フイルタ3を設けた差動増幅器4の電流配分を
制御電圧Vcで制御する回路構成で高域のみを平
担特性から減少させることが行なわれているがこ
のものでも高域と低域を独立に増加させたり減少
させたりすることができないという欠点がある。
Conventionally, sound quality adjustment has been carried out using a well-known adjustment circuit that passes audio signals through sound quality adjustment variable resistors 1 and 2, as shown in FIG. However, since such a variable resistor for adjustment is generally installed at the front of the TV set, it is necessary to pass the audio signal through a long signal line between it and the chassis. There was a problem in that it was susceptible to induced interference by signals and noise was mixed in. For this reason, as a means of controlling sound quality using DC voltage, only the high frequencies are leveled using a circuit configuration in which the current distribution of a differential amplifier 4 equipped with a low-pass filter 3 is controlled by a control voltage Vc, as shown in Figure 2. Although it has been done to reduce the frequency due to its characteristics, this method also has the disadvantage that it is not possible to increase or decrease the high and low frequencies independently.

そこで本発明は、直流制御電圧によつて高域と
低域の特性を独立に増減制御することのできる音
質調整回路を提供することを目的とするものであ
る。以下、本発明の一実施例について第3〜図を
参照して説明する。
SUMMARY OF THE INVENTION An object of the present invention is to provide a sound quality adjustment circuit that can independently increase or decrease the characteristics of high and low frequencies using a DC control voltage. Hereinafter, one embodiment of the present invention will be described with reference to FIGS.

まず、第3図に回路の構成例を示す。トランジ
スタ5,6、ダイオード7および抵抗8〜11は
バイアス回路である。トランジスタ12〜14と
抵抗15〜19は平担特性用の差動増幅器20を
構成し、トランジスタ21〜27と抵抗28〜3
2は高域制御用の差動増幅器33を構成し、トラ
ンジスタ34〜40と抵抗41〜45は低域制御
用の差動増幅器46を構成する。47は高域通過
フイルタ、48は低域通過フイルタ、49は負荷
抵抗、50は信号入力端子、51は信号出力端子
である。
First, FIG. 3 shows an example of a circuit configuration. Transistors 5, 6, diode 7, and resistors 8-11 are a bias circuit. Transistors 12-14 and resistors 15-19 constitute a differential amplifier 20 for flat characteristics, and transistors 21-27 and resistors 28-3
2 constitutes a differential amplifier 33 for high frequency control, and transistors 34 to 40 and resistors 41 to 45 constitute a differential amplifier 46 for low frequency control. 47 is a high-pass filter, 48 is a low-pass filter, 49 is a load resistor, 50 is a signal input terminal, and 51 is a signal output terminal.

そして、トランジスタ25のベースには高域通
過フイルタ47を経由した高域信号がトランジス
タ13のベースには全域平担な信号が、トランジ
スタ39のベースには低域通過フイルタ48を経
由した低域信号が加えられている。従つてトラン
ジスタ25のコレクターには高域信号の逆相成分
がトランジスタ26のコレクターにはその正相成
分が出力される。トランジスタ12のコレクター
には平担信号の正相成分が、トランジスタ13の
コレクターにはその逆相成分が出力される。トラ
ンジスタ38のコレクターには低域信号の正相成
分が、トランジスタ39のコレクターにはその逆
相成分が出力される。差動増幅器33と46はそ
れぞれ2重平衡差動増幅器に構成されており、ト
ランジスタ12,21,23,34,36のコレ
クターは共通に接続されていて、それらの各出力
信号が加算されて負荷抵抗49より出力端子51
に出力信号が取り出される。
The base of the transistor 25 receives a high-frequency signal that has passed through a high-pass filter 47, the base of the transistor 13 receives a signal that is uniform across the entire range, and the base of the transistor 39 receives a low-frequency signal that has passed through a low-pass filter 48. has been added. Therefore, the negative phase component of the high frequency signal is output to the collector of the transistor 25, and the positive phase component thereof is output to the collector of the transistor 26. The positive phase component of the flat signal is output to the collector of the transistor 12, and the negative phase component thereof is output to the collector of the transistor 13. The positive phase component of the low frequency signal is output to the collector of the transistor 38, and the negative phase component thereof is output to the collector of the transistor 39. The differential amplifiers 33 and 46 are each configured as a double-balanced differential amplifier, and the collectors of the transistors 12, 21, 23, 34, and 36 are connected in common, and their respective output signals are added to the load. Output terminal 51 from resistor 49
The output signal is extracted.

トランジスタ21と24及びトランジスタ22
と23のベースはそれぞれ共通に接続され、高域
制御電圧入口端子52,53より高域制御電圧が
印加される。同様にトランジスタ34と37及び
トランジスタ35と36のベースには低域制御電
圧入力端子54,55より低域制御電圧が印加さ
れている。
Transistors 21 and 24 and transistor 22
and 23 are connected in common, and a high frequency control voltage is applied from high frequency control voltage input terminals 52 and 53. Similarly, a low range control voltage is applied to the bases of the transistors 34 and 37 and the transistors 35 and 36 from low range control voltage input terminals 54 and 55.

かかる構成において、端子52,53に同一電
圧が印加されているとすると、トランジスタ21
と23のコレクターには高域通過信号電流の正相
成分と逆相成分とが等量づつ流れることになつて
負荷抵抗49では相互に打ち消しあつて高域通過
信号は出力されない。端子52,53の制御電圧
を変化させることによつてトランジスタ21と2
3に流れる高域信号の電流の比率を制御すること
ができ、トランジスタ13からの平担信号電流に
正相成分あるいは逆相成分の高域通過信号量をそ
の大きさを制御して加えることができる。正相成
分を多く加算すると高域が増加し、逆相成分を多
く加算すると高域が減少した出力信号が得られる
ことになる。
In such a configuration, if the same voltage is applied to the terminals 52 and 53, the transistor 21
Equal amounts of the positive-phase component and negative-phase component of the high-pass signal current flow through the collectors 23 and 23, and they cancel each other out at the load resistor 49, so that no high-pass signal is output. By varying the control voltages at terminals 52 and 53, transistors 21 and 2
It is possible to control the ratio of the high-pass signal current flowing through the transistor 13, and to add a high-pass signal amount of a positive phase component or a negative phase component to the flat signal current from the transistor 13 by controlling the magnitude thereof. can. When more positive phase components are added, the high frequency range increases, and when more negative phase components are added, an output signal with reduced high frequency frequencies is obtained.

同様に、端子54,55に加える低域制御電圧
を制御することによつて、出力信号中の低域成分
を増加させたり減少させたりすることができる。
Similarly, by controlling the low frequency control voltages applied to terminals 54 and 55, the low frequency component in the output signal can be increased or decreased.

かくして、高域特性と低域特性とをそれぞれ独
立に増減させることができて音質を制御すること
ができる。その増減させ得る最大量は抵抗30,
31と抵抗17,18との抵抗比及び抵抗43,
44と抵抗17,18との抵抗比と、2重平衡差
動増幅器33,46の電流分配比の最大変化量に
よつて決定される。
In this way, the high-frequency characteristics and the low-frequency characteristics can be increased or decreased independently, and the sound quality can be controlled. The maximum amount that can be increased or decreased is resistance 30,
31 and the resistance ratio of resistors 17 and 18 and the resistor 43,
44 and the resistors 17 and 18, and the maximum amount of change in the current distribution ratio of the double balanced differential amplifiers 33 and 46.

第4図は上記の回路構成をブロツク図で示し、
第5図はそのうちの低域信号の制御状態をベクト
ル図によつて示したものである。入力信号Nを低
域通過フイルタ48に通過させて得た低域信号L
の位相は平担入力信号Nの位相とは少し異なるの
で、第4図のような加算となる。
Figure 4 shows the above circuit configuration in a block diagram.
FIG. 5 shows the control state of the low frequency signal using a vector diagram. Low-pass signal L obtained by passing the input signal N through the low-pass filter 48
Since the phase of is slightly different from the phase of the flattened input signal N, the addition is as shown in FIG.

第4図中、K,Khはそれぞれ差動増幅器3
3と46における信号の入出力比を示し、a<K
<b,a<Kh<b,−1<a<0,0<bであ
る。この範囲内でKとKhとはそれぞれ制御端
子52,53と54,55への制御電圧によつて
制御される。また、第5図でわかるように低域通
過フイルタ48を通過した低域信号Lはどうして
ももとの平担信号Nに対して位相φだけ移相され
ているため、それを用いて極性と振幅を制御し加
算した出力信号の位相も平担信号Nに比べてずれ
ることは止むを得ない。なお、第5図は低域特性
の制御についてのみ示したが、高域についても同
様である。
In Fig. 4, K and Kh are respectively differential amplifiers 3
3 and 46, and a<K
<b, a<Kh<b, -1<a<0, 0<b. Within this range K and Kh are controlled by control voltages to control terminals 52, 53 and 54, 55, respectively. Furthermore, as can be seen in FIG. 5, the low-pass signal L that has passed through the low-pass filter 48 is inevitably phase-shifted by the phase φ with respect to the original flattened signal N, and this is used to determine the polarity and amplitude. It is unavoidable that the phase of the output signal which is controlled and added is also shifted compared to the flattened signal N. Although FIG. 5 shows only the control of the low-frequency characteristics, the same applies to the high-frequency characteristics.

第6図は、このような回路によつて音質制御を
したときの各種の出力信号の周波数特性例を示
す。
FIG. 6 shows examples of frequency characteristics of various output signals when sound quality is controlled by such a circuit.

以上詳述したように、本発明によれば、直流の
制御電圧によつて高域特性も低域特性もともに独
立にかつ任意に調整することができ、かつ制御電
圧を変化させても、直流分の変動を伴なわない有
用な音質調整装置を得ることができるものであ
る。
As detailed above, according to the present invention, both the high-frequency characteristics and the low-frequency characteristics can be adjusted independently and arbitrarily by using the DC control voltage, and even if the control voltage is changed, the DC Thus, it is possible to obtain a useful sound quality adjustment device that does not involve minute fluctuations.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は従来の音質調整装置の回
路図、第3図は本発明の一実施例における音質調
整装置の回路図、第4図はそのブロツク図、第5
図はその制御動作を説明するためのベクトル図、
第6図はその調整状態を示す特性図である。 20……平担信号用の差動増幅器、33……高
域信号用の差動増幅器、46……低域信号用の差
動増幅器、47……高域通過フイルタ、48……
低域通過フイルタ、49……負荷抵抗、50……
信号入力端子、51……信号出力端子、52,5
3……高域制御電圧入力端子、54,55……低
域制御電圧入力端子。
1 and 2 are circuit diagrams of a conventional sound quality adjustment device, FIG. 3 is a circuit diagram of a sound quality adjustment device according to an embodiment of the present invention, FIG. 4 is a block diagram thereof, and FIG.
The figure is a vector diagram to explain the control operation.
FIG. 6 is a characteristic diagram showing the adjusted state. 20... Differential amplifier for flat signal, 33... Differential amplifier for high frequency signal, 46... Differential amplifier for low frequency signal, 47... High pass filter, 48...
Low-pass filter, 49...Load resistance, 50...
Signal input terminal, 51... Signal output terminal, 52, 5
3...High range control voltage input terminal, 54, 55...Low range control voltage input terminal.

Claims (1)

【特許請求の範囲】[Claims] 1 入力音声信号を高域通過フイルタに加えて取
り出した高域信号を電圧源によつて抵抗を介して
同一にバイアスされ、エミツタが抵抗を介して定
電流源に接続された差動増幅器の片側へ接続して
各コレクタへ正相成分と逆相成分を得るようにな
し、入力音声信号を低域通過フイルタに加えて取
り出した低域信号を上記電圧源によつて抵抗を介
して同一にバイアスされたエミツタが抵抗を介し
て定電流源に接続された差動増幅器の片側へ接続
して各コレクタへ正相成分と逆相成分を得るよう
になし、高域及び低域信号のそれぞれのコレクタ
を二重平衡差動増幅器のそれぞれの正相及び逆相
の信号源となるように構成し、2つの二重平衡差
動増幅器のベースを高域調整の直流制御電圧と低
域調整の直流制御電圧とで独立にそれらの正相成
分と逆相成分の比率を制御できるようになし、入
力音声信号を上記電圧源によつて抵抗を介して同
一にバイアスされ、エミツタが抵抗を介して定電
流源に接続された差動増幅器の片側へ接続してそ
の正相成分側コレクタと上記高域及び低域信号の
正相分と逆相分の比率を制御するようになした二
重平衡差動増幅器のコレクタを共通負荷へ接続し
て構成し、直流制御電圧で高域と低域を独立に調
整するようになした音質調整装置。
1. One side of a differential amplifier whose emitter is connected to a constant current source through a resistor, with the high-frequency signal extracted by applying the input audio signal to a high-pass filter and equally biased by a voltage source through a resistor. The input audio signal is applied to a low-pass filter, and the extracted low-frequency signal is biased equally through a resistor by the above voltage source. The output emitter is connected to one side of a differential amplifier connected to a constant current source through a resistor so that a positive phase component and a negative phase component are supplied to each collector. are configured to serve as positive-phase and negative-phase signal sources for each of the double-balanced differential amplifiers, and the bases of the two double-balanced differential amplifiers are connected to a DC control voltage for high-frequency adjustment and a DC control voltage for low-frequency adjustment. The input audio signal is biased equally by the voltage source through the resistor, and the emitter is biased at a constant current through the resistor. A double-balanced differential connected to one side of the differential amplifier connected to the source to control the ratio of the positive-phase component side and the negative-phase component of the high-frequency and low-frequency signals with its positive-phase component side collector. A sound quality adjustment device in which the collector of an amplifier is connected to a common load, and the high and low frequencies are adjusted independently using a DC control voltage.
JP16587779A 1979-12-19 1979-12-19 Adjuster of sound quality Granted JPS5687907A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16587779A JPS5687907A (en) 1979-12-19 1979-12-19 Adjuster of sound quality

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16587779A JPS5687907A (en) 1979-12-19 1979-12-19 Adjuster of sound quality

Publications (2)

Publication Number Publication Date
JPS5687907A JPS5687907A (en) 1981-07-17
JPS6158048B2 true JPS6158048B2 (en) 1986-12-10

Family

ID=15820669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16587779A Granted JPS5687907A (en) 1979-12-19 1979-12-19 Adjuster of sound quality

Country Status (1)

Country Link
JP (1) JPS5687907A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5696518A (en) * 1979-12-29 1981-08-04 Sony Corp Tone control circuit
JPS5696519A (en) * 1979-12-29 1981-08-04 Sony Corp Tone control circuit
JPS58166119U (en) * 1982-04-30 1983-11-05 パイオニア株式会社 Tone control circuit

Also Published As

Publication number Publication date
JPS5687907A (en) 1981-07-17

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