JPS6336294A - Video display device - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a video display device using a large color display holder or the like as a screen. There is a human-powered text device5, which uses an ordinary television that displays tJ, q+ information to also display digital information such as text and graphics4). When displaying such digital information, the amount of information is generally large and cannot be displayed on one screen, so the scroll function is used to sequentially scroll the information as one stroke. However, when using a normal television, it is limited by the television scanning system, so although it is possible to scroll in the vertical (up and down) direction, it is difficult to scroll in the horizontal or diagonal directions.

Therefore, a display board consisting of a large number of light-emitting elements such as 11i bulbs, Some did. According to this, since the display board itself is digitally compatible, digital information such as characters and graphics can be displayed on the display board.

In addition, in consideration of cases where there is a large amount of digital information, it is possible to provide a scroll display function not only in the vertical direction but also in the horizontal and diagonal directions. According to such a video display device, it is possible not only to display video like a normal television, but also to adopt various display modes. That is, digital information may be displayed on a single screen, a video display and a digital display may be superimposed, and digital information may be scrolled in vertical, horizontal, or diagonal directions.

Problems to be Solved by the Invention In such a video display device, a frame memory compatible with the display screen is used as a memory for storing digital information in order to display the digital information.
When displaying digital information on one screen or more by scrolling, the display is stopped once in the middle to update the digital information, and then scrolled in the vertical, horizontal, or diagonal directions.

As a result, it takes too much time to update the data in the full-screen portion, making it impossible to keep up with the scrolling time, and generally making it impossible to display smooth scrolling even when there is a pause in the middle + 1.

In order to solve the problem, in addition to displaying images on the P-stage screen, digital information such as characters and graphics can be displayed alone or overlaid with the image display, or images can be scrolled vertically, horizontally, and diagonally. The display device ft't is provided with a memory having a capacity at least twice as large as one screen display area of the screen, and is provided with a control means for partially cutting out and outputting the digital information stored in the memory.

The digital information is displayed by changing the reading position from the digital information stored in the memory under the control of the control means.
This is done by partially cutting out and outputting data for the screen display area. Then, the display data is updated in the memory portion that is not accessed for reading by the control means. In other words, because the memory that stores digital information has a capacity that is more than twice the display area of one screen, even when scrolling and displaying digital information on one or more screens, the scrolling display is interrupted by updating the data midway through. There is no need to stop the display, and continuous scrolling display is performed.

Example An embodiment of the present invention will be described based on the drawings.

First, a display board 1 as shown in FIG. 1(a) is provided. This display board is made up of a large number of light emitting elements 2 such as light bulbs and LEDs, and is capable of displaying images like a normal television. Specifically, the light emitting elements 2 are arranged in m pieces in the horizontal direction and n pieces in the vertical direction, for a total of Xn pieces. As shown in FIG. 2, a video signal (picture signal) for displaying an image is first inputted to such a display board 1 at 6. As shown in FIG. This video signal is an analog signal of the NTSC system, and is decomposed into each color signal R, G, and B by the color decoder 3, and then converted into a digital signal by the A/D converter 8++ 71. After this digital signal 1% undergoes processing such as gradation by the video signal processing section 5, it is outputted to the display board l side via the output selection section 6, and is applied to each light emitting element 2 based on the gradation. Images are displayed by changing the brightness of the screen. Here, each part receives the synchronization signal from the timing generator 7.
i(is controlled by

Horizontal and vertical synchronization signals p;v, rr contained in the video signal are input to this timing generator.

The display by the display board l is not limited to such video display, but also displays digital information such as characters and graphics. There are overlapping displays, single digital displays (single screen displays), scrolling displays of digital information, etc. In order to display such digital information, first, the digital input device 8 for inputting the digital information to be displayed is required. The digital information inputted by this digital human power device 8 is sent to the address selector 1 under the control of the CPU 9 serving as a control means.
0 to the memory & memory controller 11.

This memory & memory controller 11 is composed of a memory 2 and a comparator 13, as shown in FIG. The memory 12 stores digital information for display, and in this embodiment, a memory J2 with a large capacity as shown in FIG. 1(b) is used. For example, width is m/2 bits and height is n/2 bits.
A plurality of memory chips each having a capacity of 2 bits (generally consisting of 1 bit (depth) x 2048 bits) are used, and each memory chip's 1 bit is connected to the light emitting element of the display board 1. 1 of 2. Here, since the display board 1 is composed of m x n light emitting elements 2, one screen display area is 1.
(Depth) It has a capacity for Xrn ) 15 For example, to explain the relationship in FIG. 1(a)(1)), the memory chip II, 11 shown with diagonal lines in FIG. 1(1))
12. #2].

The capacity due to #22 corresponds to one screen display area of the display board 1.

In such a memory 12, write data is manually input from MI (CI) LJ 9 on a write signal, and an address signal and a chip select signal are input from address selector 10. On the other hand, the address signal and chip select signal from the CPU 9 are input to the comparator 13, as well as screen cutting address (start address and stop address) signals. Then, an enable signal in which the start ST and stop SP timings are regulated based on the comparison result of the comparator 13 is output to the output selection section 6.

Further, a display strobe signal % S T N C from a timing generator 7 is also manually inputted to the output selection section 6 .

With such a configuration, digital information to be displayed in advance based on a write signal is stored in the memory 12 having a capacity four times that of one screen display area based on input from the digital input device 8. Selection processing such as overlapping video and digital or displaying only digital information is performed by the output selection section 6 based on the operation of an operation section (not shown) and an output selection signal from the CPU 9. It will be done. Here, when displaying the digital information of the memory 12, since the one screen display area of the one display board 1 and the memory 12 do not have a 1:1 correspondence relationship, which part of the memory 12 should be displayed on the display board 1.
11] Extract the screen in i minutes 1, + 111, C, ", l] tJ From the 9 side, input the start address and stop as the extraction address to the comparator 13. Enter the address.

On the other hand, at the time of display, the memory 12 is sequentially accessed by the address selector 10.
is checked at any time, and an enable signal is output only while the address matches the extraction address (that is, between the start address and the stop address), and output to the display board 1 side is enabled. Digital information corresponding to one screen area partially extracted from the memory 12 is displayed on the display board 13, and when scrolling is displayed, the scroll time (rj to be extracted - 10= This is done by sequentially (or randomly) changing the addresses. At this time, updating and writing of digital information to be displayed is arbitrarily performed for the memory chip portions in the memory 12 that have not been accessed for reading.

For example, FIG. 4 shows the relationship between the memory [2] and the display on the display board 1 when vertically scrolling display is performed. First, in FIG. 4(a), memory chip #1] in the memory 12 has digital information rAJ, memory chip #12 has digital information r13, memory chip #21 has digital information "c", Memory chip #22 contains digital information called rDJ, memory chip #22
3] contains digital information “E”, memory chip #32
``Digital information Fj is stored, and the other memory chips in areas indicated by crossed diagonal lines are those in which data has not yet been stored.In such a memory storage state, 1, for example, memory chip #1] When the first address is specified as the start address and the last address of memory chip #22 is specified as the stop address, the memory area 14 (not shown in the thick line frame) becomes the data output area for the display board, and based on the circuit control described above, the output area shown in FIG. 4(a) As shown in the display board 1 of A B CD memory chip #
i, 1. , 12.21.22 contents are displayed. At this time, the area indicated by the crossed diagonal lines that is not accessed by the memory call in the memory 12 is the memory updatable area 15.
Therefore, data can be written freely. Next, when the positions of the start and stop addresses of the memory area 14 are changed as shown in FIG.
)). In addition, in the memory 12, the digital information rGJ is newly input to the memory chip #/11, and the digital information r i(J is input to the memory chip #/12).Hereinafter, FIG. (c)
The digital information stored in the memory 12 is similarly processed and vertically scrolled and displayed, and the data in the memory is updated as appropriate.

FIG. 5 shows the case of horizontal scroll display, and FIG. 6 shows the case of diagonal scroll display, which is the same as the case of vertical scroll display.

As described above, according to this embodiment, when it is desired to scroll display digital information in one screen area or more on the display board 1, since the memory 12 has a capacity more than twice that of one screen display area, one screen area is displayed from the memory 12. By cutting out and outputting the data for each section and displaying it on the display board 1, it is possible to display the data in parallel with the data update. Therefore, when sequentially displaying the next digital information while scrolling vertically, horizontally or diagonally, there is no need to pause for data updating, and continuous and smooth scrolling is possible.

Effects of the Invention As described above, the present invention provides a memory having a capacity more than double that of one display area of the screen, and allows the control means to cut out and output a portion of the display area for display. To display digital information of one screen display area or more while scrolling vertically, horizontally or diagonally in a continuous and smooth state without having to temporarily stop for updating for missing data. It can be made for a long time and is not unsightly.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention; FIG. 1 is an explanatory block diagram showing the relationship between the display board and memory, FIG. 2 is a block diagram, and FIG. 3 is a block diagram of the memory and memory controller. FIG. 4 is an explanatory diagram of vertical scrolling display without comparing the memory and display state, FIG. 5 is an explanatory diagram of horizontal scrolling display showing the comparison of memory and display state, and FIG.
The figure is an explanatory diagram of a diagonal scroll display showing a comparison between a memory and a display state. ]...Display board (screen), 9...CPU <control means), 12...Memory (a) At-)T-91---Atsushi LL diagram (c) Mehenro import-LT -Sade”, y35 figure

Claims (1)

[Claims] In a video display device that has the function of displaying digital information such as characters and graphics on the screen alone or in combination with a video display, or scrolling in vertical, horizontal, and diagonal directions, at least one of the screens. 1. A video display device comprising a memory having a capacity twice or more than a display area, and a control means for partially cutting out and outputting digital information stored in the memory.