JPS633521A - Signal processing method - Google Patents

Abstract

PURPOSE:To reduce noise component without entirely deteriorating a signal component by applying nonlinear processing while a signal is subject to orthogonal conversion, thereby realizing complete reverse characteristic between the sending side and the recovery side. CONSTITUTION:A serial/parallel conversion circuit 103 outputs plural samples x1-x4 simultaneously and they are subject to orthogonal conversion in an orthogonal conversion circuit 104 to obtain values y1-y4. The outputs y2-y4 except the output y1 including much low frequency component among the conversion outputs y1-y4 obtained in this way are given to nonlinear input/output circuits 105a-105c having a characteristic empphasizing a small amplitude component to obtain outputs y2'-y4'. Then the outputs y1 and y2'-y4' are subject to inverse conversion at an inverse orthogonal conversion circuit 106 to obtain outputs z1-z4. Further, the output z1-z4 are converted by a parallel/ serial conversion circuit 107 and restored into an analog signal by a D/A converter 108 as the output. The similar processing is applied in the recovery side 200 to that at the sending side thereby reducing the high frequency component of noise invaded in a transmission line 110.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is a signal generator that can be used in recording/reproducing devices such as video tape recorders (VTRs), signal transmitting/receiving devices, etc., and is capable of reducing noise mixed in signals. This relates to a processing method.

Conventional technology In recent VTRs, a nonlinear pre-emphasis circuit on the recording side emphasizes small-amplitude high frequency components, and a non-linear de-emphasis circuit on the playback side with characteristics opposite to those on the recording side degrades signal components. Techniques are being used to reduce noise mixed in during the recording and reproducing process without causing noise. Recently, however, attempts have been made to integrate the circuit, reduce the number of components, and stabilize characteristics by replacing the nonlinear emphasis circuit, which was constructed with analog circuit elements, with digital processing.

A conventional digital nonlinear pre-emphasis circuit used on the recording side will be explained below. Figure 3 shows an example of the configuration of a digital nonlinear pre-emphasis circuit, in which a digitized video signal is input from input terminal 1, high-frequency components are extracted by digital bypass filter 2, and a nonlinear input signal with characteristics as shown in Figure 4 is input. By extracting a small amplitude signal by the output circuit 3 and adding it to the input signal in the adder 4, a digital video signal with emphasized small amplitude high frequency components is obtained at the output terminal 5. For example, Japanese Patent Application Laid-Open No. 60-93682).

Problems to be Solved by the Invention In principle, if the digital nonlinear de-emphasis circuit on the playback side is configured as shown in FIG. 5 in contrast to the digital nonlinear pre-emphasis circuit on the recording side, the characteristics will be completely opposite to those on the recording side. Become. That is, a feedback loop is formed with the same digital bypass filter 2 and nonlinear input/output circuit 3 as the nonlinear pre-emphasis circuit shown in FIG. What is necessary is to subtract it from the input signal and output it from the output terminal 8.

However, such a configuration cannot be realized as a digital circuit because the feedback loop includes a signal without delay.

For this reason, the configuration shown in FIG. 6 is used as a digital nonlinear de-emphasis circuit. The nonlinear de-emphasis circuit shown in FIG. 6 is composed of a digital bypass filter 9, a nonlinear input/output circuit 10, a subtracter 11, etc.
0 has different characteristics from the digital bypass filter 2 and nonlinear input/output circuit 3 of the nonlinear preemphasis circuit shown in FIG. The characteristics are set so that complementarity is maintained to some extent. However, it is not possible to realize a completely inverse characteristic to the nonlinear pre-emphasis characteristic on the recording side, and there is a problem in that the signal component is deteriorated to some extent.

The present invention focuses on the above-mentioned problems, and can be easily realized by digital processing.
It is an object of the present invention to provide a signal processing method that can reduce noise components without degrading signal components at all by creating completely opposite characteristics on the reproduction side (or reception side) and on the reproduction side (or reception side).

Means for Solving the Problems In order to solve the above problems, the signal processing method of the present invention orthogonally transforms an input signal on the recording or transmitting side, nonlinearly processes a plurality of orthogonally transformed transform outputs, and then performs inverse processing. In addition to orthogonally transforming and outputting, the reproduced or received signal is orthogonally transformed on the reproduction or receiving side, and the multiple orthogonally transformed transformation outputs are converted to nonlinear data with characteristics opposite to those of the nonlinear processing on the recording or transmitting side. After processing, the signal is obtained by performing inverse orthogonal transformation.

For this reason, the signal processing method of the present invention is a method that can be easily realized using a digital circuit, and since the signal is subjected to orthogonal transformation and nonlinear processing is performed, the recording or transmitting side and the reproducing or receiving side have completely opposite characteristics. , the noise component can be reduced without degrading the signal component at all.

EXAMPLE Hereinafter, a signal processing method according to an example of the present invention will be described with reference to the drawings.

FIG. 1 shows an example of the configuration of a signal processing device that implements the signal processing method of the present invention, and here is an example using fourth-order orthogonal transformation.

First note! 3 (transmission) side 100 will be explained.

A timing generation circuit 109 generates a clock signal having a specific relationship with the signal input from the input terminal 101 and a timing signal necessary for serial/parallel conversion, which will be described later. Here, the specific relationship refers to, for example, in the case of a video signal, a certain phase relationship with a synchronization signal. Using the clock signal obtained by the timing generation circuit 109, the input signal is sampled in the A/D converter 102 to obtain a digitized signal. The digitized signal is converted into a plurality of (four in this case) sample values Xl + XZ r x3 + in the serial/parallel conversion circuit 103.
X4 is output simultaneously at a predetermined timing by the timing generation circuit 109. These are converted into orthogonal transform circuit 104
orthogonally transform yI+ )'21 ys+
Get y4.

There are various orthogonal transformations such as Barr transformation and Karhunen-Löb transformation, but here we will take the fourth-order Hadamard transformation as an example: X+ + Xz, Xz, X4, and yI.

The relationship between yz + )'3 + y4 is expressed by equation (1).

Here, yl indicates the level of the low frequency component, and y2 to y3
It shows the level of high frequency components.

Figure 2
Nonlinear input/output circuits 105 a , 105 b , 105 having characteristics of emphasizing small amplitude components as shown in 20
c respectively to obtain 8 forces y'2 to y'4.

Next, y and y′2 to y′4 are converted to the inverse orthogonal transform circuit 1
Inverse transformation is performed at 06, and 21 to z4 are output. In the case of Hadamard transform, the inverse transform is expressed by equation (2), which is similar to the transform by the orthogonal transform circuit 104.

The inversely converted outputs 21 to z4 are converted by a parallel-to-serial conversion circuit 107 at a predetermined timing by a timing generation circuit 109, and converted back to an analog signal by a D/A converter 108 and output.

The above is the operation on the recording (transmission) side 100, which serves to emphasize small amplitude high frequency components. The signal output in this way is reproduced (
(receiving) side 200.

On the reproduction (receiving) side 200, a timing generation circuit 2 generates a clock signal having the same phase relationship as that on the recording (transmission) side and a timing signal necessary for serial/parallel conversion.
09, A/D conversion circuit 202, serial/parallel conversion circuit 203, orthogonal conversion circuit 204, nonlinear input/output circuit 205
a~205C1 The inverse orthogonal transform circuit 206, the parallel-to-serial transform circuit 207, and the D/A converter circuit 208 perform the same processing as on the recording (transmission) side and output from the output terminal 210. However, here, 202. 203. 204°206, 207
．． 208 are respectively on the recording (transmission) side 102.
103.104, 106, 207. It has exactly the same function as 208, but the nonlinear input/output circuit 205
The input/output characteristics of a to 205c are inverse characteristics to those of the nonlinear input/output circuits 105a to 105c on the recording (transmission) side, respectively, and have the characteristic of attenuating small amplitude components as shown at 220 in FIG. 2.

The above-described operation of the reproducing (receiving) side 200 reduces the high-frequency components of noise mixed in the transmission path (or recording medium) 110. Regarding signal components, four orthogonal transform outputs ul + u by the orthogonal transform circuit 204
2 + u3 and u4 are respectively equal to y++ y'2+ yZ+ y'4 on the recording (transmission) side 100, so the nonlinear input/output circuit 105 on the recording (transmission) side
Nonlinear input/output circuit 205 with inverse characteristics of a to 105c
u'z, u'3゜r obtained by a ~ 205 c
4 respectively) 'z, 3'! , equal to y4,
The small amplitude signal components emphasized on the recording (transmission) side (100) are completely restored to their original state.

In this way, since nonlinear processing is performed in the orthogonal transformed state, completely opposite characteristics can be achieved on the recording (transmission +3> side) and the reproduction (reception) side, and noise components can be reduced without degrading signal components at all.

In this embodiment, a fourth-order Hadamard transform was used as the orthogonal transform, but it may be of other orders, and in the case of video signals, it may be two-dimensional or three-dimensional in the horizontal, vertical, and movement directions. Good too. Further, other orthogonal transformations other than Hadamard transformation may be used.

Effects of the Invention Since the signal processing method of the present invention described above can be easily realized using a digital circuit, it is possible to integrate the circuit, thereby reducing the number of parts and stabilizing the characteristics. In addition, since non-linear processing is performed after orthogonal transformation, complete inverse characteristics can be achieved between the recording or transmitting side and the reproducing or receiving side.
Noise components can be reduced without degrading signal components at all.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a signal processing device that implements the signal processing method of the present invention, Fig. 2 is an input/output characteristic diagram of a nonlinear input/output circuit used in the signal processing device of Fig. 1, and Fig. 3 is a diagram of a conventional digital signal processing device. Figure 4 is a characteristic diagram showing an example of the input/output characteristics of the nonlinear input/output circuit used in the digital nonlinear preemphasis circuit shown in Figure 3, and Figure 5 is a characteristic diagram of the conventional digital nonlinear preemphasis circuit shown in Figure 3. FIG. 6 is a circuit diagram showing a principle digital nonlinear de-emphasis circuit for an emphasis circuit. FIG. 6 is a block diagram of a digital non-linear de-emphasis circuit that can actually be constructed. 104.204...Orthogonal transformation circuit, 106.2
06...Inverse orthogonal transform circuit, 105.205...
...Nonlinear input/output circuit. Name of agent: Patent attorney Toshio Nakao, 1 person, 5th cause, Figure 6 ON
It's Tsuka Hinse.

Claims (1)

[Claims] On the recording or transmitting side, the input signal is orthogonally transformed,
The plurality of orthogonally transformed transform outputs are non-linearly processed and then inversely orthogonally transformed and output, and at the playback or reception side, the reproduced or received signal is orthogonally transformed and the plurality of orthogonally transformed transform outputs are output. A signal processing method characterized in that a signal is obtained by performing nonlinear processing with characteristics opposite to the nonlinear processing on the recording or transmitting side, and then performing inverse orthogonal transformation.