JPS6335127U - - Google Patents
Info
- Publication number
- JPS6335127U JPS6335127U JP12576186U JP12576186U JPS6335127U JP S6335127 U JPS6335127 U JP S6335127U JP 12576186 U JP12576186 U JP 12576186U JP 12576186 U JP12576186 U JP 12576186U JP S6335127 U JPS6335127 U JP S6335127U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- switching signal
- switching
- circuit
- logic circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12576186U JPS6335127U (hr) | 1986-08-20 | 1986-08-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12576186U JPS6335127U (hr) | 1986-08-20 | 1986-08-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6335127U true JPS6335127U (hr) | 1988-03-07 |
Family
ID=31018943
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12576186U Pending JPS6335127U (hr) | 1986-08-20 | 1986-08-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6335127U (hr) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0278703U (hr) * | 1988-12-06 | 1990-06-18 | ||
| JPH08274601A (ja) * | 1995-03-31 | 1996-10-18 | Nec Corp | 遅延時間調整回路 |
| JP2008103863A (ja) * | 2006-10-18 | 2008-05-01 | Nec Corp | クロック非同期切替装置およびノイズキャンセル回路ならびにノイズキャンセル方法およびプログラム |
| WO2008114446A1 (ja) * | 2007-03-20 | 2008-09-25 | Fujitsu Microelectronics Limited | クロック信号選択回路 |
| JP2011233140A (ja) * | 2010-04-08 | 2011-11-17 | Canon Inc | 消費電力及びノイズを低減可能な制御装置 |
-
1986
- 1986-08-20 JP JP12576186U patent/JPS6335127U/ja active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0278703U (hr) * | 1988-12-06 | 1990-06-18 | ||
| JPH08274601A (ja) * | 1995-03-31 | 1996-10-18 | Nec Corp | 遅延時間調整回路 |
| JP2008103863A (ja) * | 2006-10-18 | 2008-05-01 | Nec Corp | クロック非同期切替装置およびノイズキャンセル回路ならびにノイズキャンセル方法およびプログラム |
| WO2008114446A1 (ja) * | 2007-03-20 | 2008-09-25 | Fujitsu Microelectronics Limited | クロック信号選択回路 |
| US8013637B2 (en) | 2007-03-20 | 2011-09-06 | Fujitsu Semiconductor Limited | Clock signal selection circuit |
| JP4790060B2 (ja) * | 2007-03-20 | 2011-10-12 | 富士通セミコンダクター株式会社 | クロック信号選択回路 |
| JP2011233140A (ja) * | 2010-04-08 | 2011-11-17 | Canon Inc | 消費電力及びノイズを低減可能な制御装置 |
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