JPS633438A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS633438A JPS633438A JP14856486A JP14856486A JPS633438A JP S633438 A JPS633438 A JP S633438A JP 14856486 A JP14856486 A JP 14856486A JP 14856486 A JP14856486 A JP 14856486A JP S633438 A JPS633438 A JP S633438A
- Authority
- JP
- Japan
- Prior art keywords
- polyimide film
- conductor layer
- adhesion
- polyimide
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 19
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 229920001721 polyimide Polymers 0.000 claims abstract description 49
- 239000004020 conductor Substances 0.000 claims abstract description 18
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims 1
- 239000002253 acid Substances 0.000 abstract description 3
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 238000004544 sputter deposition Methods 0.000 abstract description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 2
- 229960002050 hydrofluoric acid Drugs 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 18
- 238000000034 method Methods 0.000 description 8
- 239000004642 Polyimide Substances 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- -1 aromatic tetracarboxylic acid Chemical class 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 150000004985 diamines Chemical class 0.000 description 3
- 238000000992 sputter etching Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 150000002484 inorganic compounds Chemical class 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 235000006732 Torreya nucifera Nutrition 0.000 description 1
- 244000111306 Torreya nucifera Species 0.000 description 1
- 238000007718 adhesive strength test Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Local Oxidation Of Silicon (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の製造方法に関し、特にシリコンを
含有するポリイミド膜を導体層と導体層との間の絶縁膜
とする多層配線を含む半導体装置の製造方法に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a semiconductor device including a multilayer wiring in which a silicon-containing polyimide film is used as an insulating film between conductor layers. The present invention relates to a method for manufacturing a device.
ポリイミド膜を多層配線の眉間絶縁膜として用いると、
ポリイミド膜を半導体ウェーハ表面に塗布することＫよ
って形成するので、凸凹がある程度均ら畑れて平坦性が
良くなり、しかも形成方法が簡愛であるという利点があ
る。When polyimide film is used as an insulating film between the eyebrows of multilayer wiring,
Since the polyimide film is formed by coating the surface of the semiconductor wafer, it has the advantage that unevenness is evened out to some extent, resulting in good flatness, and the formation method is simple.
しかしながら、通常用いられているジアミンと芳香族テ
トラカルボン酸の二成分系のポリイミド膜、例えばジア
ミノジフェニルニーテルトペン７ｇフェノンテトラカル
ボン酸の二成分系であるポリイミド膜は、
（１）に示すような分子構造によって、ポリイミド膜の
下地に存在するシリコン系無機化合物例えばＳｉｎ、膜
に対する密着性が悪いという欠点を有していた。However, commonly used polyimide membranes with a two-component system of diamine and aromatic tetracarboxylic acid, for example, polyimide membranes with a two-component system of diaminodiphenylnitertopene 7g phenotetracarboxylic acid, as shown in (1). Due to its molecular structure, it has a drawback of poor adhesion to silicon-based inorganic compounds, such as Sin, existing under the polyimide film.
そこで、従来の半導体装置の製造方法の一例として、ジ
アミンと芳香族テトラカルボン酸の二成分以外に５ｔ−
０結合を有するジアミノシロキサン、例えば
を数多含有するポリイミド膜を使うことにより、下地シ
リコン系無機化合物との密着性を高めるという方法があ
る（％開昭５９−１０７５２２号公報）。Therefore, as an example of a conventional method for manufacturing semiconductor devices, in addition to the two components of diamine and aromatic tetracarboxylic acid, 5t-
There is a method of increasing the adhesion to the underlying silicon-based inorganic compound by using a polyimide film containing a large number of diaminosiloxanes having 0 bonds, for example (Patent Publication No. 107522/1982).
しかしながら、この従来例では、ポリイミド膜の下地と
の密着性は良くなるが、今後はポリイミド膜上に形成さ
れる導体層との密着性が悪くなる。However, in this conventional example, although the polyimide film has good adhesion to the base, the adhesion to the conductor layer to be formed on the polyimide film will deteriorate in the future.
これは、ポリイミド膜形成時に施される熱処理によって
ポリイミド分子の重合が進み、その結果ポリイミド膜上
に形成される膜と結合するための、不安定な結合の手が
ポリイミド膜表面に殆んど存在しなくなるためによると
考えられる。This is because the polymerization of polyimide molecules progresses due to the heat treatment applied during polyimide film formation, and as a result, unstable bonding hands exist on the surface of the polyimide film to bond with the film formed on the polyimide film. This is thought to be due to the fact that it no longer occurs.
従って、この従来例では、ポリイミド膜表面を、０、、
Ａｒ、Ｎ、などのガスでスパッタエツチングすることに
より荒らし、ポリイミド膜表面上に形成される導体層と
の密着性を高める必要がある（特開昭５１−１１１０９
０号公報）。Therefore, in this conventional example, the polyimide film surface is
It is necessary to roughen the polyimide film by sputter etching with a gas such as Ar or N to improve its adhesion to the conductor layer formed on the surface of the polyimide film (Japanese Patent Laid-Open No. 11109/1983).
Publication No. 0).
上述した従来の半導体装置の製造方法は、ポリイミド膜
とその上に形成される導体層との密着性を良くするため
にポリイミド膜表面を、０□、Ａ、。In the conventional semiconductor device manufacturing method described above, the surface of the polyimide film is coated with 0□, A, etc. in order to improve the adhesion between the polyimide film and the conductor layer formed thereon.
Ｎ２等のガスでスパッタエツチングして荒らすという工
程が入るために、非常（て時間が掛る上にポリイミド表
面のエツチングによってスパッタエツチング装置の真空
系の部分を劣化させるという欠点がある。Since the step of roughening by sputter etching with a gas such as N2 is involved, it is very time consuming and has the disadvantage that the etching of the polyimide surface deteriorates the vacuum system part of the sputter etching apparatus.
本発明の目的は、ポリイミド膜とその下地との密着性を
低下せずに、ポリイミド膜とその上に形成する導体層と
の密着性を向上する比較的簡単で時間が掛からずしかも
特別な装置を必要としない半導体装置の製造方法を提供
することにある。An object of the present invention is to provide a relatively simple and time-saving special device for improving the adhesion between a polyimide film and a conductor layer formed thereon without reducing the adhesion between the polyimide film and its base. An object of the present invention is to provide a method for manufacturing a semiconductor device that does not require the following steps.
本発明の半導体装置の製造方法は、半導体基板上の所定
の位置に第１の導体層を所定のパターンで形成する工程
と、前記第１の導体層を覆うようにシリコンを含有する
ポリイミド膜を形成する工程と、前記ポリイミド膜を所
定のパターンに形成する工程と、フッ酸溶液によって前
記ポリイミド膜の表面を処理して前記ポリイミド膜の表
面を覆うように第２の導体層を形成する工程とを含んで
構成される。The method for manufacturing a semiconductor device of the present invention includes the steps of forming a first conductor layer in a predetermined pattern at a predetermined position on a semiconductor substrate, and forming a polyimide film containing silicon to cover the first conductor layer. a step of forming the polyimide film into a predetermined pattern; and a step of treating the surface of the polyimide film with a hydrofluoric acid solution to form a second conductor layer so as to cover the surface of the polyimide film. It consists of:
次に、本発明の一実施例について図面を参照して説明す
る。Next, an embodiment of the present invention will be described with reference to the drawings.
第１図（ａ）〜（ｄ）は本発明の一実施例を説明するた
めに工程項に示した半導体チップの断面図である。FIGS. 1(a) to 1(d) are cross-sectional views of a semiconductor chip shown in the process section for explaining one embodiment of the present invention.
この実施例では、第１図（ａ）に示すように、先ず、第
１層配線２を形成した半導体基板１上にジアミン、芳香
族テトラカルボン酸及びジアミノシロキサンの三成分か
らなりシリコンを含有したポリイミド膜３を形成する。In this example, as shown in FIG. 1(a), first, on a semiconductor substrate 1 on which a first-layer wiring 2 was formed, a silicon-containing material consisting of three components of diamine, aromatic tetracarboxylic acid, and diaminosiloxane was deposited. A polyimide film 3 is formed.
次に、第１図（′ｂ）に示すように、ポリイミド膜３に
スルーホールを開口する。Next, as shown in FIG. 1('b), a through hole is opened in the polyimide film 3.
続いて、第１図（ｅ）に示すように、５チフツ酸溶液に
半導体ウェーハを１分間浸漬し、１０分間純水洗浄をし
た後に遠心乾燥をする。Subsequently, as shown in FIG. 1(e), the semiconductor wafer is immersed in a 5-thiphitic acid solution for 1 minute, washed with pure water for 10 minutes, and then centrifugally dried.
更に、第１図（ｄ）に示すように１スパツター法により
Ｍ等の導体層ｌをポリイミド膜３を覆うように形成し、
周知の方法でパターニングを行ない第２層配線４を作る
。Furthermore, as shown in FIG. 1(d), a conductive layer 1 such as M is formed to cover the polyimide film 3 by one sputtering method.
Patterning is performed using a well-known method to form second layer wiring 4.
以上のように、この実施例では、ポリイミド膜表面をフ
ッ酸溶液によって処理することにより、ポリイミド膜表
面に存在するポリイミド分子中の５ｔ−０成分を除去し
、表面のポリイミド分子が切断されることＫより発生す
る不安定な結合の手がポリイミド膜上に形成される導体
層と結合し易くなり、密着性が向上し剥れにくい良好な
多層配線構造を有する半導体装置が実現できる。As described above, in this example, by treating the surface of the polyimide film with a hydrofluoric acid solution, the 5t-0 component in the polyimide molecules present on the surface of the polyimide film is removed, and the polyimide molecules on the surface are cut. Unstable bonds generated by K easily bond to the conductor layer formed on the polyimide film, and a semiconductor device having a good multilayer wiring structure with improved adhesion and resistance to peeling can be realized.
以上説明したように本発明は、シリコンを含有するポリ
イミド膜を多層配線の層間絶縁膜として用いる半導体装
置を製造する際に、ポリイミド膜上の導体層を形成する
前に１ポリイミド膜表面をフッ酸溶液で処理することに
よって、ポリイミド膜とその上の導体層との密着性を向
上して剥れにくい多層配線を形成できるという効果があ
る。As explained above, when manufacturing a semiconductor device using a silicon-containing polyimide film as an interlayer insulating film of multilayer interconnection, the present invention is capable of coating the surface of one polyimide film with hydrofluoric acid before forming a conductor layer on the polyimide film. Treatment with a solution has the effect of improving the adhesion between the polyimide film and the conductor layer thereon, thereby forming a multilayer wiring that is difficult to peel off.
又、この効果を確認するために、シリコンを含有するポ
リイミド股上にＭの第２層配線を形成した試料を二種類
、即ち、第２層配線形成前にフッ酸溶液の処理を行なっ
た試料Ａ１行なわなかった試料Ｂのそれぞれに対して、
ＪＩＳ−ＤＯ２０２に従った接着強度試験を行なってみ
た。その結果、接着不良率は試料ＡがＯ／１００試料Ｂ
が１００／１００となり、本発明の効果が確認された。In addition, in order to confirm this effect, two types of samples were prepared in which a second layer wiring of M was formed on a silicon-containing polyimide crotch. Namely, sample A1 was treated with a hydrofluoric acid solution before forming the second layer wiring. For each sample B that was not tested,
An adhesive strength test was conducted according to JIS-DO202. As a result, the adhesion failure rate for sample A was 0/100 for sample B.
was 100/100, confirming the effect of the present invention.
第１図（ａ）〜（ｄ）は本発明の一実施例を説明するた
−めに工程順に示した半導体チップの断面図である。
１・・・・・・半導体基板、２・・・・・・第１層配線
、３・・・・・・ポリイミド膜、４・・・・・・第２層
配線。
（ｃＬ）
（ｂ）
茅１ 口FIGS. 1(a) to 1(d) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... First layer wiring, 3... Polyimide film, 4... Second layer wiring. (cL) (b) Kaya 1 mouth
Claims (1)
ーンで形成する工程と、前記第１の導体層を覆うように
シリコンを含有するポリイミド膜を形成する工程と、前
記ポリイミド膜を所定のパターンに形成する工程と、フ
ッ酸溶液によって前記ポリイミド膜の表面を処理して前
記ポリイミド膜の表面を覆うように第２の導体層を形成
する工程とを含むことを特徴とする半導体装置の製造方
法。forming a first conductor layer in a predetermined pattern at a predetermined position on a semiconductor substrate; forming a polyimide film containing silicon to cover the first conductor layer; and depositing the polyimide film in a predetermined manner. and a step of treating the surface of the polyimide film with a hydrofluoric acid solution to form a second conductor layer so as to cover the surface of the polyimide film. Production method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14856486A JPS633438A (en) | 1986-06-24 | 1986-06-24 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14856486A JPS633438A (en) | 1986-06-24 | 1986-06-24 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS633438A true JPS633438A (en) | 1988-01-08 |
Family
ID=15455569
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14856486A Pending JPS633438A (en) | 1986-06-24 | 1986-06-24 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS633438A (en) |
-
1986
- 1986-06-24 JP JP14856486A patent/JPS633438A/en active Pending
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